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MINISTRY OF EDUCATION AND TRAINING
HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY OF ECONOMICS

GRADUATION THESIS
INDUSTRIAL MANAGEMENT

CONTROLLING HEADCOUNT STANDARD MODEL
FOR STHI MODULE AT INTEL PRODUCTS
VIETNAM CO., LTD

INSTRUCTOR: M.E NGUYEN THI MAI TRAM
STUDENT: HO TRUNG HIEU
STUDENT ID: 16124115

S K L0 0 7 1 4 8

HO CHI MINH CITY, AUGUST, 2020

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MINISTRY OF EDUCATION AND TRAINING
HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY OF ECONOMICS


GRADUATION THESIS

TOPIC
CONTROLLING HEADCOUNT STANDARD MODEL


FOR STHI MODULE AT INTEL PRODUCTS VIETNAM CO., LTD

Student

: Ho Trung Hieu

Student ID : 16124115

Course

: 2016

Major

: Industrial Management

Instructor

: M.E Nguyen Thi Mai Tram

Ho Chi Minh City, August, 2020

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COMMENTS OF INSTRUCTOR
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Ho Chi Minh City,… August, 2020
Instructor

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COMMENTS OF THE COMMITTEE MEMBERS
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Ho Chi Minh City, ….August, 2020
Members of the committee

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ACKNOWLEDGEMENT
First and foremost, I would like to express my special thanks of gratitude to all lectures
of Faculty of Economics at Ho Chi Minh City University of Technology and Education
who had conveyed the profound knowledge to all students and had provided the best
condition for me to take the internship at Intel Products Vietnam Co., Ltd. Besides, I wish
to express my sincere thanks and gratitude to Ms. Nguyen Thi Mai Tram, who has guided
and supported me to choose the topic as well as complete this graduate thesis.
I wish to express my heartfelt regards to Intel Products Vietnam Co., Ltd for offering
me a great opportunity to work, research and experience in such a wonderful place to start
the career here. My grateful thanks are also extended to my manager Ms. Nguyen Thi
Huynh Trang and my buddy Mr. Tran Chien Thang for guiding as well as helping me
wholeheartedly during 6-month internship here.
As my knowledge is restricted, this thesis cannot avoid mistakes, I hope all of you to
be willing to give me your comments as well as recommendations to improve better. I wish
you the best health and success in your future career.
Ho Chi Minh City, …August, 2020
Student

Ho Trung Hieu

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LIST OF ABBREVIATIONS
ABBREVIATIONS

EXPLANATION

ATM

Assembly Test Manufacturing

CAP

Concept of area profile

CAPS

Capacity Analysis and Parameter System

CSM

Current state map

CW


Contingent worker

DL

Direct labor

DO

Direct observation

DOE

Design of experiment

EE

Engineering experiment

ES

Equipment Specialist

EUPH

Effective units per hour

FSM

Future state map


GU

Goal utilization

HC

Headcount

IE

Industrial Engineering

ILO

International Labor Organization

JIT

Just in time

ME

Module Engineer

MFG

Manufacturing

MHU


Man-hour utilization

MMR

Man-Machine Ratio

MPE

Module process engineer

MSE

Manufacturing System Engineering

MT

Manufacturing Technician

NST

Non schedule time

NVA

Non value-added
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NVA-R

Non value-added but required

OS2

Operation Specialist level 2

OT

Over time

PDCA

Plan-Do-Check-Act

PM

Preventive maintenance

POR

Plan of Record

RBS

Run based setup

ROI


Return on investment

RV

Reliability verification

SC

Station controller

SDT

Scheduled downtime

TolUn

Tool utilization

TP

Test program

TPS

Toyota Production System

USDT

Unscheduled downtime


VA

Value-added

VF

Virtual factory

VNAT

Vietnam Assembly Test

WIP

Work in process/progress

WW

Work week

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LIST OF FIGURES
Figure 1.1. Intel Corporation logo ........................................................................................ 5
Figure 1.2. Intel Products Vietnam Co., Ltd ........................................................................ 6
Figure 1.3. Intel evolution logo ............................................................................................ 7
Figure 1.4. Home of Intel Vietnam ...................................................................................... 9

Figure 1.5. Year on Year Headcount growth at Intel Vietnam .......................................... 10
Figure 1.6. Front and back side of SoC family product ..................................................... 12
Figure 1.7. Organization chart of Intel Products Vietnam ................................................. 13
Figure 1.8. Intel company 2019 financial statement .......................................................... 14
Figure 1.9. Intel company 2019 financial statement for production lines.......................... 14
Figure 1.10. Intel 5G product ............................................................................................. 16
Figure 2.1. Lean Manufacturing model .............................................................................. 18
Figure 2.2. The 7 wastes of Lean Manufacturing............................................................... 20
Figure 2.3. Spaghetti diagram visualization ....................................................................... 23
Figure 2.4. Step to implement Kaizen event ...................................................................... 26
Figure 2.5. Working time standard ..................................................................................... 31
Figure 2.6. Fatigue standard ............................................................................................... 32
Figure 3.1. STHI module structure ..................................................................................... 34
Figure 3.2. VF Headcount model overview ....................................................................... 37
Figure 3.3. The relationship between headcount standard model and layout .................... 38
Figure 3.4. Headcount distribution for each link of STHI module .................................... 41
Figure 3.5. Specs summary for STHI module .................................................................... 45
Figure 3.6. The process map of headcount continuous improvement ................................ 47
Figure 3.7. Machine actual utilization (relied on Semi-E10) ............................................. 49
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Figure 3.8. The current statistics about idle tool time in the period shown ....................... 50
Figure 3.9. The gap between CAP standard and DO result ............................................... 55
Figure 4.1. Spaghetti diagram of STHI module ................................................................. 57
Figure 4.2. The improvement for Kanban recognition ....................................................... 60
Figure 4.3. The amount of time MTs take to get lot from BOL Kanban ........................... 61
Figure 4.4. Proposed solution for cart direction and Kanban space utilization ................. 62

Figure 4.5. Proposed solution for order ticket position ...................................................... 62
Figure 4.6. The current input/output cart Kanban position ................................................ 64
Figure 4.7. The proposed input/output cart Kanban position ............................................. 65
Figure 4.8. The current gap of robot arm speed between standard and reality .................. 67
Figure 4.9. The current process of splitting lot Bin............................................................ 68
Figure 4.10. The proposed process of splitting lot Bin ...................................................... 69
Figure 4.11. Regulation for Break time coverage .............................................................. 70
Figure 4.12. Pushing cart guidance to commit safety and reduce MSDs ........................... 73
Figure 4.13. The current process of making decision for on hold lot ................................ 76
Figure 4.14. The proposed process of making decision for on hold lot ............................. 77
Figure 4.15. The amount of time needed for MTs to make decision for on hold lot ......... 77
Figure 4.16. The future statistics about performance ......................................................... 81
Figure 4.17. The future statistics about idle tool time in the period shown ....................... 83
Figure 4.18. STHI monthly output report ........................................................................... 84

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LIST OF TABLES
Table 2.1. The purpose of Direct observation .................................................................... 21
Table 2.2. Ashcroft theory table-the number of machines of which one operator is in charge
............................................................................................................................................ 29
Table 3.1. Allowable working hours standard (available time) ......................................... 34
Table 3.2. Fatigue allowance standard for each module .................................................... 36
Table 3.3. MMR for each product of STHI module ........................................................... 38
Table 3.4. MMR standard for STHI module ...................................................................... 40
Table 3.5. Headcount planning for STHI module .............................................................. 40
Table 3.6. The number of Kanbans of STHI module ......................................................... 42

Table 3.7. Concept of area profile for MTs ........................................................................ 44
Table 3.8. Concept of area profile with parameter for MTs............................................... 46
Table 3.9. Semi-E10 current data analysis for STHI module ............................................ 50
Table 3.10. The current Semi-E10 parameter summary for STHI module ........................ 51
Table 3.11. The gap in the number of product tested between plan and reality ................ 52
Table 3.12. Concept of area profile for MTs with the current data collection ................... 54
Table 4.1. The layout symbol and its explanation .............................................................. 58
Table 4.2. The comparison between current process and proposed process for getting lot
............................................................................................................................................ 63
Table 4.3. Current time and proposal time for load and unload tray activities .................. 65
Table 4.4. The comparison of robot arm speed between standard and collection ............. 66
Table 4.5. Cart pusher utilization of other modules ........................................................... 71
Table 4.6. Lean manufacturing symbol .............................................................................. 74
Table 4.7. The time collected of MTs for handling on hold lot ......................................... 78
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Table 4.8. Concept of area profile for MTs after improvement ......................................... 80
Table 4.9. MMR for each product of STHI module after improvement ............................ 82
Table 4.10. MMR standard for STHI module after improvement ..................................... 82
Table 4.11. Semi-E10 future data analysis for STHI module ............................................ 83
Table 4.12. Headcount plan of record (POR) ..................................................................... 85

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TABLE OF CONTENTS
COMMENTS OF INSTRUCTOR ........................................................................................ i
COMMENTS OF THE COMMITTEE MEMBERS ...........................................................ii
ACKNOWLEDGEMENT .................................................................................................. iii
LIST OF ABBREVIATIONS ............................................................................................. iv
LIST OF FIGURES ............................................................................................................. vi
LIST OF TABLES ........................................................................................................... viii
TABLE OF CONTENTS ..................................................................................................... x
INTRODUCTION ................................................................................................................ 1
1. Rationale of the topic .................................................................................................... 1
2. Objectives and goal ....................................................................................................... 2
3. Research object ............................................................................................................. 2
4. Scope of research .......................................................................................................... 2
5. Research method ........................................................................................................... 2
6. Structure of the report ................................................................................................... 3
CHAPTER 1: INTEL PRODUCTS VIETNAM CO., LTD OVERVIEW .......................... 4
1.1. Intel Products Vietnam Co., Ltd introduction ............................................................ 4
1.1.1. History of the company ....................................................................................... 4
1.1.2. Vision ................................................................................................................... 6
1.1.3. Intel evolution ...................................................................................................... 6
1.1.4. Intel values ........................................................................................................... 7
1.1.5. Intel Vietnam workforce ...................................................................................... 9
1.2. Business field of Intel Products Vietnam Co., Ltd .................................................. 10
1.3. Organization’s structure of Intel Products Vietnam Co., Ltd .................................. 12
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1.4. Business situation of Intel Products Vietnam ......................................................... 13

1.5. Intel development orientation .................................................................................. 15
CHAPTER 2: THEORETICAL BASIS ............................................................................. 17
2.1. Lean Manufacturing theory ...................................................................................... 17
2.1.1. What is Lean Manufacturing? ........................................................................... 17
2.1.2. Lean Manufacturing tools .................................................................................. 20
2.1.2.1. Lean Direct observation .............................................................................. 20
2.1.2.2. Spaghetti diagram ........................................................................................ 21
2.1.2.3. Kanban......................................................................................................... 23
2.1.2.4. Kaizen .......................................................................................................... 24
2.2. Headcount standard model overview ....................................................................... 26
2.2.1. Headcount standard model theory ..................................................................... 26
2.2.2. Headcount standard model with related methodology ...................................... 30
2.2.2.1. Allowable working hours standard ............................................................. 30
2.2.2.2. Fatigue allowance standard ......................................................................... 32
CHAPTER 3: STATE OF CONTROLLING HEADCOUNT STANDARD MODEL AT
STHI MODULE ................................................................................................................. 33
3.1. STHI module introduction ....................................................................................... 33
3.2. Allowable working hours standard at Intel .............................................................. 34
3.3. Headcount forecast for STHI module ...................................................................... 36
3.4. Control the number of Kanbans ............................................................................... 41
3.5. Control MT performance to define MMR ............................................................... 43
3.6. Headcount control process map ............................................................................... 47
3.7. The current state at STHI module ............................................................................ 48
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3.7.1. The increase of idle tool time at STHI module ................................................. 48
3.7.2. Apply Lean direct observation to understand clearly the current state ............. 52

CHAPTER 4: SOLUTION TO IMPROVE HEADCOUNT STANDARD MODEL FOR
STHI MODULE ................................................................................................................. 56
4.1. Use Spaghetti diagram to find the transportation wastes ......................................... 56
4.2. Proposed solution to address the problem................................................................ 59
4.2.1. Solution for the shortage number of current Kanban ........................................ 59
4.2.2. Addressing Kanban layout issue ........................................................................ 61
4.2.3. Improve the robot arm speed to pick 36 first units into motherboards ............. 66
4.2.4. Control L1 assist time ........................................................................................ 67
4.2.5. Implement a new solution for Break time coverage .......................................... 70
4.2.6. Improve pushing cart activities .......................................................................... 71
4.2.7. Human resources improvement ......................................................................... 73
4.2.8. Control decision-making for on hold lot ........................................................... 75
4.2.9. Improve Kaizen and PM activities to increase module quality and capacity .... 78
4.3. Expected result after improvement .......................................................................... 79
CONCLUSION .................................................................................................................. 86
REFERENCES ................................................................................................................... 87
APPENDIX ........................................................................................................................ 87
Appendix I: International Labor Organization recommended allowances ..................... 89

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INTRODUCTION
1. Rationale of the topic
To survive in the fierce global marketplace, companies has struggled with reducing
wastes and improving their efficiency. Effective usage of Headcounts (HC) and machines
is essential in semi-conductor manufacturer like Intel for high return of investment from
expensive resources in today’s competitive business environment. It is thus critical to

establish optimal Headcount standard model to gain high resource utilization and output.
Since VNAT started different efficiency efforts during 2019 in terms of tool and space
utilization, HC and capital cost among others. To drive this initiative, VNAT factory
decided to focus on productivity project and fix operation in order to align each area against
HC targets. The first component of VNAT success was management commitment to reduce
Headcount. In other words, VNAT committed to lower Headcount and trusted that they
would figure out how to run that way as they progressed. Therefore, a modified workdesign architecture is applied to optimize the Headcount standard model. The research also
discusses the shortage of traditional methods and how proper simulation can be applied to
overcome these difficulty. This topic describes the process and implementation of the HC
standard model specifically to perform the relationship between operators and machines at
semi-conductor manufacturer. The methodology approach developed to carry out the
project was focused on the main configuration: Man-Machine Ratio (MMR) in order to
capture important considerations that could impact safety, productivity and product output.
This topic also reviews several of the biggest labor-saving techniques that VNAT used to
run at a lower direct headcount.
During six-month internship at Intel Products Vietnam, author realized the importance
and influence of Headcount standard model in conjunction with Man-Machine Ratio as
well as the necessity of applying this method for each module in VNAT factory. That is the
reason why author chooses this topic “Controlling Headcount standard model for STHI
module at Intel Products Vietnam Co., Ltd.”

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2. Objectives and goal
The major goal of this topic is to analyze and control the current state of Headcount at
STHI module. By reducing the non value-added time and eliminating human error during
working time, this topic not only helped the factory figure out the backlog but also brought

the optimal solution out to improve the factory resources.
3. Research object
The research mentions about: Headcount standard model based on MMR theory and
other related materials about Lean manufacturing to improve Headcounts at STHI module
in VNAT.
4. Scope of research
Space:
The research was conducted for STHI module in phase 1 and phase 2 in VNAT.
Time:
The research was carried out within 7 months from the beginning of November 2019
to the end of May 2020.
5. Research method
Data collection method:
 Primary data: Going directly to where the work is being done and observing, then
collect and investigate.
 Secondary data:
 Collect examined data at Headcount department, Industrial Engineering
department, Test Engineering department and Lean team.
 Refer to book, document related to the topic. Consult previous research about
this topic via company online library.

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Data processing method:
 Analyze and summarize the collected data through Excel.
 Establish a list of tables, charts and figures to demonstrate the authentic of data.
6. Structure of the report

The report has 4 main chapters:
 Chapter 1: Intel Products Vietnam Co., Ltd overview
 Chapter 2: Theoretical basis
 Chapter 3: State of controlling Headcount standard model at STHI module
 Chapter 4: Solution to improve Headcount standard model for STHI module

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CHAPTER 1: INTEL PRODUCTS VIETNAM CO., LTD OVERVIEW
1.1. Intel Products Vietnam Co., Ltd introduction
1.1.1. History of the company
Intel was founded in Mountain View, California, in 1968 by Gordon E. Moore, a
chemist, and Robert Noyce, a physicist and co-inventor of the integrated circuit. The
company name was conceived as the words “integrated” and “electronics”. However,
“Intel” is known as the term for intelligence information, also made the name appropriate.
Intel is known an early developer of DRAM and SRAM memory chips, and it also is the
world’s highest and largest valued semiconductor chip factory based on revenue. Intel was
ranked No. 46 in the 2018 Fortune 500 list of the largest United States corporations by its
total revenue. Intel distributes processors and memory chips for computer system
manufacturers such as Apple, HP, and Dell…
Intel history timeline:
Intel created its first commercial microprocessor called as Intel 4004 in 1971. This
microprocessor presented a cutting-edge technology in the advance of integrated circuitry,
since it minimized the central memorable processing unit of computer, which enable it for
small machines to perform calculation and algorithm that in the past only giant machines
could do.
During the 1990s, Intel invested profoundly in new microprocessor technology

designed to foster the rapid growth of the semiconductor industry. During this period Intel
became the dominant supplier of microprocessors for PCs and computer as well as known
for insistent and competitive tactics in defense of its current market position.
After 2000, demand growth for cutting-edge microprocessors dropped and Intel's
dominant position in its core market was greatly decreased.
In December 2011, Intel stated that it had restructured lots of its business units function
into a new cutting-edge device and communications group that would be responsible for
the company's tablet, wireless device and smartphone.
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Intel sites worldwide:
Over 50 years of development and transformation, Intel employees have been spreading
in 46 countries with diverse people around the world. From manufacturing sites to sales
and marketing offices, Intel employees are making a positive impact worldwide.
Nowadays, Intel has may production plants around the world such as Israel, China,
Malaysia and Vietnam…

Figure 1.1. Intel Corporation logo
(Source: www.isearch.intel.com)
Intel Products Vietnam:
The new assembly and test facility Intel built in Vietnam has been both the first
investment of its kind by the semiconductor industry in Vietnam, and the largest single
factory within the Intel Assembly and Test network.
On November 10, 2006, Intel invested USD 1 billion to establish a 46.451 square meter
facilities in Vietnam after the thorough research decided that this has been the most efficient
size for Assembly and Test facilities. In February 2006, Intel had announced plans for a
smaller facility costing USD 300 million. Construction started in March 2006 in the 115

acres at Lot I2, Street D1, Saigon Hi-Tech Park, District 9, Ho Chi Minh City, and known
as the largest city and commercial and Industrial hub in Vietnam. With the young, talented
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and enthusiastic labor team, Intel Vietnam contributes to approximately 80% chips used in
computers sold in the world, and also be a mega-manufacturer of Intel Corporation.

Figure 1.2. Intel Products Vietnam Co., Ltd
(Source: Author research)
1.1.2. Vision
The Intel Corporation vision around the world is “If it's smart and connected, it's best
with Intel”. At Vietnam Site has its own motto “Create the future of Intel and Vietnam”. It
means that Intel family is a solid group, every site grows and evolves by its way with the
aim at building One Intel.
1.1.3. Intel evolution
Evolution starts with 4 attributes: “Truth and transparency”, “Fearless”, “One intel”,
and “Customer obsessed”. Intel has recognized and respected the worth and dignity of every
employee. It strives to build a fair system, allowing each of its to contribute at full potential.

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The corporate promotes and sustains a sense of belonging, valuing diverse talents, beliefs,
backgrounds, and experiences to help Intel win.
"Building a better world is our business and we feel a sense of responsibility to lead the

industry in diversity and inclusion. When every employee feels they have a voice and sense
of belonging, Intel can be more innovative, agile, and competitive to achieve our greatest
ambitions." - said Bob Swan, Intel CEO.

Figure 1.3. Intel evolution logo
(Source: www.soco.intel.com)
1.1.4. Intel values
 Customer Orientation:
Listen and respond to the customers, suppliers and stakeholders is the top priority at
Intel. All employees clearly communicate mutual intentions as well as deliver innovative
and competitive products and services.
 Discipline:
At Intel, all employees always respect the motto: “Conduct business with
uncompromising integrity and professionalism. Ensure a safe, clean, and injury-free
workplace. Make and meet commitments”.

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 Results orientation:
Set challenging and competitive goals are two important factors to help Intel drive
forward. By focusing on output as well as constructively confront and solve problems, Intel
day by day makes its customer satisfied.
 Risk taking:
Risk taking is the highest challenge that Intel has to do, if the company wish to be the
leader in semiconductor industry. Intel always embrace a growth mindset in everything the
corporate does as well as encourage and reward informed risk-taking.
 An Inclusive, Great place to work:

Create an inclusive environment that fosters diversity. Intel treat one another equally,
with dignity and respect. Be open and promote a challenging work environment that
develops Intel workforce. Work as a team with respect and trust for each other, so all win
and have fun.
 Quality:
Quality is Intel standard. By achieving the highest standards of excellence and
continuously learn and develop, Intel brings the highest quality product to its customer
pride in our work.

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Figure 1.4. Home of Intel Vietnam
(Source: www.saigonsite.intel.com)
1.1.5. Intel Vietnam workforce
Vietnam site employees continues growing year on year, in 2019 full time employee
increases to 31,5%, Contract employee increases to 41,7%, Contingent worker (CW) MT
increases to 35,2% compared to 2018 to support site ramp.
 Young workforce, 97% Gen Y+Z (Gen X: 1960-1979, Gen Y: 1980-1994, Gen Z:
after 1995). Intel set footprint in Vietnam for more than 10 years, they really ramp
over the last 4 years with more than 200% increase in headcount. In Vietnam, Intel
has young, dynamic workforce with 97% population is gen Y & Z with average age
of 28. Their workforce is full of energy & hungry to learn.
 Scalable workforce (CW technician) account for approximately 29% in VNAT
population. Currently Intel Vietnam has diversified workforce with total more than
3.900 Headcounts including Regular full-time, Intel Contract employee, Intern and
Contingent worker. While this diverse workforce provide flexibility to support their
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business growth, it’s also challenging for them as they could not engage directly
what they need to work through global system management and a lot of efforts have
been put for workforce harmonization.
Intel overall diversity ratio is 33% and 31% Tech female while market availability is
15%. At ATM level they strive for 40% and Human resources team is working closely with
Public Affairs to get them to achieve their goal.

Figure 1.5. Year on Year Headcount growth at Intel Vietnam
(Source: Human Resources department)
1.2. Business field of Intel Products Vietnam Co., Ltd
Intel Products Vietnam is a factory, which focuses on Assembly and Test. At Intel
Vietnam, the company produces 5 main production lines to support Intel’s tactic
worldwide.

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Platform controller hub (PCH):
PCH is a family of Intel chipsets. It was integrated into the CPU structure while the
platform took over the remaining functions. PCH permits the user to address the ultimate
problematic performance bottleneck between the processor and the hub.
System on a chip (SoC):
SOC is an integrated circuit or known as Chip that integrates all components of a
computer or other electronic systems. These components always consist of a central

processing unit (CPU), large memory (TCU), input/output ports (bond) and unlimited
secondary storage to hold a large amount of data. It includes all components on a single
substrate or microchip with the size of a coin. It contains digital, bandwidth, mixed-signal,
and often radio frequency signal processing functions, also it will just be considered as an
"Application processor".
Central processing unit (CPU) Desktop:
CPU also called a central processor or main processor, is the electronic circuitry within
a computer that build a computer program that executes instruction for the graphic. It
includes a multi-processor that holds memory, marginal interfaces, and other components
of a model chip. It is used for Desktop computers.
Central processing unit (CPU) Mobile:
CPU Mobile is found on portable devices such as Cellphones or Laptops. It is
commonly kept in a smaller package of a chip, but more importantly, so as to run faster and
cooler, it uses less voltage than its desktop counterpart function and has more sleeping mode
capabilities.
Flip Chip Chip Scale Package (FCCSP):
FCCSP is a small circuitry package chip. In order to qualify as chip scale, the package
must have an area no greater than 1,3 times that of the central die and it must be a singledie, directed in surface mountable package. Another criteria that is commonly applied to
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