Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
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14:23 28/09/2023
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
NHÀCỦATƠI CÁCKHỐHỌCCỦATƠI HỌCKỲ2NĂMHỌC20162017
Á
Ớ
Ậ
Ậ
À Ậ Ơ
Nhóm060708CLCKiếntrúcmáytính
vàhợpngữ
Bắtđầuvàolúc Saturday,8April2017,1:12PM
State
Finished
Kếtthúclúc Saturday,8April2017,1:22PM
Thờigianthực 10phút13giây
hiện
Điểm
22,25/22,25
Điểm
10,00outof10,00(100%)
Câuhỏi1
Given8bitfloatingpointbinaryformat:
Đúng
1(sign)+3(exponent)+4(mantissa)
Đạtđiểm1,00
Convertthe8bitfloatingpointnumber57(inhex)todecimal.
trên1,00
Đặtcờ
Câuhỏi2
Đúng
Answer: 5,75
Asystemprogrammerneedstodivide6247by300(decimal).Instructhimtocodeindebug
(numbermustbeinhex)andtheresultshouldbe?
Đạtđiểm1,50
trên1,50
Đặtcờ
Step1:
MOVAX,E799
Step2:
CDW
Step3:
MOVBX,012C
Step4:
IDIVBX
AX=
FFEC
DX=
FF09
Result:
Youransweriscorrect.
Đạtđiểm0,50
Câuhỏi3
trên0,50
Đúng
Đặtcờ
Writemaskbyte(inhex)toclearthelower4bitofabytevaluewithANDinstruction.
F0
Answer:
Câuhỏi4
Toisolateoneormorebitsinabytevalue,use__________instruction.
Đúng
Đạtđiểm0,50
trên0,50
Đặtcờ
Selectone:
OR
NOT
AND
XOR
about:blank
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Đạtđiểm0,50
Câuhỏi3
trên0,50
Đúng
Đặtcờ
Writemaskbyte(inhex)toclearthelower4bitofabytevaluewithANDinstruction.
F0
Answer:
Câuhỏi4
Toisolateoneormorebitsinabytevalue,use__________instruction.
Đúng
Đạtđiểm0,50
trên0,50
Đặtcờ
Selectone:
OR
NOT
AND
XOR
Youransweriscorrect.
Câuhỏi5
Đúng
Đạtđiểm0,25
trên0,25
EAXnowstoreda32bitIPaddressofahost.ThenetworkID(netID)is20bitandcanbe
extractedfromIPbyteandingwitha32bitmask.WritecorrectinstructiontoextractnetIDfrom
EAXregister.
Note:Immediatevaluemustbewritteninhex
Đặtcờ
Answer: andEAX,FFFFF000
Câuhỏi6
Thefollowingsequenceofinstructionsareexecuted.Whatisthecorrectvaluesatwatchpoint?
Đúng
MOVAX,67FE
Đạtđiểm1,00
MOVBX,AX
trên1,00
Đặtcờ
MOVCL,BH
MOVCH,BL
watchpoint:
CX=
FE67
BX=
67FE
Youransweriscorrect.
Câuhỏi7
Đúng
Thefollowingsequenceofinstructionsareexecuted.Whatisthecorrectvalueofflagbitsatwatch
point?
Đạtđiểm1,00
MOVEAX,12AE
trên1,00
SUBEAX,12AF
Đặtcờ
watchpoint:
Zeroflag(OF)=
signflag
reset
set
Carryflag(CF)=
set
Youransweriscorrect.
Câuhỏi8
Đúng
Physicaladdressofthestackpointeris2DA82,stacksegmentlocatedat1DAE.Computerthe
valueofSPregister?
Đạt điểm 1 00
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Đặtcờ
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
watchpoint:
Zeroflag(OF)=
signflag
reset
set
Carryflag(CF)=
set
Youransweriscorrect.
Câuhỏi8
Đúng
Physicaladdressofthestackpointeris2DA82,stacksegmentlocatedat1DAE.Computerthe
valueofSPregister?
Đạtđiểm1,00
trên1,00
Answer: FFA2
Đặtcờ
Câuhỏi9
Matchthefollowinghexadecimalnumberstooctal
Đúng
Đạtđiểm1,00
E7
347
6E
156
A9
251
trên1,00
Đặtcờ
Youransweriscorrect.
Câuhỏi10
Enterdebugcommandtofill256bytesindatasegmentstartingfrom100withvalue0D
Đúng
Đạtđiểm1,00
trên1,00
Answer: f1001FF0D
Đặtcờ
Câuhỏi11
Given8bitfloatingpointbinaryformat:
Đúng
1(sign)+3(exponent)+4(mantissa)
Đạtđiểm1,00
Convertthe8bitfloatingpointnumberE7(inhex)todecimal.
trên1,00
Đặtcờ
Câuhỏi12
Answer: 11,5
Matchthecorrectanswerforbinaryoperationsontheleft
Đúng
Đạtđiểm1,50
1111111111
1111000
1100000
1100111111 1101010
1010101+10101
1010001
trên1,50
Đặtcờ
1010110101
1110011+11001 10001100
1111111+11111
10011110
Youransweriscorrect.
about:blank
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
trên1,50
Đặtcờ
1100000
1100111111 1101010
1010101+10101
1010001
1010110101
1110011+11001 10001100
1111111+11111
10011110
Youransweriscorrect.
Câuhỏi13
Convertthefollowingbinarynumberstohexadecimal
Đúng
Đạtđiểm1,00
10101001
A9
01101110
6E
11100101
E5
11100111
E7
trên1,00
Đặtcờ
Youransweriscorrect.
Câuhỏi14
Đúng
Thefollowingsequenceofinstructionsareexecuted.WhatisthecorrectvalueofCFandOFat
watchpoint?
Đạtđiểm1,00
MOVAX,140h
trên1,00
MOVCX,8h
Đặtcờ
MULCX
watchpoint:
CF=
reset
OF=
reset
Youransweriscorrect.
Câuhỏi15
Totestonebitinabytevaluewithoutdestructingthebyte,use__________instruction.
Đúng
Đạtđiểm0,50
trên0,50
Đặtcờ
Selectone:
NOT
TEST
AND
OR
Youransweriscorrect.
Câuhỏi16
Givenarowofmemoryimageindebug
Đúng
0AE8:01201396D0E0D0E0A21E99803E2099007524
Đạtđiểm1,00
Initially,AX=BX=CX=DX=0,SI=121
trên1,00
about:blank
WhatarevalueofCX,DXafterexecutionofthefollowinginstructions?
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Đạtđiểm0,50
trên0,50
Đặtcờ
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Selectone:
NOT
TEST
AND
OR
Youransweriscorrect.
Câuhỏi16
Givenarowofmemoryimageindebug
Đúng
0AE8:01201396D0E0D0E0A21E99803E2099007524
Đạtđiểm1,00
Initially,AX=BX=CX=DX=0,SI=121
trên1,00
Đặtcờ
WhatarevalueofCX,DXafterexecutionofthefollowinginstructions?
MOVDX,[SI]
MOVCX,[SI+2]
DX=
D096
CX=
D0E0
Youransweriscorrect.
Câuhỏi17
Selectcorrectmatchforregistervaluesatwatchpoints:
Đúng
MOVAX,152D
Đạtđiểm1,00
ADDAX,003F
trên1,00
Đặtcờ
watchpoint#1:
ADDAH,10
watchpoint#2:
......
watchpoint#2:
AH=25
watchpoint#1:
AL=6C
Youransweriscorrect.
Câuhỏi18
Đúng
Đạtđiểm1,00
Amemorylocationlocatedinextrasegmentwhichnowhasvalueof564F.Thismemorymanaged
byES:SIregisterpair.SInowpointsto905F.Computethephysicaladdressofthismemory
location
trên1,00
Đặtcờ
Câuhỏi19
Answer: 5F54F
SelectcorrectmatchforALandcarryflagatwatchpoint#1:
Đúng
MOVBL,8C
Đạtđiểm1,00
MOVAL,7E
trên1,00
Đặtcờ
ADDAL,BL
watchpoint#1:
......
Carryflag
set
0A
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g
Đạtđiểm1,00
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
location
trên1,00
Đặtcờ
Câuhỏi19
Answer: 5F54F
SelectcorrectmatchforALandcarryflagatwatchpoint#1:
Đúng
MOVBL,8C
Đạtđiểm1,00
MOVAL,7E
trên1,00
ADDAL,BL
Đặtcờ
watchpoint#1:
......
Carryflag
set
AL
0A
Youransweriscorrect.
Câuhỏi20
Convertthe32bitfloatingpointnumberC4361000(inhex)todecimal.
Đúng
Đạtđiểm1,00
Answer: 728,25
trên1,00
Đặtcờ
Câuhỏi21
Whichofthefollowinginstructionsarenotlegaladdressing?
Đúng
Đạtđiểm1,00
trên1,00
Selectoneormore:
MOVAX,[DI]
MOVAX,[BX+SP]
Đặtcờ
MOVAX,[SP+1]
MOVCX,[SI]
Youransweriscorrect.
Câuhỏi22
Đúng
ComputethephysicaladdressofstacktopifstackpointerisFFAEandstacksegmentlocatedat
1DAE
Đạtđiểm1,00
trên1,00
Answer: 2DA8E
Đặtcờ
Câuhỏi23
Signextendnumber10110101(8bitbinary)to16bit
Đúng
Đạtđiểm0,50
trên0,50
Answer: 1111111110110101
Suite du document ci-dessous
Đặtcờ
Découvre plus de :
Kiến trúc máy tính _ hợp ngữ 091202
247 documents
Accéder au cours
about:blank
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Answer: 1111111110110101
Đạtđiểm0,50
trên0,50
Suite du document ci-dessous
Đặtcờ
Découvre plus de :
Kiến trúc máy tính _ hợp ngữ 091202
247 documents
Accéder au cours
8
KTQT Lần 1 năm 2020 - bài tập ơn mơn kiến trúc máy tính và
hợp ngữ cuối kì
Kiến trúc máy tính _ hợp ngữ
100% (4)
Chapter-01-kiến trúc máy tính và hợp ngữ
37
Kiến trúc máy tính _ hợp ngữ
100% (2)
Bài Thi Cuối Kỳ Môn Kiến Trúc Máy Tính và Hợp Ngữ
12
Kiến trúc máy tính _ hợp ngữ
100% (4)
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
165
Kiến trúc máy tính _ hợp ngữ
92% (13)
Tài liệu khơng có tiêu đề
7
Câuhỏi24
Đạtđiểm1,00
Đặtcờ
100% (2)
Thefollowingsequenceofinstructionsareexecuted.WhatisthecorrectvalueofAX,CX,DXat
watchpoint?
BỘ
ƠN KTMT 2 - đề thi
Đúng
trên1,00
Kiến trúc máy tính _ hợp ngữ
146
MOVAX,30
MOVCX,FFFF
Kiến
trúc máy tính _ hợp ngữ
100% (3)
MULCX
watchpoint:
about:blank
CX=
FFFF
AX=
FFD0
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Câuhỏi24
Đạtđiểm1,00
Đặtcờ
Thefollowingsequenceofinstructionsareexecuted.WhatisthecorrectvalueofAX,CX,DXat
watchpoint?
BỘ
ÔN KTMT 2 - đề thi
Đúng
trên1,00
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
146
MOVAX,30
MOVCX,FFFF
Kiến
trúc máy tính _ hợp ngữ
100% (3)
MULCX
watchpoint:
CX=
FFFF
AX=
FFD0
DX
002F
Youransweriscorrect.
Finishreview
about:blank
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
31/5/2019
Bài Thi Cuối Kỳ Mơn Kiến Trúc Máy Tính và Hợp Ngữ
Thi Online KTMT&HN nhóm Chẵn
Started on
State
Completed on
Time taken
Question
Complete
about:blank
1
Friday, 31 May 2019, 1:14 PM
Finished
Friday, 31 May 2019, 2:23 PM
1 hour 8 mins
Write mask byte (in hex) to set bit 6th, 4th of a byte value with OR instruction (LSB is the 1st
bit).
9/166
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
31/5/2019
Bài Thi Cuối Kỳ Mơn Kiến Trúc Máy Tính và Hợp Ngữ
Thi Online KTMT&HN nhóm Chẵn
Started on
State
Completed on
Time taken
Question
1
Complete
Friday, 31 May 2019, 1:14 PM
Finished
Friday, 31 May 2019, 2:23 PM
1 hour 8 mins
Write mask byte (in hex) to set bit 6th, 4th of a byte value with OR instruction (LSB is the 1st
bit).
Marked out of
Answer: 3
0.50
Question
2
Complete
Marked out of
1.00
Consider the following assembly instruction sequence
XOR BX, BX
CMP DL, 5
JLE a_label
CMP DL,17h
JGE a_label
MOV BX, 10h
a_label:
INC BX
watch point:
...
Choose correct value of BX register at watch point for different value of DL?
Question
3
DL=10
01h
DL=17h
28h
DL=0FFh
11h
DL=0Ah
6
Choose correct features for SRAM and DRAM
Complete
Marked out of
DRAM
Slower access time, cheaper cost per bit, can manufacture with larger size
SRAM
Faster access time, cheaper cost per bit, can manufacture with larger size
1.00
Question
4
Complete
Marked out of
1.00
Consider a 16-bit microprocessor, with a 16-bit external data bus, driven by an 10-MHz input clock.
Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles.
What is the maximum data transfer rate across the bus that this microprocessor can sustain?
Select one:
1 MB/s
10 MB/s
5 MB/s
4 MB/s
Question
about:blank
5
the memory stack area of a program shown in figure
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Question
4
Complete
Marked out of
1.00
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Consider a 16-bit microprocessor, with a 16-bit external data bus, driven by an 10-MHz input clock.
Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles.
What is the maximum data transfer rate across the bus that this microprocessor can sustain?
Select one:
1 MB/s
10 MB/s
5 MB/s
4 MB/s
Question
5
the memory stack area of a program shown in figure
Complete
Marked out of
1.00
The value of SP register is 1D50. What is the value of SP follows the execution of PUSH SI
Answer: 1D4F
Question
6
Not answered
Marked out of
1.50
Calculate MIPS rate for this program
Given:
Answer:
Question
7
Choose the correct structure of memory chip as shown below
Complete
Marked out of
1.00
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Question
7
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Choose the correct structure of memory chip as shown below
Complete
Marked out of
1.00
Note:
DQ: Data pinout
Select one:
DRAM 2Kx8-bit
SRAM 2Kx8-bit
SRAM 1Kx16-bit
DRAM 1Kx16-bit
Question
8
Complete
Marked out of
1.00
What is the correct value of SI, AL (in hex) at watch point:
01:
MOV SI, 300h
02:
MOV AL, 10h
03:
MOV CX, 7
04: Loop_label:
05:
MOV [SI], AL
06:
ADD AL,10h
07:
INC SI
08:
LOOP Loop_label
watch point:
Question
9
Complete
Marked out of
1.00
AL =
307h
SI
308h
The principle of cache memory relies on key features: locality of reference which involves spatial and
temporal locality. Match the definition to keywords on the left
Spatial
locality
the tendency of execution to involve a number of memory locations that are clustered
Temporal
locality
the tendency for a processor to access memory locations that have been used recently
tendency to use large cache and prefetch mechanism
Question
10
For memory hierarchy below, which relationship hold when moving downward
Complete
Marked out of
1.00
about:blank
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
tendency to use large cache and prefetch mechanism
Question
10
For memory hierarchy below, which relationship hold when moving downward
Complete
Marked out of
1.00
Select one or more:
Decreasing cost per bit
Decreasing frequency of access by the processor
Increasing access time
Increasing capacity
the processor accesses more often
Question
11
Given 8-bit floating-point binary format:
Complete
1 (sign) + 3 (exponent) + 4 (mantissa)
Marked out of
Convert the 8-bit floating point number 68 (in hex) to decimal.
1.00
Answer: 12
Question
12
Complete
Marked out of
1.00
In computer organization, the CPU transfer rate is much higher than that of memory. It is easy to match
performance of these components by:
Select one:
increase the bus speed
increase I/O speed
producing faster memory module
Introducing cache memory
Question
13
The instruction that loads the AH register with the lower byte of the flag register is
Complete
Marked out of
Select one:
SAHF
0.50
AH
LAHF
PUSHF
Question
14
Which are correct about 32 bit index registers of IA-32 processors:
Complete
Select one or more:
about:blank
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Question
13
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
The instruction that loads the AH register with the lower byte of the flag register is
Complete
Marked out of
Select one:
SAHF
0.50
AH
LAHF
PUSHF
Question
14
Which are correct about 32 bit index registers of IA-32 processors:
Complete
Marked out of
Select one or more:
ESH,EDH: 16 bit pointers to higher memory above 1M
1.50
SI: 16 bit pointer to source memory in data movement instructions
ESI: 32 bit pointer to source memory in data movement instructions
EDI: 32 bit pointer to destination memory in data movement instructions
DI: 16 bit pointer to destination memory in data movement instructions
Question
15
The following sequence of instructions are executed. What is the correct value of flag bits at watch point?
Complete
MOV AL, 0F
ADD AL, F1
Marked out of
1.00
Question
watch point:
16
Zero flag (OF) =
set
Carry flag (CF) =
set
What is the correct sequence of instruction cycle?
Complete
Marked out of
Step 6
Store result
Step 1
Fetch opcode
Step 2
Calculate operand address
Step 3
Fetch operand
Step 5
Decode
Step 4
Execution
1.20
Question
17
To encrypt a byte value, use __________ instruction.
Complete
Marked out of
Select one:
AND
0.50
NOT
OR
XOR
Question
18
Which of the following instructions are not valid?
Complete
Select one or more:
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Question
17
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
To encrypt a byte value, use __________ instruction.
Complete
Marked out of
Select one:
AND
0.50
NOT
OR
XOR
Question
18
Which of the following instructions are not valid?
Complete
Marked out of
Select one or more:
MOV AX, SI
0.50
MOV AX, [BP+2]
MOV DS, B800h
MOV SP, SS:[SI+2]
Question
19
8088 is 16 bit processor, the maximum addressable memory is:
Complete
Marked out of
Select one:
640K
0.50
64M
640M
1024K
Question
20
Complete
Select correct definition of seek time, rotational delay, access time, transfer time for hard drives with
moveable-head system:
Marked out of
1.00
Question
21
rotational delay
access time + settle time
seek time
time for the head to settle at the request track
access time
transfer time
Which of the following instructions are not legal addressing?
Complete
Marked out of
Select one or more:
MOV AX, [SP+1]
1.00
MOV AX, [DI]
MOV CX, [SI]
MOV AX, [BX+SP]
Question
22
A memory chip has 12 address pins, determine the maximum memory words of this chip?
Complete
Marked out of
Select one:
2048
1.00
4096
2048K
4000
Question
23
Convert 0.1015625 to IEEE 32-bit floating point format (1 sign+ 8 exponent + 23 mantissa)
Complete
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Question
22
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
A memory chip has 12 address pins, determine the maximum memory words of this chip?
Complete
Marked out of
Select one:
2048
1.00
4096
2048K
4000
Question
23
Convert 0.1015625 to IEEE 32-bit floating point format (1 sign+ 8 exponent + 23 mantissa)
Complete
Marked out of
Answer: 3DD00000
1.00
Question
24
Structural components of computer include:
Complete
Marked out of
Select one or more:
Memory
1.00
Central processing unit
I/O
DMA
Interrupt
System interconnection
Question
25
Select the correct sequence of instructions to compute -1024/128 (all values are in hex).
Complete
Marked out of
Step 1:
MOV AX,FC00
Step 2:
IDIV CX
Step 3:
MOV CX,80
Step 4:
CWD
1.00
Question
26
Sign-extend number 1011 0101 (8-bit binary) to 16-bit
Complete
Marked out of
Answer: B5
0.50
Question
27
Part of computer memory is shown in figure
Complete
Marked out of
1.00
What is the value of AX register after instruction MOV AX, [1D4B] executed
Answer: 5A2D
Question
28
Choose correct RAID volume definitions for a request 2T storage.
Complete
S
about:blank
d
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Question
27
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Part of computer memory is shown in figure
Complete
Marked out of
1.00
What is the value of AX register after instruction MOV AX, [1D4B] executed
Answer: 5A2D
Question
28
Choose correct RAID volume definitions for a request 2T storage.
Complete
Marked out of
2.00
Question
29
Spanned
Volume
2T HDD + more HDDs to extend storage, no fault tolerance, data lost when one HDD fails
RAID5
Volume
At least 3 x 2T HDDs, fault-tolerance, no data lost, no down-time
RAID 1 Mirror
volume
2 x 2T HDDs are needed, no data lost when the primary storage fails
RAID 0 Striped
volume
2 x 1T HDDs are needed, enhance data transfer, no fault tolerance, data lost when one HDD fails
Select correct level for contemporary computer multilevel machine
Complete
Marked out of
Level 1
Operating system level
Layer 4
Microarchitecture level
Level 3
Digital logic level
Level 2
Digital logic level
Level 5
Internet
Level 0
Assembly Language level
Level 6
High level programming language
1.00
Question
30
the instruction, CMP to compare source and destination operands by __________
Complete
Marked out of
Select one:
dividing
0.50
comparing
adding
subtracting
Question
31
Complete
Write mask byte (in hex) to clear bit 2nd, 3rd, 5th of a byte value with AND instruction (LSB is
1st bit).
Marked out of
Answer: 5
0.50
Question
32
To evaluate processor performance, the following indicators and formulas are used:
Complete
Marked out of
1.00
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
subtracting
Question
31
Complete
Write mask byte (in hex) to clear bit 2nd, 3rd, 5th of a byte value with AND instruction (LSB is
1st bit).
Marked out of
Answer: 5
0.50
Question
32
To evaluate processor performance, the following indicators and formulas are used:
Complete
Marked out of
1.00
Which of the following system attributes affects cycle time
t
Select one or more:
Compiler technology
Cache and memory hierarchy
Processor implementation
Instruction set architecture
Question
33
Convert the 32-bit floating point number C4361000 (in hex) to decimal.
Not answered
Marked out of
Answer:
1.00
Question
34
Which is correct about dual-layer DVD?
Complete
Marked out of
Select one:
contains layers on both sides of the disk for writing data to
1.00
the same as double-sided DVD
contains two layers on a single side for writing data to
DVD drives has double laser head for reading from or writing to this disk
Question
35
Complete
The following sequence of instructions are executed. What is the correct value of AX, CX, DX at watch
point?
Marked out of
MOV AX,0020
1.00
MOV CX,0010
MUL CL
watch point:
about:blank
AX =
0200
DX
0000
CX =
0010
18/166
14:23 28/09/2023
Question
35
Complete
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
The following sequence of instructions are executed. What is the correct value of AX, CX, DX at watch
point?
Marked out of
MOV AX,0020
1.00
MOV CX,0010
MUL CL
watch point:
Question
36
Complete
Marked out of
0.50
AX =
0200
DX
0000
CX =
0010
In multiplication instruction, the upper half of the result is nonzero implies which state of Carry flag and
Overflow flag?
Select one or more:
CF=0
OF=1
OF=0
CF=1
Question
37
Which statements are correct for HDDs?
Complete
Marked out of
Select one or more:
a. Head, Track, Sector are key parameters for access data on hard disk
1.00
b. Head, Track, Cylinder are key parameters for access data on hard disk
c. Bits are stored on tracks
d. Bits are store randomly on disk surfaces
Question
38
Complete
Consider a magnetic disk drive with 8 surfaces, 512 tracks per surface, and 64 sectors per track. Sector
size is 1 kB. What is the disk capacity
Marked out of
Answer: 16.3
1.00
Question
39
KB
Which are the correct inputs for XLAT instruction
Complete
Marked out of
Select one or more:
look-up index must be loaded into AL
0.50
look-up index must be loaded into DL
DS:[BX] pointed to look-up table
Question
DS:[SI] pointed to look-up table
40
Not answered
Marked out of
1.00
Calculate the execution time for this program.
Given:
about:blank
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
DS:[BX] pointed to look-up table
Question
DS:[SI] pointed to look-up table
40
Not answered
Marked out of
1.00
Calculate the execution time for this program.
Given:
Answer:
Question
41
In multiplication instruction, when the source operand is 8 bit, _________ will be multiplied with source.
Complete
Marked out of
Select one:
BX
0.50
AL
AX
Whatever general purpose register
Question
42
Which are the correct actions for LODSW string operation if DF is reset (=0)
Complete
Marked out of
Select one or more:
Load 16-bit value at memory location pointed by DS:[SI] into AX
0.50
decrease DI by 2
Load 16-bit value at memory location pointed by ES:[DI] into AX
increase SI by 2
Question
43
Complete
A system programmer needs to compute 449/2+358/4 (decimal). Instruct him to code in debug (number
must be in hex) with the least number of instruction counts.
Marked out of
1.50
about:blank
Step 1:
MOV BX,AX
Step 2:
ADD AX,BX
Step 3:
MOV CL,2
Step 4:
ADD AX,166
20/166
14:23 28/09/2023
Question
43
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
A system programmer needs to compute 449/2+358/4 (decimal). Instruct him to code in debug (number
must be in hex) with the least number of instruction counts.
Complete
Marked out of
1.50
Step 1:
MOV BX,AX
Step 2:
ADD AX,BX
Step 3:
MOV CL,2
Step 4:
ADD AX,166
Step 5:
Step 6:
Question
44
SHL AX,CL
SHR AX,CL
For better speed, in CPU design, engineers make use of the following techniques:
Complete
Select one or more:
Marked out of
Speculative execution
1.00
Branch prediction
Pipelining
Faster CPU internal bus
Question
45
Which ones are not correct for static RAM?
Complete
Select one or more:
Marked out of
Cheaper than dynamic RAM because simpler chip controller
1.00
Cost per bit is lower than dynamic RAM
faster than dynamic RAM because they are made from capacitor
Cost per bit is higher than dynamic RAM
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Thi Online KTMT&HN nhóm lẻ
Started on
State
Completed on
Time taken
Question
1
Friday, 31 May 2019, 1:15 PM
Finished
Friday, 31 May 2019, 2:25 PM
1 hour 10 mins
For better speed, in CPU design, engineers make use of the following techniques:
Complete
Select one or more:
about:blank
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Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Thi Online KTMT&HN nhóm lẻ
Started on
State
Completed on
Time taken
Question
1
Friday, 31 May 2019, 1:15 PM
Finished
Friday, 31 May 2019, 2:25 PM
1 hour 10 mins
For better speed, in CPU design, engineers make use of the following techniques:
Complete
Marked out of
Select one or more:
Speculative execution
1.00
Branch prediction
Pipelining
Faster CPU internal bus
Question
2
What is the correct sequence of instruction cycle?
Complete
Marked out of
1.20
Question
3
Step 3
Fetch operand
Step 6
Store result
Step 4
Calculate operand address
Step 1
Fetch opcode
Step 5
Execution
Step 2
Decode
Part of computer memory is shown in figure
Complete
Marked out of
1.00
What is the value of AX register after instruction MOV AX, [1D4B] executed
Answer: 5A2D
Question
4
the memory stack area of a program shown in figure
Complete
Marked out of
1.00
The value of SP register is 1D50. What is the value of SP follows the execution of PUSH SI
Answer: 1D4F
Question
5
The instruction that loads the AH register with the lower byte of the flag register is
Complete
M
k d
about:blank
t f
Select one:
22/166
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Question
4
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
the memory stack area of a program shown in figure
Complete
Marked out of
1.00
The value of SP register is 1D50. What is the value of SP follows the execution of PUSH SI
Answer: 1D4F
Question
5
The instruction that loads the AH register with the lower byte of the flag register is
Complete
Marked out of
Select one:
LAHF
0.50
PUSHF
SAHF
AH
Question
6
Complete
Select correct definition of seek time, rotational delay, access time, transfer time for hard drives with
moveable-head system:
Marked out of
1.00
Question
7
rotational delay
transfer time
access time
seek time + rotational delay
seek time
time for the sector in the request track to reach the head
For memory hierarchy below, which relationship hold when moving downward
Complete
Marked out of
1.00
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Question
7
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
For memory hierarchy below, which relationship hold when moving downward
Complete
Marked out of
1.00
Select one or more:
Decreasing frequency of access by the processor
Increasing capacity
Decreasing cost per bit
Increasing access time
the processor accesses more often
Question
8
Sign-extend number 1011 0101 (8-bit binary) to 16-bit
Complete
Marked out of
Answer: B5
0.50
Question
9
Complete
Marked out of
1.00
In computer organization, the CPU transfer rate is much higher than that of memory. It is easy to match
performance of these components by:
Select one:
increase the bus speed
increase I/O speed
Introducing cache memory
producing faster memory module
Question
10
Choose correct RAID volume definitions for a request 2T storage.
Complete
Marked out of
2.00
about:blank
RAID 0 Striped
volume
2 x 1T HDDs are needed, enhance data transfer, no fault tolerance, data lost when one HDD fails
RAID 1 Mirror
volume
2 x 1T HDDs are needed, no data lost when the primary storage fails
RAID5
Volume
2T HDD + more HDDs to extend storage, no fault tolerance, data lost when one HDD fails
Spanned
Volume
At least 3 x 2T HDDs, fault-tolerance, no data lost, no down-time
24/166
14:23 28/09/2023
Question
10
Đề thi kiến trúc máy tính và hợp ngữ tổng hợp
Choose correct RAID volume definitions for a request 2T storage.
Complete
Marked out of
2.00
Question
11
RAID 0 Striped
volume
2 x 1T HDDs are needed, enhance data transfer, no fault tolerance, data lost when one HDD fails
RAID 1 Mirror
volume
2 x 1T HDDs are needed, no data lost when the primary storage fails
RAID5
Volume
2T HDD + more HDDs to extend storage, no fault tolerance, data lost when one HDD fails
Spanned
Volume
At least 3 x 2T HDDs, fault-tolerance, no data lost, no down-time
Which are the correct inputs for XLAT instruction
Complete
Marked out of
Select one or more:
look-up index must be loaded into DL
0.50
DS:[BX] pointed to look-up table
DS:[SI] pointed to look-up table
look-up index must be loaded into AL
Question
12
Complete
The principle of cache memory relies on key features: locality of reference which involves spatial and
temporal locality. Match the definition to keywords on the left
Marked out of
tendency to use large cache and prefetch mechanism
1.00
Question
13
Complete
Spatial
locality
the tendency for a processor to access memory locations that have been used recently
Temporal
locality
the tendency of execution to involve a number of memory locations that are clustered
The following sequence of instructions are executed. What is the correct value of AX, CX, DX at watch
point?
Marked out of
MOV AX,0020
1.00
MOV CX,0010
MUL CL
watch point:
Question
14
AX =
0200
DX
00FF
CX =
0010
Which statements are correct for HDDs?
Complete
Marked out of
Select one or more:
a. Head, Track, Sector are key parameters for access data on hard disk
1.00
b. Bits are stored on tracks
c. Bits are store randomly on disk surfaces
d. Head, Track, Cylinder are key parameters for access data on hard disk
Question
15
In multiplication instruction, when the source operand is 8 bit, _________ will be multiplied with source.
Complete
Select one:
about:blank
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