The Study of Ultra-thin Diffusion Barriers in Copper
Interconnect System
HO CHEE SHENG
(M.Eng), NUS
Supervisors: Prof Lu Li
Assoc. Prof. Thomas Osipowicz
Assoc. Prof. Christina Lim
A THESIS SUBMITTED
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY
(ENGINEERING)
DEPARTMENT OF MECHANICAL ENGINEERING
NATIONAL UNIVERSITY OF SINGAPORE
2009
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i
ACKNOWLEDGEMENTS
This project would not have been possible without the joint effort between the
National University of Singapore (NUS) and Chartered Semiconductor Manufacturing
(CSM). I am forever grateful for this wonderful opportunity to take on a collaboration
research project with CSM, which has allowed me to venture into the wide and
interesting field of the back-end microelectronics system. Throughout these 4 years, I
was given the chance to be exposed to many leading technologies and to work on
advance characterization tools in nuclear microscopy in the course of my studies at
the Centre for Ion Beam Applications (CIBA) in the Physics Department, NUS.
Working with my mentors in CSM, Dr Zhang Beichao and Dr. Alex See and my
supervisors in NUS, Associate Professor Thomas Osipowicz (Physics) Professor Lu
Li (Mechanical Engineering) and Associate Professor Christina Lim (Mechanical
Engineering), has proved to be a rewarding experience. I am particularly grateful to
Associate Professor Thomas Osipowicz for his valuable ideas, advices and his
devotion to help me in the various aspects of my project, and also to my fellow lab
mate and good friend Chan Taw Kuei for his company and support throughout these 4
years in CIBA and for all the valuable help, advises, meaningful as well as non-
constructive discussions we have during the course of my study.
I would like to thank Mr Choo Theam Fook for his invaluable help with every
conceivable accelerator related and logistical problems, which were all solved by his
expert knowledge and magical touch, as well as to the wonderful people at CIBA,
which made my stay very pleasant indeed. Heartfelt thanks go out to my other
mentors and friends in CSM: Dr Lap Chan, Dr Ng Chee Mang, Liew San Leong and
the wonderful people of Special Project group (Batch 6 through 12). All the technical
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ii
assistance from the staffs of the Material Science Lab are greatly appreciated. The
help and encouragement I received from Dr. Lap Chan and Dr Ng Chee Mang will
always be remembered.
Most importantly, I would like to thank my parents and my beloved wife, Winnie for
their encouragement and support throughout my candidature.
Ho Chee Sheng, Brandon
Dec 2008
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iii
LIST OF PUBLICATION
1. Crystallographic orientation of Ta/TaN bilayer and its effect on seed and
bulk Cu <111> formation.
Advanced Metallization Conference Proceedings XX , MRS. 657-662 (2004)
C. S. Ho, S.L. Liew, A. See, C.Y.H. Lim
2. Quantifying adhesion strength for Cu/Ta barriers/ FTEOS dielectric
using Modified Edge Lift Off Test.
Advanced Metallization Conference Proceedings XX, MRS. 707-712 (2004)
C. S. Ho, C. Yong, B.C. Zhang, C.Y.H. Lim
3. Quantitative Studies of Copper Diffusion through Ultra-thin ALD
Tantalum Nitride barrier films by High resolution-RBS
Advanced Metallization Conference Proceedings XXIII, MRS. 95-100 (2007)
C.S. Ho, S.L. Liew, T.K. Chan, P. Malar, T. Osipowicz, L. Lu, C.Y.H. Lim
3. Growth of high quality Er–Ge films on Ge(001) substrates by
suppressing oxygen contamination during germanidation annealing
Thin Solid Films. 4, 81-85, (2006).
S.L. Liew, B. Balakrisnan, S.Y. Chow, M.Y. Lai, W.D. Wang, K.Y. Lee,
C.S. Ho, T. Osipowicz and D.Z. Chi.
4. The CIBA high resolution RBS facility
Nuclear Instruments and Methods in Physics Research B 249 915–917,
(2006).
T. Osipowicz, H.L. Seng, T.K. Chan, C.S. Ho
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iv
5. Probing the ErSi
1.7
Phase Formation by Micro-Raman Spectroscopy
J. Electrochemical Society, Vol. 154, H361-H364, (2007).
R. T.P. Lee, K M. Tan, T Y. Liow, C S. Ho, S. Tripathy, D Z. Chi, and Y
C. Yeo
6. Phase and texture of Er-germanide formed on Ge(001) through a solid-
state reaction
J. Electrochemical Society. Vol. 155, H26-H30 (2008)
S. L. Liew, B. Balakrisnan, C. S. Ho, O. Thomas, D. Z. Chi.
7. RBS characterization of Epitaixial Lateral Overgrowth of ZnO.
Nuclear Instruments and Methods in Physics Research B 260 299-303 (2007)
Hailong Zhou, Hui Pan, Taw Kuei Chan
, Chee Sheng Ho, Yanping Feng,
Soo-Jin Chua, Osipowicz Thomas.
8. Novel Epitaxial Nickel Aluminide-Silicide with Low Schottky-Barrier and
Series Resistance for Enhanced Performance of Dopant-Segregated
Source/Drain N-channel MuGFETs .
Symposium on VLSI Technology. 12-14, 108-109 (2007).
Rinus T. P. Lee, Tsung-Yang Liow, Kian-Ming Tan, Andy Eu-Jin Lim,
Chee Sheng Ho, Keat-Mum Hoe, M.Y. Lai, Thomas Osipowicz,
Guo-Qiang Lo, Ganesh Samudra, Dong-Zhi Chi, and Yee-Chia Yeo.
9. HRBS/Channeling studies of ultra-thin ITO films on Si.
Nuclear Instruments and Methods in Physics Research B 266 1464–1467
(2008).
P. Malar, T. K. Chan, C. S. Ho, T. Osipowicz
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v
10. Interfacial study of thin Lu
2
O
3
on Si using HRBS
Nuclear Instruments and Methods in Physics Research B 266, 1486-1489 (2008).
T.K. Chan
a
, P. Darmawan
b
, P. Malar
a
, C. S. Ho
a
, P. S. Lee
b
, T. Osipowicz
a,*
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vi
TABLE OF CONTENTS
Acknowledgements …………………………………….………… … …………….i
List of Publication……………………… ………………………………………… iii
Table of Contents ……………………………………………….… ….………… vi
Summary………….……………………………………………… … ………… xii
List of Tables………………………………………………… … ……………… xv
List of Figures……………………………………………… ………….………… xvi
List of Acronyms and Symbols ……………………………………….……………xxi
1. INTRODUCTION…………………………………………………………………1
1.1 Motivation and Chapter Overview …………………… … ……………. 4
2. COPPER METALLIZATION IN BACK-END INTERCONNECT
SYSTEM…………………………………………………………………………… 7
2.1 Fundamental Issues in Integrated Circuits…………………………… …7
2.2 Cu Metallization in Interconnect System…………… …………………10
2.2.1 Challenges of implementing copper metallization… ……… 12
2.2.2 Fabrication technique: The Dual Damascene Process… …… 13
2.2.2.1 Line First Method……… ……………………….… 14
2.2.2.2 Via First Method … ……………………………… 16
2.2.3 Diffusion Barrier for Copper …………… ……………… 18
2.2.4 Electroplating Copper Process………… ………………….…19
2.2.5 Chemical Mechanical Polishing (CMP)… ……………….… 21
2.3 References… ………………………………………………………… 22
3. DIFFUSION BARRIERS IN CU METALLIZATION……………… …… 25
3.1 Introduction…………… ……………………………………………….25
3.2 The Diffusion Barriers Concept……………………… ……………… 26
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vii
3.3 Diffusion mechanisms in barrier materials………… ………………… 28
3.4 Candidate diffusion barrier for copper metallization… ……………… 31
3.5 References…… …………………………………………………………34
4. BARRIER DEPOSITION TECHNIQUES… ………………………………36
4.1 Introduction……… …………………………………………………… 36
4.1.1 D.C Sputtering…………… ………………………………… 38
4.1.2 R.F Sputtering ………………………… …………………… 40
4.1.3 PVD Deposition Variables……………… ……………………42
4.2 Atomic Layer Deposition (ALD)………………… …………………….44
4.2.1 Precursor Chemistry and Selection……………………… … 45
4.2.2 Advantages and Disadvantages……………… ……………….47
4.3 References…………………… …………………………………………48
5. THIN FILM ANALYSIS TECHNIQUES…………… ……………………. 50
5.1 Introduction…………….……………………………………………… 50
5.2 Four Point Resisitivity Probe………………….……………………… 53
5.2.1 Bulk Sample Expression……………………………….…… 54
5.2.2 Thin Sheet Expression…………………………………… … 54
5.3 Field emission scanning electron microscopy (FESEM)……………… 56
5.4 Transmission electron microscopy (TEM)……………………… …… 58
5.5 Time-of-flight Secondary Ion Mass Spectrometry (ToF-SIMS)…………61
5.6 X-ray photoelectron spectroscopy (XPS)…………………… …………64
5.7 X-ray diffraction (XRD)………………………………………………….66
5.8 Atomic force microscopy (AFM)…………… …………………………68
5.9 Auger Electron Spectrometry (AES)…………………………………… 70
5.10 Rutherford backscattering spectrometry (RBS)……… ………………72
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5.10.1 Kinematic factor……… …………………………………….73
5.10.2 Scattering Cross Sections…… …………………………… 75
5.10.3 Stopping Cross Section…… ……………………………… 76
5.10.4 Energy Straggling… ……………………………………,… 77
5.10.5 Ion Channeling….………………………………,……………78
5.11 References…… ……………………………………………………….80
6.
MICROSTRUCTURE OF TANTALUM BASED DIFFUSION BARRIER 81
6.1 Introduction …………………………………………………………… 81
6.1.1 General Properties of Tantalum barrier…………… …………82
6.1.2 General Properties of Tantalum Nitride barrier……… ………83
6.2 Effects of N
2
Flow-Rate on Barrier Characteristics………… ………….85
6.2.1 Experimental Details…………………………………… …….86
6.2.2 Results and Discussion…………………… ………………….86
6.3 Effects of Tantalum microstructure on Copper…………………… … 96
6.3.1 Experimental Details……………………………….………….96
6.3.2 Results and Discussion………………………… ….……… 97
6.3.2.1 Effects on copper seed…………… ……………… 97
6.3.2.2 Effects on electroplated copper…………… ………102
6.3.2.3 Effects on copper deposited on single layer Ta only 103
6.4 Conclusion…………………………………………………… ……….105
6.5 References………………………………… ………………………… 106
7. RELIABILITY TESTS FOR Cu/Low-K SYSTEMS………………… …….108
7.1 Introduction…… ………………………………………………………108
7.2 Adhesion Test on Cu/Low-k Systems…………… ……………………108
7.2.1 Experimental Details……………… ……………………… 109
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ix
7.2.2 Test Method (Modified Edge Lift-off Test)………… ………110
7.2.3 Results and Discussion …………………………………… 112
7.3 Stress-Migration Test on Cu/Ta bilayer/Low-k Systems …………… 119
7.3.1 Experimental Details… …………………………………… 121
7.3.2 Resistance testing results for Kelvin vias (250 hours)… ……124
7.3.3 Resistance testing results for Chain vias (250 hours………….126
7.3.4 Failure Analysis Results and Discussions ………………… 129
7.3.5 Resistance testing summary (500 hours) ……………………134
7.3.6 Annealing temperature/Gas sputtering Process Comparison…136
7.3.6.1 Experimental details…… …………………………136
7.3.6.2 Results and Discussion.…………………………… 138
7.4 Conclusion …………………………………………………………….140
7.5 References…… ……………………………………………………… 141
8. ION BEAM FACILITY AT CIBA…… …………………………………… 143
8.1 Introduction ……………………………………………………………143
8.2 The Ion Beam Facility at CIBA……… ……………………………….143
8.2.1 The Singletron Accelerator ………………………………….145
8.2.2 Beam Handling Station…… ……………………………… 146
8.2.3 30° Nuclear Microscopy Beam Line……… …………….… 147
.8.2.3.1 Analysis Chamber….………………………………148
8.2.3.2 Quadrupole Lens System……………………… ….149
8.2.3.3 Data Acquisition System………………… …….….152
8.2.4 45° High-Resolution RBS System Beam Line………… … 153
8.2.4.1 Working Principles of HRBS System …………… 155
8.2.5 Improvements and Adaptations to HRBS Syste …………… 161
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x
8.2.5.1 Energy Calibration of Singletron Accelerator …….162
8.2.5.2 Channeling - Angular divergence of beam ……… 165
8.2.5.3 Channeling - Goniometer Alignment……… …… 166
8.2.5.4 Analysis of Spectrometer Ion Optics …………… 168
8.2.5.5 MCP Gain Correction ………………………….… 170
8.2.5.6 Spectrum Background ………………………….….171
Characterization of the background ……………… 172
Dual scattering calculation …………………… 177
Wall Scattering- Filter as remedy ……………… 177
8.2.5.7 Implementation of electrostatic filter…………… 179
Electrostatic Filter Design and Placement …… …179
Calculations of Plate Potential…………………… 182
Experimental Details ………………………… … 184
Results and Discussions ……………………… ….185
8.3 Conclusion…………………………………………………………… 191
8.4 References………………………………………………………… … 193
9. QUANTITATIVE STUDIES OF Cu DIFFUSION IN ULTRA-THIN Ta-
BASED BARRIERS……………………………………………………………….194
9.1 Introduction………………………………………………………… …194
9.2 Thermal Stress Study of 10nm i-PVD Ta/ ALD TaN Bilayer Barrier 197
9.2.1 Experimental Details………………………………… …… 197
9.2.2 Results and Discussion……………………………… …… 198
9.2.2.1 Electrical Properties………………………… …….202
9.2.2.2 Microstructure Properties……………………… ….203
9.2.2.3 Cu Diffusion Study by RBS analysis……………….208
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xi
9.3 Thermal Stress Study of 1-3nm ALD TaN Barrier…………….…….…214
9.3.1 Experimental Details…………………………………… … 215
9.3.2 Results and Discussions………………………………… … 217
9.3.2.1 HRBS analysis of 1nm TaN barrier film……… ….223
9.3.2.2 HRBS analysis of 2 and 3nm TaN barrier film… …229
9.4 Conclusion.…………………………………………………….… ……236
9.5 References…………………………………………………….… …….237
10. CONCLUSIONS AND OUTLOOK……… ……………………….……….239
10.1 Summary of Results.…………….……………………….…… ……239
10.2 Future Directions…………………………………………….… …….243
APPENDIX A: Auger Analysis for TaN………………………………………… 244
APPENDIX B: MELT Report……………………… …………………………… 250
APPENDIX C: XPS Analysis of Interfaces……………… ……………………….256
APPENDIX D: Wafer Maps……………………………………………………… 281
APPENDIX E: XRUMP Fitted RBS Spectra of Ta/TaN Bilayer Barrier………… 294
APPENDIX F: SIMNRA Fitted RBS Spectra of ALD TaN Barrier……… …… 299
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xii
SUMMARY
With the need for better conductivity materials for the transistor back-end
interconnect system, the industry has switched from the use of aluminum to copper as
the metal of choice. However, copper tends to diffuse into the surrounding dielectric
materials, causing contamination of the junctions and electrical shortings. The use of a
diffusion barrier in the metal lines is imperative for the successful implementation of
copper into the system. Advancing technology requires robust ultra-thin barriers
without sacrificing reliability. The present work investigates the various implications
of implementing Ta based barriers with copper in the backend interconnect system. It
consists of the following 4 main parts.
The first part investigates the effect of nitrogen flow rate on the phase formation of
TaN formation through IPVD deposition as well as its effect on the subsequent
deposition of Cu seed and the bulk Cu layer. The objective is to understand the barrier
characteristics and its effect, if any, on the formation of Cu(111) phases. The four
main phases of Orthorhombic, Hexagonal, BCC and FCC were found to be present in
the TaN film, with BCC and Orthorhombic phases being the major constituents across
different flow rates of nitrogen. A summary of the different crystallographic
orientations has been recorded. The presence of a high percentage of BCC TaN
substrate was found to increase the formation of Ta <110>. Contrary to former
reports, it was found that the presence of Ta<110> does not facilitate the growth of
Cu<111> seed layer. Furthermore, thicker electroplated Cu always attain a <111>
texture independent of the Cu seed orientation and the underlying Ta or TaN based
diffusion barrier.
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xiii
The second part of the project involves quantification of the adhesion strength of
diffusion barrier films to FTEOS dielectric. The objective is to investigate the
adhesion strength differences between Ta and TaN single layer and Ta/TaN bilayer
film. This was conducted by a method known as modified edge lift off test (MELT).
Stress migration tests were then carried out on structures designed for qualifying the
low-k interconnect systems reliability and failure analysis reviewed problems in the
pre-cleaning step before Cu deposition. Further testing with different sputter gas,
annealing time and temperature revealed that sputtering with N
2
and annealing at
higher temperatures reduced the Cu/barrier adhesion due to likely formation of TaN at
the Cu/Ta interface. Corrective steps in the depositing process have been investigated
and were shown to improve overall reliability of the structures.
The third part involves the development work done at CIBA on the HRBS system that
would be used extensively to study the reliability of ultrathin ALD TaN barriers. Due
to the inherent complexity of equipment setup, data acquisition and processing in the
HRBS system, several analyses on the data collection and processing methods were
carried out, with addition improvement to the hardware for background reduction so
as to ensure accuracy in the results. Finally the last part of the project involves
characterization of the ultra-thin 1-3nm ALD TaN and 10nm Ta/TaN bilayer via
various surface analytical techniques, with quantitative studies of Cu diffusion by
HRBS and RBS respectively.
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xiv
LIST OF TABLES
Table 3.1 ITRS Roadmap 2005 Edition…………………………………………… 25
Table 3.2 Comparison of different copper barriers and critical factors for a good
barrier……………………………………………………………………………… 33
Table 5.1 Summary of analytical techniques employed in thin film studies……… 52
Table 6.1 Different common phases of TaN and their microstructure……………….84
Table 6.2 Peak positions of main Ta
x
N
y
phases fixed during spectrum
deconvolution……………………………………………………………………… 90
Table 6.3 Summary of total intensities of major Ta
x
N
y
phases identified in the films
……………………………………………………………………………………… 91
Table 6.4 Comparison of Ta/Cu ratio for different flow rates and Cu seed thickness
………………………………………………………………………………………101
Table 6.5 Comparison of Ta/Cu ratio for different flow rates with ECP Cu……….103
Table 7.1 Summary of average fracture intensity of samples and failure interface 115
Table 7.2 Comparison of adhesion strength for different samples………………….116
Table 7.3 Wafer and deposited film stress measured with stress derived based on the
wafer bow measured by a laser source…………………………………………… 127
Table 7.4 Varying experimental conditions for Chain via testing………………….137
Table 8.1 Comparison table between RBS and HRBS systems…………………….154
Table 8.2 Comparison of background to substrate % ratio for simulated dual
scattering and experimental spectrum………………………………………………178
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LIST OF FIGURES
Figure 1.1 Cross-sectional view of a 7 metal layer stack interconnect system………. 2
Figure 2.1 Schematic diagrams depicting the Line First Dual Damascene Method…14
Figure 2.2 Schematic diagrams depicting the Via First Dual Damascene Method… 16
Figure 2.3 Illustrations and images showing the effects of non-uniform copper seed
layer………………………………………………………………………………… 19
Figure 3.1: Schematic illustration of the three classes of diffusion barriers…………27
Figure 3.2: Barrier microstructure can be categorized as (a) single crystal, (b)
polycrystalline, (c) polycrystalline columnar, (d) nano-crystalline, and (e) amorphous
……………………………………………………………………………………… 30
Figure 4.1 Schematic of a DC sputtering system…………………………………….38
Figure 4.2 Schematic of a RF sputtering system……………………………………. 40
Figure 4.3 Schematic drawings of a typical ALD process ………………………… 44
Figure 5.1 Schematic diagram of a four-point probe…………….………………… 53
Figure 5.2 Schematic of the field emission scanning electron microscope (FESEM)
………………………………………………………………….…………………….57
Figure 5.3 Schematic of transmission electron microscopy………………………….59
Figure 5.4 Schematics of a TEM sample preparation……………………………… 60
Figure 5.5 Schematic of time of flight secondary ions mass spectrometry………….62
Figure 5.6 Schematic of atomic mixing effect during sputtering……………………63
Figure 5.7 Schematic of a XPS system………………………………………………65
Figure 5.8 Schematic of positive x-ray interference…………………………………66
Figure 5.9 Schematic of a XRD system…………………………………………… 67
Figure 5.10 Schematic working principle of an AFM system ………………………68
Figure 5.11 Schematic working principle of an AES system……………………… 70
Figure 5.12 Schematic working principle of a RBS system…………………………73
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xvi
Figure 5.13 Schematic representation of an elastic collision……………………… 73
Figure 5.14 Comparison of a random and aligned RBS spectrum for a Si sample… 78
Figure 6.1 Graph of N
2
content in TaN vs Flow-rate (from AES)………………… 87
Figure 6.2 Schematic diagrams showing glancing angle XRD compared to
conventional scan…………………………………………………………………….88
Figure 6.3 Overlapping XRD scans for different nitrogen flow-rate with major Ta
x
N
y
phases presented here ……………………………………………………………… 89
Figure 6.4 Example of overlapping XRD peaks deconvoluted to obtain peak positions
and areas (N20 spectrum)…………………………………………………………….90
Figure 6.5 Bar Chart plot showing different phases in percentage within the sample
(calculated errors on top of bars)…………………………………………………… 92
.
Figure 6.6 Overlapping XRD scans for Ta………………………………………… 94
Figure 6.7 α Ta comparison between 60sccm and 80sccm nitrogen…………………95
Figure 6.8 Cu<111> formation on different substrate (1000Å Cu seed)………… 98
Figure 6.9 a) Comparing XRD peak intensities between Cu(111) and Ta(110) and
b) plot of Cu to α Ta peaks integral……………………………………………… 99
Figure 6.10 Comparison between 400 Å and 1000 Å copper seed for N60 and N80
flow-rate results…………………………………………………………….……….100
Figure 6.11 Electroplated copper on N60 and N80 substrate……………….………102
Figure 6.12 (1) 1000Å Cu seed, (2) 1-micron thick electroplated copper………….104
Figure 7.1 Schematic diagram of 2 layers of dual damascene interconnect……… 109
Figure 7.2 Schematic diagram of MELT procedure……………………………… 111
Figure 7.3 SEM micrographs of delamination after testing……………………… 112
Figure 7.4 XPS Wide Scan for Delaminated Surface………………………………113
Figure 7.5 XPS Elemental Scan for 1) O, 2) Si, 3) C, 4) Ta and 5) Cu respectively
………………………………………………………………………………………114
Figure 7.6 Vacancy generations through grain growth in damascene structure……120
Figure 7.7 Schematics of a Kelvin and Chain Via structure……………………… 123
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xvii
Figure 7.8 Example of wafer maps plotted to analyze the resistance trends……….124
Figure 7.9 Box-plots of Kelvin vias resistance…………………………………… 125
Figure 7.10 FIB cut on selected outliers Kelvin via does not indicate significant
voiding …………………………………………………………………………… 126
Figure 7.11 Typical wafer plot showing high resistance at the wafer edges……… 127
Figure 7.12 Box-plots of Chain vias resistance…………………………………… 128
Figure 7.13 PVC showing sites of discontinuity……………………………………129
Figure 7.14 FIB images of a) void formation at via bottom edges and b) via rip off at
via bottom………………………………………………………………………… 130
Figure 7.15 TEM images of a) Normal via structure b) voiding at via bottom corner
c) Via rip off ……………………………………………………………………….131
Figure 7.16 Sequence of voiding process proposed by Hommel et al…………… 132
Figure 7.17 Comparison of Kelvin and Chain via resistance at 250h and 500h stress
testing………………………… ……………………………………… …………134
Figure 7.18 Box plot of resistance rise for each wafer after stress testing….…… 138
Figure 8.1 Ion beam facility layout at CIBA………………………………….…….144
Figure 8.2 Schematic internal layout of the Singletron accelerator system….…… 146
Figure 8.3 Steerer table assembly…………………………………….…………….147
Figure 8.4 30° nuclear microscopy beam line………………………………….… 148
Figure 8.5 Top view schematics of the analyzing chamber………………… …….149
Figure 8.6 The Oxford OM-50 triplet quadrupole lens……………………….…….150
Figure 8.7 a) Cross section of a typical quadrupole lens, b) magnetic field action on
positive charged particles travelling into the plane of the paper at various points in the
quadrupole aperture, c) single quadrupole forming a line focus…………….….… 151
Figure 8.8 Side view schematics of the trajectories of charged particles across the
quadrupole. Dashed and bold lines correspond to the lower and higher
demagnification respectively……………………………………………… ………151
Figure 8.9 Schematic setup of OMDAQ system……………………………………152
Figure 8.10 HRBS system at 45° beam line……………………………………… 154
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xviii
Figure 8.11 Schematic of ions flight in 90° bending magnet……………………….155
Figure 8.12 Data acquisition system of HRBS setup……………………………….157
Figure 8.13 Position spectra of thin Hf peaks from a HfO/Si sample, taken at varying
B field……………………………………………………………………………….159
Figure 8.14 Position x versus Epsilon ε …………………………………………….159
Figure 8.15 HRBS spectra of 10 nm SiO
2
/Si……………………………………….160
Figure 8.16 Spectra of proton backscattering from silicon, simulated with SIMNRA
using varying beam energy to obtain best fit……………………………………….164
Figure 8.17 Plot of actual voltage output against GVM Voltage output……………164
Figure 8.18 Installation position of slit housing to restrict angle divergence of beam
………………………………………………………………………………………165
Figure 8.19 Box scan of Si sample to determine channel axis…………………… 167
Figure 8.20 Goniometer zeroed to Theta and Phi channeling angles……………….167
Figure 8.21 Plots of magnetic field strengths with path length of ions as they are
flown through the spectrometer. SIMION simulation of fringe fields shows reasonable
agreement with experimental result. The analytical calculation uses an expanded hard-
edge model to approximate fringe field effects…………………………………… 169
Figure 8.22 Plot of position of ion impact with MCP with varying ion energy ε.
SIMION shows better agreement with experimental result than the analytical
calculations due to its accurate fringe field approximation…………………………169
Figure 8.23 Plots of uncorrected, corrected and theoretical spectra……………… 171
Figure 8.24 HRBS spectra showing background noise…………………………….172
Figure 8.25 HRBS spectra of CuO, HfO
2
, ITO and TaN respectively under varied
conditions…………………………………………………………………… ……174
Figure 8.26 Background noise data of HfO
2
, CuO, ITO and TaN under varied
conditions………………………………………………………………………… 175
Figure 8.27 Schematic diagram of an impinging ion undergoing single (left) and dual
(right) scattering in a sample [4]……………………………………………………176
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xix
Figure 8.28 RBS spectrum of a1nm TaN/SiO
2
/Si sample plotted in Log scale to
compare the SIMNRA simulation results of background fitting for dual scattering and
single scattering…………………………………………………………………… 178
Figure 8.29 Layout of the bending magnet and MCP chamber…………………….179
Figure 8.30 Schematic design and layout of the electrostatic plate in the vacuum
system ………………………………………………………………………………180
Figure 8.31a-f Sequential pictures of the electrostatic plate setup………………….181
Figure 8.32 Scale schematic model of different energy ion trajectories after entering
the electrostatic filter set at a potential difference of 1kV………………………….183
Figure 8.33 Spectra overlay of the TaN sample with varying potentials across the
plate (Top plate at negative potential)………………………………………………185
Figure 8.34 Total counts of background 1& 2, Ta peak (reduced 10 times) and Si
substrate (reduced 3 times).(Top plate at negative potential)………………………186
Figure 8.35 Spectra overlay of the TaN sample with varying potentials across the
plate (Top plate at positive potential)……………………………………………….187
Figure 8.36 Counts of background region1& 2, Ta peak (reduced 10 times) and Si
substrate (reduced 3 times). (Top plate at positive potential)…………………… 189
Figure 8.37 Schematic illustrations showing path of beam under the influence of the
electrostatic filter at different top plate potential………………………………… 190
Figure 9.1 SIMS profile and TEM cross-sections of as deposited 5nm TaN a) with Cu
and b) without Cu………………………………………………………… ………196
Figure 9.2 TEM micrographs of Cu/Ta/TaN/ SiO
2
films………………………… 199
Figure 9.3 XRD analysis of a) Ta/TaN film b) Cu/Ta/TaN film…… 200
Figure 9.4 RBS spectrum with surface Cu (a) and without surface Cu after etching
(b)………………………………………………………………………………… 201
Figure 9.5 Sheet resistance measurements as a function of annealing temperature
(Trendline to guide the eye)……………………………………………………… 202
Figure 9.6 Barrier roughness as a function of annealing temperature………………203
Figure 9.7 AFM- 3D images of 10nm Ta/TaN bilayer samples at each annealed
temperature………………………………………………………………………….204
Figure 9.8 XPS spectra of Ta
4f
for Ta/TaN sample at 350°C and 650°C………….207
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Figure 9.9 Overlay of RBS spectra of varying anneal temperature at 160° scattering
angle with sample tilted at glancing angle geometry……………………………….208
Figure 9.10 A fitted RBS spectrum of 550°C sample using XRUMP software with the
element depth profile attached…………………………………………………… 209
Figure 9.11 Elemental depth profiles of 150°C and 250°C annealed sample………210
Figure 9.12 Elemental depth profiles of 350°C and 450°C annealed sample………211
Figure 9.13 Elemental depth profiles of 550°C and 650°C annealed sample………212
Figure 9.14 Elemental depth profiles of 750°C and 850°C annealed sample………213
Figure 9.15 HRBS spectrum for 10Å -30Å samples (left) with Concentration and total
Ta counts with thickness (right)…………………………………………………….217
Figure 9.16 XRD glancing angle 2θ scan for 1-3nm sample……………………….218
Figure 9.17 Sheet resistance measurements as a function of annealing temperature.218
Figure 9.18 RMS roughness measurements as a function of annealing temperature.219
Figure 9.19 Cross section TEMs showing unannealed 2nm uniform TaN barrier
conforming to rougher TEOS layer…………………………………………………220
Figure 9.20 XPS spectra of Ta
4f
(top) and O
1s
(bottom) for 1nm annealed sample 222
Figure 9.21 Overlay of HRBS spectra of 1nm samples at varying annealing
temperature, with Cu and Ar regions magnified 50 times………………………….223
Figure 9.22 Elemental depth profiles of 1nm barrier annealed from 150-500°C… 224
Figure 9.23 Cu and Si depth profiles of 1nm barrier annealed from 150-500°C… 225
Figure 9.24 FESEM (a) and AFM micrographs(b) indicating agglomeration of 1nm
TaN film after annealing……………………………………………………………227
Figure 9.25 Overlayed HRBS spectrums of 2nm samples (left) 3nm annealed samples
(right) with magnified Cu and Ar regions by 50 times………………………….….229
Figure 9.26 Elemental depth profiles of 2nm barrier annealed from 150-500°C… 230
Figure 9.27 Cu and Si depth profiles of 2nm barrier annealed from 150-500°C… 231
Figure 9.28 Elemental depth profiles of 3nm barrier annealed from 150-500°C… 232
Figure 9.29 Cu and Si depth profiles of 3nm barrier annealed from 150-500°C… 233
Figure 9.30 Schematic diagrams for the growth mechanism of thin films [35]…….234
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LIST OF ACRONYMS AND SYMBOLS
Al Aluminium
AR Aspect Ratio
AES Auger Electron Spectroscopy
AFM Atomic Force Microscopy
BARC Bottom anti reflective coating
BCC Body Centered Cubic
BTS Bias Temperature Stressing
CTE Coefficient of Thermal Expansion
CVD Chemical Vapour Deposition
FCC Face Centered Cubic
FTEOS Fluorinated Tetra Ethyl Ortho Silicate
JCPDS Joint Committee on Powder Diffraction Standards
K Dielectric constant
Kapp
Fracture Intensity
kV Kilovolt
ILD Interlayer dielectric
mA Milliampere
MELT Modified Edge Lift Off Test
N20 – N100 Nitrogen Flow rate (20-100 sccm)
IPVD Ionised Physical Vapour Deposition
RBS Rutherford Backscattering Spectrometry
SEM Scanning Electron Microscope
Si Silicon
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xxii
SIMS Sceondary Ion Mass Spectrometry
SiN Silicon Nitride
sccm Standard Cubic Centimetre
Ta Tantalum
TaN Tantalum Nitride
TEM Transmission Electron Microscope
TEOS Tetra Ethyl Ortho Silicate
XPS X-ray Photoelectron Spectroscopy
XRD X-ray Diffraction
µΩcm Micro Ohm Centimetre
σ Stress
h Thickness
E
*
Biaxial Modulus
λ Wavelength
α Alpha
β Beta
φ Spectrometer work function
CHAPTER 1: INTRODUCTION
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1
CHAPTER 1: INTRODUCTION
The demand for better functionality, improved manufacturability, and higher reliability in
modern integrated circuits (ICs) has been the main driving force for the development of
faster devices with increasingly complex interconnect systems. The functionality aspect
is improved by increasing clock frequency through the downward scaling of device sizes.
As device size decreases, the metal interconnects, which are responsible for carrying
currents between local and global-linked transistors, will need to decrease their line
widths and pitches correspondingly. The decrease of the cross sectional areas of the
interconnect system will cause a corresponding increase in the overall line resistance and
also capacitance delays in the switching signals (RC delays) due to fringing capacitance
between wires in close proximity within the metal layers. Therefore, the performance of
integrated circuits would be significantly affected by changes made to the chip’s wiring
scheme. Also, as technology advances to deep sub-micron levels, the interconnect lines
will gain higher aspect ratios due to the decrease in their dimensions. More advanced
manufacturing techniques would be required to produce these high aspect ratio lines, in
which a failure to do so would make the device highly susceptible to line yield problems.
In addition to the scaling down of critical dimensions, maximum chip size is increasing
due to the increase in total number of transistors per chip. The parasitic loading of the
longest lines is increasing as a result, and on-chip wiring delays have been recorded to
exceed 50% of the cycle time of the fastest logic chips. Significant improvement must be
made to reduce the interconnect delay time without jeopardizing reliability. One way to
CHAPTER 1: INTRODUCTION
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2
improve limited device speed is to decrease the routing length by increasing the number
of metallization layers. These metallization layers are metal lines (shown in the Figure 1)
that are stacked layers of wirings used for sending signals and power supply between
devices. In between two metal layers are via plugs connecting the two different levels.
The lower metal layers (M1) nearer to the front end transistors are used for local
interconnections between devices whereas the middle layers (M2-M6) are for global
interconnection. The M7 layer at the top is for ground and power distribution.
Figure 1.1 Cross-sectional view of a 7 metal layer stack interconnect system.
However, having more metal layers requires additional processing steps, increases
manufacturing time and cost, increasing chances of introducing manufacturing defects
and requires investment in newer technologies. Another possible alternative would be to
change to new conducting and dielectric materials. The industry is always on the search
for lower resistance interconnects and dielectric constant insulators that are able to
decrease electrical signal delay and postpone the need for further scaling and additional
levels of metal.