Efficient modeling of power and signal integrity for semiconductors and advanced electronic package systems 1

EFFICIENT MODELING OF POWER AND SIGNAL
INTEGRITY FOR SEMICONDUCTORS AND
ADVANCED ELECTRONIC PACKAGE SYSTEMS
ZAW ZAW OO
(B.E.(Electronic),YTU; M.Eng.(ECE),NUS)
A THESIS SUBMITTED
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
NATIONAL UNIVERSITY OF SINGAPORE
2008
Acknowledgements
I would like to take this opportunity to convey my deepest and sincere gratitude to
people without whom I would not have completed this thesis successfully.
First and foremost, I would like to express my deepest gratitude to my super-
visors, Professor Li Le-Wei and Dr. Li Er-Ping, for their invaluable contributions
and insightful guidance throughout the entire course of the research project. Spe-
cial thanks to my immediate project supervisor, Dr. Li Er-Ping, for his patience,
unselfish and enthusiastic guidance, and reviewing for all manuscripts of the pub-
lished/submitted technical papers.
I would also like to acknowledge the support and friendship I received from my
colleagues in Advanced Electronics and Electromagnetics Group at Institute of High
Performance Computing, A*STAR, especially Dr. Wei Xingchang, Dr. Liu En-Xiao
and Dr. Zhang Yaojiang for their valuable advice and discussions.
The sponsorship awarded for my PhD degree candidature by Institute of High
Performance Computing (IHPC), A*STAR is gratefully acknowledged.
Finally for all the support, love and understanding they have given me through-
out the years, I wish to thank my wife, my parents and other family members.
i
Contents
Acknowledgements i
Contents ii

Summary vii
List of Figures ix
List of Tables xvii
List of Acronyms xviii
Chapters 1
1 Introduction 1
1.1 BackgroundInformation 1
1.2 Overview 3
1.3 Motivations 7
1.4 OutlineoftheThesis 11
ii
Contents iii
1.5 OriginalContributionsandInnovations 14
2 Modeling of Interconnects, Transmission Lines, and Power-Ground
Planes 15
2.1 ModelofMultilayeredPackage 16
2.2 Inductance Extraction for the Interconnects in Chip and Package . . 17
2.2.1 Inductance and Reluctance Matrices . . . . . . . . . . . . . . 18
2.2.2 Stability Analysis for Reluctance K-Method 20
2.2.3 Efficient Inductance Extraction Method . . . . . . . . . . . . 22
2.3 Modeling of Signal Traces as Multiconductor Transmission Lines . . . 26
2.3.1 Quasi-static Matrix Parameters for Multiconductor Transmis-
sionLines 26
2.3.2 Capacitance and Conductance Matrix Parameters . . . . . . . 27
2.3.3 Inductance and Resistance Matrix Parameters . . . . . . . . . 28
2.3.4 Examples for RLGC Parameters Extraction . . . . . . . . . . 29
2.4 Cavity-mode Resonator Model for Analysis of Parallel-Plate Power-
GroundPlanes 32
2.5 Summary 39
3 Electrical Performance Modeling of Power-Ground Layers with Mul-

tiple Vias 41
3.1 Problem Statement for Modeling of Multiple Vias . . . . . . . . . . . 42
3.2 Modal Expansion of Fields in a Parallel-Plate Waveguide . . . . . . . 43
Contents iv
3.3 Multiple Scattering Coefficients among Cylindrical PEC and PMC Vias 46
3.4 Excitation Source and Network Parameter Extraction . . . . . . . . . 53
3.5 Implementation of Effective Matrix-Vector Multiplication in Linear
Equations 60
3.6 Numerical Examples for Single-layer Power-Ground Planes . . . . . . 63
3.6.1 ValidationoftheSMMAlgorithm 63
3.6.2 Co-simulationExample 66
3.6.3 Simulation for Power-Ground Planes Decoupling . . . . . . . . 69
3.7 Novel Boundary Modeling Method for Simulation of Finite-Domain
Power-GroundPlanes 71
3.7.1 Perfect Magnetic Conductor (PMC) Boundary . . . . . . . . . 71
3.7.2 Frequency-Dependent Cylinder Layer (FDCL) . . . . . . . . . 72
3.8 Numerical Simulations of the Extended SMM Algorithm for Finite
Power-GroundPlanes 76
3.8.1 Validations of the Frequency-Dependent Cylinder Layer . . . . 76
3.8.2 Experimental Validations of the Extended SMM Algorithm . . 79
3.8.3 Irregular-shaped Power-Ground Planes and Cut-out Structure 87
3.9 Summary 90
4 Modeling for Multilayered Power-Ground Planes in Power Distri-
bution Network 92
4.1 Modal Expansions and Boundary Conditions . . . . . . . . . . . . . . 93
4.2 Mode Matching in Parallel-plate Waveguides (PPWGs) . . . . . . . . 98
Contents v
4.3 Generalized T MatrixforTwo-layerProblem 106
4.4 FormulasSummaryforTwo-layerProblem 111
4.5 FormulasSummaryforMulti-layerProblem 115

4.6 Numerical Simulations for Multilayered Power-ground Planes with
MultipleVias 121
4.7 Summary 126
5 Hybrid Modeling of Signal Traces in Power Distribution Network
by Using Modal Decomposition 130
5.1 Methodology for Hybridization of SMM and Modal Decomposition . . 131
5.2 Modeling of Power-Ground Planes with Multiple Vias . . . . . . . . . 134
5.3 Modeling of Multiconductor Signal Traces . . . . . . . . . . . . . . . 135
5.3.1 Properties of the Per-Unit-Length Parameters . . . . . . . . . 138
5.3.2 Mode Decoupling of the Parameters in Frequency Domain . . 139
5.3.3 Impedance Matrix of the MTLs with Same Length l 144
5.4 Modeling of Entire Signal Traces in Power Distribution Network . . . 147
5.4.1 Modeling of Striplines between Power-Ground Planes . . . . . 148
5.4.2 Equivalent Circuit Model of Through-Hole Signal Vias . . . . 153
5.4.3 Combination of Equivalent Networks for Modeling of Entire
SignalTrace 155
5.5 Numerical Simulations of Hybrid Modeling Algorithm for Signal Traces
inPDN 157
5.6 Summary 167
Contents vi
6 Conclusions and Suggestions for Future Work 168
6.1 Conclusions 168
6.2 SuggestionsforFutureWork 170
Bibliography 172
Appendixes 185
A Translational Addition Theorem in Cylindrical Coordinates 185
B Generalized Cascade ABCD Matrix for Entire System 188
List of Publications 193
Summary
An accurate electromagnetic modeling of power distribution network (PDN) in an

advanced electronic package together with efficient simulation of large-scale power-
ground vias in multilayered structures has become of vital importance for optimizing
the electrical performance of high-speed digital circuits. This thesis focuses on
developing accurate and efficient modeling and simulation methods for analyzing
the power distribution network for high-speed digital circuits and performing the
system-level analysis of advanced electronic packages.
Specifically, a systematic approach of efficient system-level simulation for an
electronic package is illustrated. The electronic package is separated into two do-
mains: the top/bottom domain and the inner domain. The inner domain is the
portion of the package confined by the top and bottom power-ground planes. The
former comprises signal traces (microstrip type), microstrip to via transitions, sol-
der balls (for flip-chip packages) etc. The latter mainly consists of parallel-plate
power-ground planes and vias. Those two domains are self-contained multiport net-
works, and they are connected at the outmost anti-pad regions of the plate-through
vias. Then, an accurate hybrid modeling approach of multiple scattering theory
for coupling of power-ground (P-G) vias in the multilayered electronic package and
modal decomposition of the propagating modes in the package is implemented for
the power integrity (PI) and signal integrity (SI) analyzes of the signal traces in the
electronic package in the presence of large number of vias.
The proposed semi-analytical approach of the scattering matrix method (SMM)
vii
Summary viii
is first developed for the analysis of multiple scattering of vias in the power distri-
bution network. A novel boundary modeling method, that is, frequency-dependent
cylinder layer (FDCL), is then proposed based on the factitious layer of PMC cylin-
ders with frequency-dependent radii at the periphery of an electronic package to
simulate the finite power-ground planes of real world packages. The formulation of
the SMM algorithm with FDCL is extended to simulate multilayered structures of
the P-G planes by using the modal expansions of parallel-plate waveguide and mode
matching in the anti-patch region of each via. Numerical experiments are provided

for validation of the developed algorithm. The results demonstrate that the pro-
posed method is accurate and efficient to address the power integrity analysis of real
world electronic package with multilayered P-G planes and large-scale P-G vias.
Subsequently, an efficient modeling technique based on modal decomposition
of the electromagnetic fields is proposed for system-level analysis of the power dis-
tribution network in the package including the signal traces and the multilayered
power-ground planes with multiple vias. An analytical model is also introduced for
modeling of the discontinuities of the signal traces at the through-hole via. Then,
a novel hybrid modeling algorithm is developed to calculate the equivalent net-
work parameters for the entire power distribution. Numerical simulations of the
developed hybrid algorithm are presented and validated with full-wave numerical
method. The hybrid modeling algorithm developed in this research work provides
the accurate and computationally efficient results.
List of Figures
1.1 Power distribution noises coupling in system-on-package (SOP). (Cour-
tesy: M. Swaminathan et al
2
) 3
1.2 Chip, package and power distribution network. (Courtesy: M. Swami-
nathan et al
4
) 9
1.3 Schematic diagram of a multilayered advanced electronic package. . . 10
1.4 Illustration of the system-level modeling approach for advanced elec-
tronicpackages 12
2.1 A schematic of multilayered microprocessor package. . . . . . . . . . 16
2.2 A schematic of top-level metal for signal interconnects has an under-
lying orthogonal interconnect array. . . . . . . . . . . . . . . . . . . . 23
2.3 Crosstalk noise on the center bus of 5 signal-lines system in Fig. 2.2. . 25
2.4 Signal delay on the center bus of 5 signal-lines system in Fig. 2.2. . . 25

2.5 Sketch of coupled microstrips. All dimensions are in mm. . . . . . . . 30
2.6 Sketch of multiconductor transmission lines on a multilayered board.
Alldimensionsareinmm. 30
2.7 Geometric structure of a rectangular power-ground planes. . . . . . . 32
ix
List of Figures x
2.8 Illustration of port locations for the numerical examples of power-
groundplanes 34
2.9 Self-impedance of the port at the center of the power-ground plane. . 35
2.10 Input impedance of the port at the center of the power-ground plane. 36
2.11 Self and mutual impedances of two ports shown in Fig. 2.8(b). . . . . 37
2.12 Self and mutual impedances of two ports shown in Fig. 2.8(c). . . . . 37
2.13 Self and mutual impedances of two ports shown in Fig. 2.8(d). . . . . 38
2.14 Magnitude of input impedance of two-layered plate with a shorting pin. 39
3.1 Schematic diagram of a multilayered advanced electronic package. . . 43
3.2 Asetofrandomcylindricalvias(2Dview) 48
3.3 A schematic of cylindrical coordinates for translational addition the-
orem 49
3.4 (a) Signal via passing through three P-G planes; (b) Equivalent model
for the source via for calculation of entries in the admittance matrix:
Port 1 and Port 2 are excited in the anti-pad region with an equivalent
magneticcurrentsource,alternatively. 53
3.5 A magnetic frill current on the bottom PEC plane of an infinite par-
allelplatewaveguide 54
3.6 Vias of a signal trace passing through two conductor planes. The via
is enclosed by 12 shorting vias connecting the two planes. . . . . . . . 63
3.7 Comparison of the E
z
field distribution at 1 GHz: SMM simulation
result (left) vs. HFSS simulation result (right). The vias are drawn

aswhitedots. 63
List of Figures xi
3.8 Validation of the simulated results by SMM algorithm for E
z
with
thosefromtheHFSSsimulation. 65
3.9 Y11 for the two-port network formed by the plate-through via. . . . . 65
3.10 Field distribution of multiple scattering among the shorting vias. . . . 66
3.11 Schematic diagram of a signal trace packaging through two PEC planes. 67
3.12 Schematic diagram of the equivalent circuit used for SPICE simulation. 68
3.13 Voltage response at the far end of the signal trace in the presence of
twelveshortingviasandtwoPECplanes 68
3.14 Schematic diagram of a pair of power-ground planes with an SMT
decoupling capacitor close to an input SMA port. . . . . . . . . . . . 69
3.15 Comparison of the results of the input impedance: SMM algorithm,
measurementandcavity-moderesonatormodel. 70
3.16 Illustration of the implementation of the FDCL (Frequency-Dependent
Cylinder Layer) boundary, where virtual PMC (Perfect Magnetic
Conductor) cylinders (shaded) are contiguously placed at the pe-
riphery of an electronic package to model the original finite-domain
boundary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.17 Implementation of the PMC cylinders placed at periphery of an elec-
tronic package in the boundary modeling method (2D view). . . . . . 77
3.18 Comparison of the extended SMM results with fixed and dynamic
radii of the PMC cylinders in the FDCL and the reference solution. . 77
3.19 Effects of the different values of ζ on the accuracy of the simulation
results by the FDCL boundary modeling method. . . . . . . . . . . . 78
3.20Testprintedcircuitboard(PCB)formeasurement. 80
List of Figures xii
3.21 The scattering (S

11
) parameter for Port 1 of the test board in Fig. 3.20.
The simulated result by the SMM with FDCL method is compared
against the measurement data. . . . . . . . . . . . . . . . . . . . . . . 80
3.22 The scattering (S
21
) parameter for Ports 1 and 2 of the test board in
Fig. 3.20. The simulated result by the SMM with FDCL method is
compared against the measurement data. . . . . . . . . . . . . . . . . 81
3.23 The scattering (S
22
) parameter for Port 2 of the test board in Fig. 3.20.
The simulated result by the SMM with FDCL method is compared
against the measurement data. . . . . . . . . . . . . . . . . . . . . . . 81
3.24 Test printed circuit boards (PCBs) for analysis of the coupling effect
betweenthesignalvias. 83
3.25 Comparison of the S
11
parameters between the simulated results and
measurement data for the test boards in Fig. 3.24. . . . . . . . . . . . 84
3.26 Comparison of the S
21
parameters between the simulated results and
measurement data for the test boards in Fig. 3.24. . . . . . . . . . . . 85
3.27 Experimental setup using Agilent HP 8510C Vector Network Ana-
lyzer and HP 8517B S-parameter Test Set to measure the test vehicles
inFigs.3.20and3.24. 86
3.28 An irregular-shaped power-ground planes and cut-out structure (unit:
mm) 87
3.29 PMC cylinders formation in the FDCL at operation frequency of

1GHzforthefinitepower-groundplanes 88
3.30 PMC cylinders formation in the FDCL at operation frequency of
5GHzforthefinitepower-groundplanes 89
List of Figures xiii
3.31 Comparison of the transfer impedance by the SMM simulation with
the FDCL method against the measurement for the test board in
Fig.3.28. 89
4.1 A though-hole via in two-layer structure and forming three PPWGs. . 93
4.2 A though-hole via in multi-layer structure and forming PPWGs. . . . 115
4.3 Example 1 - a multilayered parallel-plate structure with three con-
ductor power-ground planes and 101 vias (unit: mm). . . . . . . . . . 122
4.4 Comparison of the input impedance seen from the top end of the
active via in Example 1: SMM algorithm with FDCL vs. HFSS
simulation 123
4.5 Example 2 - a multilayered parallel-plate structure with three con-
ductor power-ground planes and 221 vias (unit: mm). . . . . . . . . . 124
4.6 Input impedance seen from the top end of the active via in Example 2.125
4.7 Example 3 - a multilayered parallel-plate structure with six conductor
power-groundplanes(unit:mm). 127
4.8 Comparison of the Z
11
parameter simulated results for multilayered
structure of Example 3: SMM algorithm with FDCL vs. HFSS sim-
ulation. 128
4.9 Comparison of the Z
21
parameter simulated results for multilayered
structure of Example 3: SMM algorithm with FDCL vs. HFSS sim-
ulation. 128
4.10 Comparison of the Z

22
parameter simulated results for multilayered
structure of Example 3: SMM algorithm with FDCL vs. HFSS sim-
ulation. 129
List of Figures xiv
5.1 Signal trace route in power distribution network of an electronic pack-
age. 132
5.2 Three sub-domains applied in the modal decoupling; (a) multilayered
P-G planes, (b) signal traces, and (c) through signal vias. . . . . . . . 133
5.3 The per-unit-length equivalent circuit model for derivation of the
transmissionlineequations. 135
5.4 The equivalent network for multiconductor transmission lines. . . . . 144
5.5 Signal trace route in the power-ground planes of power distribution
network 147
5.6 Cross-sectionviewofthestriplineroute. 148
5.7 Transmission line representations of the stripline and its split model. . 149
5.8 Port voltages and currents defined for three equivalent networks. . . . 151
5.9 Combination for the equivalent Y-networks of the power-ground planes
andthesplitstripline. 151
5.10 Through-hole signal via and its equivalent circuit. . . . . . . . . . . . 153
5.11 PEC/PMC boundaries defined for analysis of the via region as a
bounded coaxial cavity. . . . . . . . . . . . . . . . . . . . . . . . . . . 154
5.12 Overall equivalent network for the signal trace routed in the power
distributionnetwork. 156
5.13 The dimensions of a signal trace routed between the power-ground
planes(topviewandsideview)(unit:mm). 158
5.14 Reflection and transmission characteristics of the signal trace shown
inFig.5.13. 159
List of Figures xv
5.15 The dimensions of a signal trace routed between the power-ground

planes (top view and side view). The black dots represent the decou-
plingcapacitors(unit:mm) 160
5.16 Reflection and transmission characteristics of the signal trace with
the decoupling capacitors shown in Fig. 5.15. . . . . . . . . . . . . . . 161
5.17 The dimensions of two coupled signal traces routed between the power-
ground planes (top view and side view) - Case 1. All black dots
representtheP-Gvias(unit:mm). 162
5.18 Reflection characteristic of the two coupled signal traces routed be-
tweenthepower-groundplanesshowninFig.5.17. 163
5.19 Transmission characteristic of the two coupled signal traces routed
betweenthepower-groundplanesshowninFig.5.17. 164
5.20 Crosstalk characteristic of the two coupled signal traces routed be-
tweenthepower-groundplanesshowninFig.5.17. 164
5.21 The dimensions of two coupled signal traces routed between the power-
ground planes - Case 2. All black dots represent the P-G vias (unit:
mm) 165
5.22 The dimensions of two coupled signal traces routed between the power-
ground planes - Case 3. All black dots represent the P-G vias (unit:
mm) 166
5.23 Simulation results for crosstalk characteristic analysis of two coupled
traces-Casestudy 166
A.1 Translationinthecylindricalcoordinatesystem 185
A.2 A schematic of the cylindrical coordinates in global expression for
cylinders p and q 186
List of Figures xvi
B.1 Definition for generalized cascade matrix of 2N-port network. . . . . 189
B.2 Totalgeneralizedmatrixofcascadednetworks 189
B.3 Cascade a 2N-portnetworkwithatwo-portnetwork. 191
List of Tables
2.1 Geometry details for simulation of signal traces in Fig. 2.2 . . . . . . 23

2.2 Crosstalkanalysis 24
2.3 Interconnectdelaycomparison 24
2.4 Comparison of results for the coupled microstrips in Fig. 2.5 . . . . . 30
4.1 Comparison of memory usage and computing time for Example 1 . . 123
4.2 Comparison of memory usage and computing time for Example 2 . . 125
4.3 Comparison of memory usage and computing time for Example 3 . . 129
xvii
List of Acronyms
EMC Electromagnetic Compatibility
EMI Electromagnetic Interference
FDCL Frequency-dependent Cylinder Layer
FDTD Finite-Difference Time-Domain
IE Integral Equation
MoM Method of Moments
MTL Multiconductor Transmission Line
PCB Printed Circuit Board
PDN Power Distribution Network
PEC Perfect Electric Conductor
PI Power Integrity
PMC Perfect Magnetic Conductor
SDN Signal Distribution Network
SI Signal Integrity
SMM Scattering Matrix Method
SOP System-On-Package
SSN Simultaneous Switching Noise
TE Transverse Electric
TEM Transverse Electromagnetic
TM Transverse Magnetic
xviii
Chapter 1

Introduction
1.1 Background Information
As one of the solutions for the low-cost and highly integrated system with multi-
ple functionalities, system-on-package (SOP) technology has recently emerged [1–3].
The SOP brings multiple semiconductor dies of various semiconductor processes and
materials, and passive devices such as termination resistors, decoupling capacitors,
inductors, waveguide, filters, and antennas into a three-dimensional package, to cre-
ate highly integrated products with optimized cost, size, and performance. Markets
for the SOP solution include wireless communication, networking, computing, and
sensor and storage system applications. To integrate these multiple dies and passive
devices into a tiny three-dimensional (3-D) SOP, adoption of high-density multilayer
substrate design is a common approach to mount the multiple dies on a substrate
with the embedded passives, which are laterally or vertically integrated onto the
package substrate.
The SOP has thus countless closely spaced metallic interconnection structures
such as traces, vias, pads, leads, partial planes, and plane cavities in a small package.
These densely spaced interconnection structures become sources of high-frequency
noise generation and noise coupling, imposing serious signal and power integrity
issues as well as electromagnetic interference (EMI) / electromagnetic compatibility
1
Chapter 1. Introduction 2
(EMC) problems [3].
These noise problems are obviously crucial concerns when the SOP substrate
and interconnections are designed. Similar problems arise with high-speed and high-
density multilayer printed circuit boards (PCBs), where many radio frequency (RF),
analog, and digital devices are integrated into a densely populated PCB. The noise at
the SOP or the PCB worsens noise and timing margin of digital and analog circuits,
resulting in reduction of achievable jitter performance, bit error rate (BER), and
system reliability. The coupled noise from fast switching digital devices can also
affect phase noise and signal to noise ratio (SNR) performance in RF and wireless

communication circuits.
In high-speed and high-density SOPs and PCBs, a major element of the high-
frequency noise is simultaneous switching noise (SSN) from fast-switching digital
circuits, as clock frequencies and the amount of switching current are significantly
increased.
1
There have been numerous studies of design and analysis methodologies
to reduce the SSN by using discrete on-chip and off-chip decoupling capacitors, and
by implementing embedded capacitors inside the multilayer PCB [4–10]. There has
been always a tradeoff between the reduction effects and the necessary cost and
manufacturing complexity to realize the solution.
The generated SSN could be transmitted to noise-sensitive circuits such as I/O
interface interconnects, phase-locked loops (PLLs), and RF circuits through power
delivery and ground return current paths as well as through signal traces and vias.
Among the SSN coupling paths at signal interconnections, the signal via is the most
significant noise coupling structure, especially when the signal path is exchanging
its reference planes. Figure 1.1
2
illustrates the coupling mechanism between the
SSN and a signal via with reference plane exchange through a power-ground plane
pair of the package [11–13]. The signal via is the heavily utilized interconnection
1
International Technology Roadmap for Semiconductors (ITRS), 2003.
2
Courtesy: Madhavan Swaminathan, Senior Member, IEEE, Joungho Kim, Senior Member,
IEEE,IstvanNovak,F ellow, IEEE,andJamesP.Libous,Senior Member, IEEE.
Chapter 1. Introduction 3
structure in high-density SOPs and PCBs and enables complicated routing between
many active and passive devices mounted on, or embedded inside, the multilayer
structure. To minimize radiated emission from such signal traces as microstrip

lines, strip lines are used and the signal via is necessary to make a transition from
the microstrip line to the strip line. Unless the two reference planes are tied together
using an electrically shorted circuit with minimal inductance, the signal interconnect
encounters a very large signal reflection and the SSN noise coupling caused by the
disrupted return current path at the reference plane transition [14,15]. When one of
the reference planes is a power plane and the other reference plane is a ground plane,
it is not possible to connect them with a low-inductance via. The signal reflection
and the noise coupling are maximal at resonance frequencies of the power-ground
planes.
Figure 1.1: Power distribution noises coupling in system-on-package (SOP). (Cour-
tesy: M. Swaminathan et al
2
)
1.2 Overview
The rapid progress of very large scale integration (VLSI) technology was in the past
mainly driven by the growth of the digital computing industry. In the later part
of the past century and currently, it is accelerated by the explosive growth of the
Chapter 1. Introduction 4
wireless communication and portable computing markets. This challenges many
aspects of the design process. With the trend in microprocessors toward higher
power and lower supply voltages, the power supply inductance has to continuously
decrease. In addition, the noise in the system is being generated by bouncing planes
due to the propagation of electromagnetic waves, resulting in significant coupling
and radiation. With increase in frequency and convergence toward mixed-signal
systems, supplying clean power to the integrated circuits and managing the noise
coupling in the system are very important and the power supply can be a major
bottleneck for the reliable functioning of the system [16, 17].
Modeling of power distribution networks represents an integral part of the power
delivery design process. In the last 15 years, the modeling methods have evolved
to a point where complex power distribution structures can be modeled accurately,

with minimum CPU time. This has led to design methodologies for the pre-layout
analysis and post-layout verification of the packages, which has enabled the design
of multi-giga-hertz microprocessors and systems [18].
In the early 1990s, the partial element equivalent circuit (PEEC) based methods
were developed for analyzing power distribution structures. These methods were
based on the seminal paper by Ruehli [19–24], which enabled the representation of
interconnections using partial inductances. The PEEC-based methods were used to
analyze Delta I or power supply noise in high-performance computers [25], packaged
CMOS devices [26] and the first level packages [27,28]. In [26], the effect of negative
feedback due to power supply noise on nonlinear CMOS inverters was discussed.
Finally, Fast Henry, a multipole based PEEC method, was developed in [29] for
speeding computations.
For the analysis of simultaneous switching noise as discussed in the previous
section, several papers have been published to analyze and accurately simulate the
SSN on power-ground planes and noise in signal lines caused by the interaction
between the power and the signal distribution systems [30–36]. A general model
of interaction between currents in signal vias and SSN voltage was presented and
Chapter 1. Introduction 5
has been implemented in a full-wave simulation tool, Sigrity PowerSI [31, 32]
3
.A
SPICE-type circuit model was proposed and compared with the full-wave simula-
tion tool. Further, various modeling methodologies have been proposed, including
numerical approaches such as the method of moments and finite-difference time-
domain method [31–37]. The SSN coupling phenomena to signal via have also been
analyzed by using the superposition principle and the transmission line theory in a
simple equivalent circuit model [31]. In [38], the similar approaches are used and a
simple equation is further proposed to predict the amount of the SSN coupled to
signal via. It is also a valuable research to develop efficient and practical methods
for minimizing the SSN coupling to the signal via. One suggested reduction method

is the use of a split power plane [35]. The balanced TLM modeling approach was
also reported to predict the SSN generation and PCB edge radiation excited by a
through-hole signal via, when the signal trace is exchanging reference planes [39,40].
With increase in clock frequencies, the frequency behavior of the power and
ground planes became important, and hence, their distributed modeling became
necessary. Distributed modeling of power distribution networks requires the de-
scritization of Maxwell’s equations, which can be formulated in the frequency or
time domain by solving integral or differential equations. Examples include the
finite-difference time-domain (FDTD) method [28,41–45], the finite element method
(FEM) [46] and frequency domain methods such as the transmission line method
[47], cavity resonator method [48, 49], transmission matrix method (TMM) [50],
quasi-TEM analysis methods [51–53], and integral equation method [54]. Since, elec-
tronic package’s power distribution networks are resonant circuits with high quality
factor, the frequency domain methods provide better accuracy and efficiency than
the time domain methods. Theoretically, those full-wave methods are versatile and
able to solve any power-ground planes and via problems. In reality, they have the
drawback due to large amount of memory usage and intensive CPU required.
More recently, a cylindrical wave expansion method combined with Foldy-Lax
3
SIGRITY PowerSI. Sigrity, Inc. [Online]. Available: www.sig rity.com.
Chapter 1. Introduction 6
formula [55] was applied to the analysis of a large number of vias in PCB or package
structures [56,57]. The approach is very efficient in addressing the coupling of a large
number of vias. However, the structure studied by authors in [57] was assumed to
be infinitely large, which failed to model finite-sized structures. In order to address
the boundary modeling problem, a virtual circular cylinder was proposed in [58]
to approximate the rectangular boundary of an electronic package. However, the
simulation results fail to correlate with measurement results, because such a crude
boundary approximation cannot accurately capture the interaction of the waves
with the periphery of packages. The image theory [59, 60] has been utilized to deal

with the finite-sized boundary of the parallel-plate structures recently. However, the
drawback of such an approach is obvious. Firstly, the image theory is cumbersome in
dealing with arbitrarily shaped boundary. Secondly, if the problem involves a large
number of vias, then the total number of vias to be finally solved will greatly increase
due to the addition of a large number of image vias. Although it can be used to tackle
multilayered parallel-plate structures, the cascaded microwave network approach
mentioned in [57] is not efficient in analyzing a large number of ports due to a large
number of vias. For the analysis of multiple via coupling in multilayered parallel-
plate structures of power distribution networks, a novel modeling method is required
to address the two open problems related to the modal expansion method [57, 58].
Among these proposed methodologies of equivalent circuit models, transmission
line theory based analysis, distributed modelings and full-wave numerical approaches
in literature, the cylindrical wave expansion method combined with Foldy-Lax for-
mula is a very efficient technique in addressing the coupling of a large number of
vias in PCB or package structures since geometry meshing for problem domain is
not necessary. The semi-analytical method [55, 56] was based on the modal wave
expansions of the vias and the multiple scattering formula of the vias. After consid-
ering the project requirements and the advantages of the cylindrical wave expansion
method combined with Foldy-Lax formula (such as efficient modeling on coupling for
a large number of vias and no meshing required), we have chosen the theory in [55]
and further enhanced in the modeling efficiency and accuracy of multilayered and