The architecture of computer hardware and systems software an information technology approach ch12

Chapter 12
Three System Examples
The Architecture of Computer Hardware
and Systems Software:
An Information Technology Approach
3rd Edition, Irv Englander
John Wiley and Sons 
2003


Three System Examples
 X86 Family
 PowerPC
 IBM System 360/370/390/zSeries
Family

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The X86 Family
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System Overview
The CPU
Registers
Instruction Set
Addressing Modes
Advanced Design Features
CPU Organization
The IA-64 Itanium Architecture

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System Overview
 Bus-oriented system I/O
 Nonmaskable interrupts
 Emergency situations

 Single maskable interrupt
 Supports 32 prioritized interrupts
 IRQ0 to IRQ31

 Upon receiving an interrupt, the CPU
reads an address on the data lines that
is used to jump to the interrupt routine
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The CPU
 Downward software compatibility
 Disabled protected mode
 Compatible with the original 8088 architecture

 Original Intel 8088 CPU
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16-bit processing and registers
16-bit internal data bus
8-bit external data bus
20-bit memory addressing – 1Mbyte total

 Current Pentium CPUs
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256-bit internal data bus
64-bit external data bus
2 levels of memory caching
Added floating point, multimedia, virtual storage, and multitasking
support

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Registers
 8088, 8086, 80286
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8 general-purpose registers
4 segment registers
1 flag register
Instruction pointer, and various control registers

 80386 – added 2 segment registers
 80486
 8 80-bit floating point registers
 Various floating point control registers

 Pentium MMX
 added registers for multimedia support

 Pentium III
 8 128-bit SIMD registers and control register

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General Purpose Registers

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Instruction Set and Format
Data transfer
Integer arithmetic
Branch
Bit manipulation, rotate and
shift
 String manipulation
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Chapter 12

 Input / Output
 Flag
 Instructions added in later
processors
 Floating point
 MMX
 SIMD

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Addressing Modes
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Register
Immediate
Direct Addressing
Register Deferred Addressing
Base Addressing
Indexed Addressing
Base Indexed Addressing

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Real Mode vs. Protected Mode
Real Mode

Protected Mode

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Advanced Design Features
 Protected Mode
 Virtual storage support
 Memory management
 Multitasking support through efficient task
switching

 Virtual 8086 Mode
 Can only be used when protected mode is
activated
 Calculates addresses the same way as real mode
 Allows the system to run several 8086 tasks at
once
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X86 Protection Levels

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CPU Organization
 Early processors
 Pipelined instruction fetch unit
 Single integer execution unit

 Current processors
 Modern superscalar, pipelined design
 Instruction decoder creates an intermediate set of
micro-operations, μops
 μops translate variable length and complex
instructions into a 3-operand fixed length format

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IA-64 Itanium Architecture
 EPIC Architecture
 Incorporates entire X86 instruction set and memory
model
 128 65-bit registers for programs
 128 80-bit floating point registers
 8 64-bit branch registers

 64 1-bit predicate registers
 Instead of instruction reordering, speculation and
predication is used for branch predictions
 IA-64 Mode
 64-bit logical addresses
 63-bit physical addresses

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The PowerPC
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System Overview
The CPU
Registers
Instruction Set
Addressing Modes
Advanced Design Features
CPU Organization

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System Overview
 Developed by Apple, Motorola, and IBM
 Bus-oriented I/O architecture that can
be interfaced with standard buses of
other personal computers
 Permits system components, bus
adapters, and devices developed for
other computers to be used with the
PowerPC processor
 Prioritized multi-level internal interrupts
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The CPU
 RISC design
 32-bit implementation
 32-bit registers and addressing
 Up to 36-bit physical and 52-bit virtual addresses

 64-bit implementation
64-bit registers and addressing
Superscalar design
Only 40 bits of interface to physical storage
Can run programs written for the 32-bit implementation

Supports floating point calculations, memory caching, and
virtual memory
 More current implementations also support vector processing
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PowerPC Processor
Characteristics

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Registers
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32 general purpose registers
32 floating point registers
Link register
Count register
Condition register
Fixed and floating point status registers
7400 processor series
 32 128-bit vector processing registers
 2 vector control registers

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PowerPC User Registers

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Instruction Set
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Integer
Floating point
Load / Store
Flow Control
Processor Control
Memory Control
15 Different instruction formats

 No specifically designed I/O instructions
because PowerPC uses memory mapped I/O
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Typical Instruction Formats

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Addressing Modes

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Address Translation Mechanisms

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