05 programming relay bit instructions Training PLC Allen Bradley

DAY 2
SESSION 1

5-1

LADDER LOGIC PROGRAMMING – BIT
INSTRUCTIONS

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


OBJECTIVES
After completing this module, you will be able to:
•

Relay-type Instructions:

• Describe the function of the normally open (examine if closed, XIC)
instruction
• Describe the function of the normally closed (examine if open, XIO)
instruction
• Explain the function and programming of the coil (output energize,
OTE), latch (output latch, OTL) and unlatch (output unlatch, OTU)
instructions
• Logic-type Instruction:
Explain
Explain
Explain
Explain

the function of the AND instruction
the function of the NOT instruction
the function of the OR instruction
the function of the Exclusive OR (XOR) instruction

5-2

•
•
•
•

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


I/O IMAGE FILES IN DATA STORAGE
The input image file in the processor stores the status of input
sensors connected to input module terminals
If the Input Sensor Is:

Then Its Corresponding Input Image Bit Is:

closed (on)

on (1)

open (off)

off (0)

The output image file controls the status of actuators wired to
output module terminals
If the Input Sensor Is: Then Its Corresponding Input Image Bit Is:
on (1)

open (off)

off (0)

5-3

closed (on)

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


RUNG LOGIC
• As each conditioning instruction is executed, the addressed
bit is examined to see if it matches a certain condition (on or
off)
• If a complete path of true conditions examined for are found,
the rung is set to true

5-4

• The rung must contain a continuous path of true instruction
from the start of the rung to the output for the output to be
enabled

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


RUNGS
Power
Rail

0000
0001
0002

5-5

Rung

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


INSTRUCTION
Ladder Logic can contain conditional input instruction
and output instructions. An example of a rung of Ladder
Logic is shown in the following graphics

Output Instruction

] [ ] [ ] [

( )

5-6

Conditional Input Instruction

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


BIT INSTRUCTIONS
Use the bit(relay-type) instructions to monitor and control the
status of bits.

ONS
XIO
XIC
Ladder Logic Programming – Bit Instructions

OSF
OTL
OTU
OTE

5-7

OSR

6 – 10 December 2010


5-8

BIT INSTRUCTIONS TYPES

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


EXAMINE IF CLOSE (XIC)
The XIC instruction examines the data bit to see if it is set

data bit = 0
Examine data bit

Rung-condition-out is false

Data Bit
Rung
Condition

data bit = 1

Rung-condition-out is true

5-9

end

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


EXAMINE IF OPEN (XIO)
The XIC: examines the data bit to see if it is cleared.

data bit = 0
Examine data bit

Rung-condition-out is true

Data Bit
Rung
Condition

data bit = 1

Rung-condition-out is False

5-10

end

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


OUTPUT ENERGIZE (OTE)
When OTE is enabled, controller sets data bit. When OTE is disabled,
controller clears data bit.

Rung
Condition

5-11

Data Bit

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


OUTPUT LATCH (OTL)
When enabled, OTE sets data bit. Data bit remains sets until cleared,
typically by OTU. When disabled, does not change status of data bit.

Rung
Condition

5-12

Data Bit

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


OUTPUT UNLATCH (OTU)
When enabled, OTU clears data bit. When disabled, does not change
status of data bit.

Rung 1

Rung1
Condition
Rung2
Condition
Data Bit
(light_2)

5-13

Rung 2

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


ONE SHOT (ONS)

When enabled and storage bit is cleared, ONS enables the reminder of
the rung. When disabled or storage bit is set, ONS disables the reminder
of the rung.

Switch_0

Add

1

Ladder Logic Programming – Bit Instructions

2

3

4

5

6

Scan
6 – 10 December 2010

5-14

Switch_1

ONE SHOT RISING (OSR)
When enabled and storage bit is cleared, OSR sets output bit. When
enabled and storage bit is set or when disabled, OSR clears output bit

Switch_1

Add

1

Ladder Logic Programming – Bit Instructions

2

3

4

5

6

Scan
6 – 10 December 2010

5-15

Storage Bit

ONE SHOT FALLING (OSF)
When disabled and the storage bit is set, the OSF instruction sets
the output bit. When storage bit is cleared, or when enabled, the
OSF instruction clears the output bit.

Switch_0

Add

1

Ladder Logic Programming – Bit Instructions

2

3

4

5

6

Scan
6 – 10 December 2010

5-16

Storage Bit

BOOLEAN LOGIC PROGRAMMING
A PLC can do nothing without a (ladder logic) program in it
The process of converting control objectives into a ladder logic
program requires:
• details of the process operations
• structured thought
• solid basic logic understanding

• Developed in the 1800’s by James Bool, an Irish mathematician
• Can model logical systems with equations which can then be simplified
and/or manipulated into new forms
• The variable for these equations can ONLY have a value of 0 for false, or
1 for true
• Adapt very well to ladder logic programming

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010

5-17

Boolean algebra provides the tools needed to analyze and design
these systems


BOOLEAN EQUATIONS
Consist of variables and operations and look very similar to
normal algebraic equations
Boolean operators:

• The four basic operators are:
AND
OR
NOT
eXclusive OR (XOR)

5-18

•
•
•
•

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


AND LOGIC
One instruction combined in series with another is “AND”
SW1

SW2

Normally open, N.O.
relay contact

N.O.

Boolean equation

AND
L-1

Battery

L-1 = SW1 ● SW2
SW1 SW2

Fig Conventional series circuit

SW1

SW2

L-1

N.O.

N.O.

Coil

0

0

0

1

0

0

0

1

0

1

1

1

The AND’s truth table

5-19

Fig PLC ladder diagram representation of the circuit above

L-1

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010

OR LOGIC
One instruction combined in parallel with another is “OR”
SW1
Boolean equation

OR
Battery

SW2

L-1

L-1 = SW1 + SW2
SW1 SW2

Fig Conventional series circuit
SW1

L-1

SW2

L-1

0

0

0

1

0

1

0

1

1

1

1

1

The OR’s truth table

Ladder Logic Programming – Bit Instructions

5-20

Fig PLC ladder diagram representation of the circuit above

6 – 10 December 2010


NOT LOGIC

SW1

L-1

Boolean equation

NOT

L-1 = SW2 = SW1
Fig N.O instruction

SW2 = SW1

L-1

SW1

SW2 = SW1

L-1

0

1

1

1

0

0

The NOT’s truth table

5-21

Fig Normally closed, N.C, instruction

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


EXCLUSIVE OR LOGIC
Boolean equation

XOR

L-1 = SW1  SW2
L-1 = (SW 1 ● SW2) + (SW1 ● SW2)
SW1

SW1

SW2

L-1

SW2

Fig Exclusive OR logic

SW1

SW2

L-1

0

0

0

0

1

1

1

0

1

1

1

0

5-22

The XOR’s truth table

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010


NEXT
SESSION 2

5-23

LADDER LOGIC PROGRAMMING – TIMER &
COUNTER

Ladder Logic Programming – Bit Instructions

6 – 10 December 2010