Lecture Digital signal processing: Lecture 6 - Zheng-Hua Tan

Digital Signal Processing, Fall 2006
Lecture 6: System structures for implementation

Zheng-Hua Tan
Department of Electronic Systems
Aalborg University, Denmark


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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Course at a glance
MM1

Discrete-time
signals and systems

MM2
Fourier-domain
representation

Sampling and
reconstruction
MM4

z-transform
MM3
2

DFT/FFT

System

System
analysis

System
structure
MM6

MM5
Filter design
MM7, MM8

MM9, MM10
Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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System implementation
„

LTI systems with rational system function e.g.

„

b0 + b1 z −1
H ( z) =
,

1 − az −1
Impulse response

| z |>| a |

h[n] = b0 a nu[n] + b1a n −1u[n − 1]
Linear constant-coefficient difference equation

„

y[n] − ay[n − 1] = b0 x[n] + b1 x[n − 1]
Three equivalent representations!
How to implement, i.e. convert to an algorithm or
structure?
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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

System implementation
The input-output transformation x[n] Æ y[n] can be
computed in different ways – each way is called an
implementation
‰ An implementation is a specific description of its
internal computational structure
‰ The choice of an implementation concerns with
„ computational requirements
„ memory requirements,
„ effects of finite-precision,
„ and so on

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Part I: Block diagram representation
Block diagram representation of
computational structures
Signal flow graph description
Basic structures for IIR systems
Transposed forms
Basic structures for FIR systems

„

„
„
„
„

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

System implementation
Impulse response

„

h[n] = b0 a nu[n] + b1a n −1u[n − 1]
y[n] = x[n] * h[n]
is infinite-duration, impossible to implement in this way.
However, linear constant-coefficient difference
equation provides a means for recursive computation
of the output

„

y[n] − ay[n − 1] = b0 x[n] + b1 x[n − 1]
y[n] = ay[n − 1] + b0 x[n] + b1 x[n − 1]
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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Basic elements
Implementation based on the recurrence formula
derived from difference equation requires

„

‰
‰
‰

adders

y[n] = ay[n − 1] + b0 x[n] + b1 x[n − 1]
multipliers
memory for storing delayed sequence values

Fig. 6.1

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Example of block diagram representation
A second-order difference equation

„

y[n] = a1 y[n − 1] + a2 y[n − 2] + b0 x[n]
H ( z) =

b0
1 − a1 z −1 − a2 z − 2

Demonstrates the
complexity, the steps,
the amount of resources
required.
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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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General Nth-order difference equation
N

M

y[n] = ∑ ak y[n − k ] + ∑ bk x[n − k ]
k =1

k =0

M

H ( z) =

v[n]

∑b z
k =0
N

−k

k

1 − ∑ ak z − k
k =1

A cascade of two systems!

X[n]Æv[n], v[n]Æy[n]

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Rearrangement of block diagram
„

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A block diagram can be rearranged in many ways
without changing overal function, e.g. by reversing
the order of the two cascaded systems.

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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System function decomposition
v[n]

M

H ( z) =

∑b z
k =0
N

−k

k

1 − ∑ ak z − k
k =1

⎛
⎞
⎜
⎟ M
1
⎜
⎟⎛⎜ b z − k ⎞⎟
= H 2 ( z ) H1 ( z ) =
∑k ⎠
N
⎜
− k ⎟⎝ k = 0
⎜ 1 − ∑ ak z ⎟
⎝ k =1
⎠
⎛
⎞
⎜
⎟
M
1
⎛

− k ⎞⎜
⎟
= H1 ( z ) H 2 ( z ) = ⎜ ∑ bk z ⎟
N
⎜
⎝ k =0
⎠ 1 − a z −k ⎟
⎜ ∑ k
⎟
⎝ k =1
⎠

w[n]

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

In the time domain
N

M

k =1

k =0

y[n] = ∑ ak y[n − k ] + ∑ bk x[n − k ]
M
⎧

v
[
n
]
bk x[n − k ]
=
∑
⎪⎪
k =0
⎨
N
⎪ y[n] = ∑ ak y[n − k ] + v[n]
⎪⎩
k =1
N
⎧
w
[
n
]
ak w[n − k ] + x[n]
=
∑
⎪⎪
k =1
⎨
M
⎪ y[n] = ∑ bk w[n − k ]
⎪⎩
k =0

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Minimum delay implementation
„

One big difference btw the two implementations
concerns the number of delay elements

N +M

max( N , M )

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Direct form I and II
„

Direct form I as shown in Fig. 6.3
‰

„

Direct form II or canonic direct form as shown in Fig.

6.5
‰

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A direct realization of the difference equation

There is a direct link between the system function
(difference equation) and the block diagram

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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An example
„

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Direct form I and direct form II implementation
1 + 2 z −1
H ( z) =
1 − 1.5 z −1 + 0.9 z − 2

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Part II: Signal flow graph description
„

„
„
„
„

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Block diagram representation of
computational structures
Signal flow graph description
Basic structures for IIR systems
Transposed forms
Basic structures for FIR systems

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Signal flow graph (SFG)
„

„

As an alternative to block diagrams with a few
notational differences.
A network of directed branches connecting nodes.

variable

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Signal flow graph

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Nodes in SFG represent
both branching points
and adders (depending
on the number of
incoming branches),
while in the diagram a
special symbol is used
for adders and a node
has only one incoming
branch.
SGF is simpler to draw.

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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From flow graph to system function
Fig. 6.12

w1[n] = w4 [n] − x[n]
w2 [n] = αw1[n]

w3 [n] = w2 [n] + x[n]
w4 [n] = w3 [n − 1]
y[n] = w2 [n] + w4 [n]

Not a direct form,

„

‰
‰

cannot obtain H(z) by inspection.
But can write an equation for each node
„ w4 [ n ] = w3 [ n − 1] involve feedback, difficult to solve
„

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By z-transform Æ linear equations

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

From flow graph to system function
⎧W1 ( z ) = W4 ( z ) − X ( z )
⎪
⎪W2 ( z ) = αW1 ( z )
⎪
⎨W3 ( z ) = W2 ( z ) + X ( z )
⎪
−1

⎪W4 ( z ) = z W3 ( z )
⎪⎩Y ( z ) = W2 ( z ) + W4 ( z )

⎧W2 ( z ) = α (W4 ( z ) − X ( z ))
⎪
⎪
⎨
−1
⎪W4 ( z ) = z (W2 ( z ) + X ( z ))
⎪Y ( z ) = W ( z ) + W ( z )
2
4
⎩

⎛ z −1 − α ⎞
⎟ X ( z)
Y ( z ) = ⎜⎜
−1 ⎟
⎝ 1 − αz ⎠
z −1 − α
If α is real, the system is ?
H ( z) =
1 − αz −1
Causal!
h[n] = α n −1u[n − 1] − α n +1u[n]
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All-pass

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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From flow graph to system function
„

Fig. 6.13

„

Fig. 6.12

Different implementations, different amounts of
computational resources
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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Part III: Basic structures for IIR systems
„

„
„
„
„

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Block diagram representation of

computational structures
Signal flow graph description
Basic structures for IIR systems
Transposed forms
Basic structures for FIR systems

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Direct form I
N

k =1

M

M

y[n] = ∑ ak y[n − k ] + ∑ bk x[n − k ]
k =0

H ( z) =

∑b z
k =0
N

−k

k

1 − ∑ ak z − k
k =1

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Direct form II
N

y[n] = ∑ ak y[n − k ] + ∑ bk x[n − k ]
k =1

M

M

k =0

H ( z) =

∑b z
k =0
N

−k

k

1 − ∑ ak z − k
k =1

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Example
H ( z) =

25

1 + 2 z −1 + z −2
1 − 0.752 z −1 + 0.125 z − 2

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Cascade form
Factor the numerator and denominator polynomials
M

H ( z) =

∑ bk z − k

k =0
N

1 − ∑ ak z − k
k =1

=A

M1

M2

k =1
N1

k =1
N2

k =1

k =1

∏ (1 − f k z −1 )∏ (1 − g k z −1 )(1 − g k* z −1 )
∏ (1 − ck z −1 )∏ (1 − d k z −1 )(1 − d k* z −1 )

b + b z −1 + b2 k z −2
H ( z ) = ∏ 0 k 1k −1
− a2 k z − 2
k =1 1 − a1k z
Ns

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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An example: from 2nd-order to 1st-order cascade
H ( z) =

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1 + 2 z −1 + z −2
(1 + z −1 ) ⋅ (1 + z −1 )
=
1 − 0.752 z −1 + 0.125 z − 2 (1 − 0.5 z −1 ) ⋅ (1 − 0.25 z −1 )

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Parallel form by partial fraction expansion
Np

N1

Ak
−1
k =1 1 − c k z

H ( z) = ∑ Ck z −k + ∑

k =0

N2

Bk (1 − e k z −1 )

k =1

(1 − d k z −1 )(1 − d *k z −1 )

+∑

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Feedback in IIR systems
Feedback loop: a closed path
Necessary but not sufficient
condition for IIR system
(Feedback introduced poles
could be cancelled by zeros)

a nu[n]

H ( z) =
y[n] = ay[n] + x[n]

y[n] = x[n] /(1 − a)

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1 − a 2 z −2
= 1 + az −1
−1
1 − az

All loops must contain at least
one unit delay element

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Part IV: Transposed forms
„

„
„
„
„

30

Block diagram representation of
computational structures
Signal flow graph description
Basic structures for IIR systems
Transposed forms
Basic structures for FIR systems

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Transposed form for a first-order system
Flow graph reversal or
transposition also
provides alternatives:
reversing the directions
of all branches and
reversing the input and
output
Resulting in same H(z)

H ( z) =

31

1
1 − az −1

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Transposed direct form II and direct form II
The transposed direct form II implements the zeros
first and then the poles, being important effect for
finite-precision existing

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Part V: Basic structures for FIR systems
„

„
„
„
„

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Block diagram representation of
computational structures
Signal flow graph description
Basic structures for IIR systems
Transposed forms
Basic structures for FIR systems

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Direct form
„

„

„

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So far, system function has both poles and zeros.
FIR systems as a special case.
Causal FIR system function has only zeros (except
for poles as z=0)
M
⎧b , n = 0,1,..., M
y[n] = ∑ bk x[n − k ]
h[n] = ⎨ n
k =0
⎩0, otherwise
Form I and form II are the same.

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Cascade form
Factoring the polynomial system function
M

H ( z ) = ∑ h[n]z
n =0

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−n

Ms

= ∏ (b0 k + b1k z −1 + b2 k z − 2 )
k =1

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Linear-phase FIR systems
Generalized linear-phase system

„

H (e jω ) = A(e jω )e − jωα + jβ
A(e jω ) is a real function of ω ,

α and β are real constants
Causal FIR systems have generalized linear-phase
if h[n] satisfies the symmetry condition

„

h[ M − n] = h[n], n = 0,1,..., M
or
h[ M − n] = −h[n], n = 0,1,..., M
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M

y[n] = ∑ bk x[n − k ]
k =0

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Linear-phase FIR systems
if M is an even integer
M

y[n] = ∑ h[k ]x[n − k ]
k =0

=

M / 2 −1

∑ h[k ]x[n − k ] + h[k / M ]x[n − M / 2] +
k =0

=

M

∑ h[k ]x[n − k ]

k = M / 2 +1

M / 2 −1

M / 2 −1

k =0

k =0

∑ h[k ]x[n − k ] + h[k / M ]x[n − M / 2] + ∑ h[M − k ]x[n − M + k ]

if h[ M − n] = h[n]
y[n] =

M / 2 −1

∑ h[k ]( x[n − k ] + x[n − M + k ]) + h[k / M ]x[n − M / 2]
k =0

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Linear phase FIR systems
M is an even integer and h[M-n]=h[n]

y[n] =

M / 2 −1

∑ h[k ]( x[n − k ] + x[n − M + k ]) + h[k / M ]x[n − M / 2]
k =0

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Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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Discussions
„
„

„

39

Implementation of FIR and IIR systems
Use signal block diagram flow graph representation
to show the computational structures
Although two structures may have equivalent inputoutput charateristics for infinite-precision
represenations of coefficients and variables, they
may have dramatically different behaviour when the
numerical precision is limited.

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

Summary
„

„
„
„
„

40

Block diagram representation of
computational structures
Signal flow graph description
Basic structures for IIR systems
Transposed forms
Basic structures for FIR systems

Digital Signal Processing, VI, Zheng-Hua Tan, 2006

20


Course at a glance
MM1

Discrete-time
signals and systems

MM2
Fourier-domain
representation

Sampling and
reconstruction
MM4

z-transform
MM3
41

DFT/FFT

System

System
analysis

System
structure
MM6

MM5

Filter design
MM7, MM8

MM9, MM10
Digital Signal Processing, VI, Zheng-Hua Tan, 2006

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