EXPERIMENT # 8
PULSE CODE MODULATION
1/27/2010
Group:
PURPOSE
The objectives of this laboratory are:
1. To investigate the serially encoded PCM signal.
2. To make signal-to-noise measurements of the PCM system.
3. To investigate synchronous and asynchronous PCM techniques.
4. To investigate properties of the TDM-PCM communication system.
EQUIPMENT LIST
1. PC With Matlab and Simulink
Laboratory Procedure
I . PCM Familiarization
A. The analog to digital conversion properties of the PCM was investigated in the last
experiment.
The “start” bit and the 7 data bits and two “stop” bits were identified. It was also found that if the
parity switch is on, then the 1
st
stop bit is changed to an even parity bit. That is, the 7 data bits
plus the parity bit will always be an even number (refer to figure 8 B)
B. Set up Figure 8A. the MSB-LSB quantization switches are to be implemented using the
Sample and hold and Quantizer blocks. The outputs is to be fed via a MUX and the input
compared with the output and the error in tracing the signal is observed using a very low
frequency sine wave. The effect of changes in amplitude should also be studied. All the
results should match the ones summarized below.
figure 8A (a) PCM timing
The output of the above circuit implementation is shown below in the following CRO’s.
figure 8A (b) Input to PCM timing
The output muxed with the input is shown in figure below
figure 8A (c) Output Muxed with Input for PCM timing
The block parameters of the quantizer is shown below
figure 8A (d) Quantizer block parameters
The whole PCM timing block implementation is shown below
figure 8A (e) PCM timing- Full implementation
Here are the block paramters of the quantizer encode and the decode blocks. The triger signal is
provided using a pulse generator.
figure 8A (f) Block Parameters Enabled quantizer encode
Similarly the block parameters for the quantization decode is shown below.
figure 8A (g) Block Parameters Enabled quantizer decode
The digital output signal is as shown below.
figure 8A (h) Block Parameters Enabled quantizer decode
The quantization values are shown below
figure 8A (i) Quantization values