Advanced contact engineering for silicon, germanium and germanium tin devices

ADVANCED CONTACT ENGINEERING
FOR SILICON, GERMANIUM,
GERMANIUM-TIN DEVICES





TONG YI






NATIONAL UNIVERSITY OF SINGAPORE
2014






ADVANCED CONTACT ENGINEERING
FOR SILICON, GERMANIUM,
GERMANIUM-TIN DEVICES

TONG YI
(M. Eng.), NUS



A THESIS SUBMITTED
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY
DEPARTMENT OF ELECTRICAL AND COMPUTER
ENGINEERING
NATIONAL UNIVERSITY OF SINGAPORE
2014


i

Declaration


I hereby declare that the thesis is my original work and it has been written by
me in its entirety. I have duly acknowledged all the sources of information which
have been used in the thesis.
This thesis has also not been submitted for any degree in any university
previously.




TONG YI
20 July, 2014

ii
Acknowledgements

First and foremost, I would like to express my appreciation to my research
advisor, Professor Yeo Yee Chia for his patient guidance throughout my Ph.D
candidature at National University of Singapore. His knowledge and innovation in
the field of semiconductor devices and nanotechnology has been truly inspirational. I
am thankful to him for sharing his knowledge and experiences, and have benefitted
immensely from the regular discussions with him.
I would like to thank Dr. Chua Lye Hing and Dr. Todd Henry for their
valuable discussion and suggestion throughout the collaboration during the course of
my research. Special thanks to Professor Teo Kie Leong and Associate Professor
Daniel Chua who have provided many useful discussions for my Ph.D qualification
exam. I am also grateful to Dr. Deng Jie, Mr. Chum Chan Choy, Mr. Lin Poh Chong,
Ms. Lai Mei Ying, and Ms. Teo Siew Lang for their great help while I was doing
device fabrication and measurement in Institute of Materials Research and
Engineering.
I would also like to acknowledge the efforts of the technical staffs in Silicon
Nano Device Laboratory (SNDL) specifically O Yan Wai Linn, Patrick Tang, Dr.
Sandipan Chakraborty, Yu Yi, Lee Weng Fook, Hoe Yeow Liang, Htike Aung, Kyaw
Kyaw Oo, Yong Yu Fu, Lau Boon Teck, Sun Zhiqiang in providing technical and
administrative support for my research work.
I am also grateful for the friendship and discussions from the many
outstanding researchers and graduate students of SNDL. Many thanks to Annie,

iii
Ashvini, Cheng Ran, Chunlei, Dong Yuan, Du Fang, Eugene, Genquan, Gong Xiao,
Guo Cheng, Han Han, Huaxin, Ivana, Ji Dong, Kain Lu, Kian Hui, Lanxiang, Lei
Dian, Lingzi, Liu Bin, Maruf, Pannir, Pengfei, Phyllis, Sachin, Samuel, Shao-Ming,
Sujith, Sun Lu, Tong Xin, Vijay, Wang Wei, Wenjuan, Xingui, Xinke, Xu Xin, Yang

Yue, Yinjie, Yu Pu, Zhou Qian, Zhu Zhu, and many others. I‘m grateful that our
paths have crossed and I wish all of you a continuous success in future.
Last but not least, my deepest thanks and profound gratitude go to my beloved
family for their continuous encouragements and support. I would like to thank my
parents Tong Xiao Ping and You Jin Song, for giving birth to me at the first place and
supporting me spiritually throughout my life. To my sisters Cong Cong, Ding Xiao
Sui, and Yu Ke Xin, thank you for your encouragement throughout this journey. I am
grateful to my mother-in-law and father-in-law for all of the sacrifices that you‘ve
made on my behalf. Words can not express how grateful I am to my beloved wife,
Peng Na, throughout my candidature. Thank you for your love and understanding. To
my beloved son Tong Hao Ze, I would like to express my thanks for being such a
good boy always cheering me up. This thesis is dedicated to them.

iv
Table of Contents
Declaration …………………………………………………………….i
Acknowledgements ii
Table of Contents iv
Summary ………………………………………………………… viii
List of Tables x
List of Figures xi
List of Symbols xxii
List of Abbreviations xxiv
Chapter 1 Introduction
1.1 Challenges to CMOS Scaling: A Background 2
1.2 Metal-Semiconductor Contacts 4
1.2.1 Metal-Silicon Contacts 6
1.2.2 Metal-Germanium Contacts 7
1.3 Development of Advanced Contact Engineering Techniques 9
1.3.1 Dopant Segregation Technique 9

1.3.2 Insertion of Interfacial Layer between Metal and Semiconductor 12
1.3.3 Epitaxial Metal and Semiconductor Interface 15
1.3.4 Technology Requirements for Specific Contact Resistivity 15
1.3.5 Specific Contact Resistivity Reduction for Si and Ge Contacts 17
1.3.6 Specific Contact Resistivity Extraction 20
1.3.7 Four Terminals Cross Bridge Kelvin Structure 22
1.4 Objectives of Research 25
1.5 Thesis Outline and Original Contributions 26

v
Chapter 2 Cold Silicon Pre-amorphization Implant and Pre-
silicide Sulfur Implant for Advanced Nickel Silicide Contacts
2.1 Background 29
2.2 Device Fabrication 31
2.3 Results and Discussion 33
2.3.1 Benefits Of Cold Si Pre-amorphization Implant On Nickel Silicide
Formation 33
2.3.2 Electrical Characterization Of Diodes With Cold Silicon Pre-
Amorphization Implant and Sulfur Implant 38
2.3.3 Mechanism For The Effective Schottky Barrier Height Modulation
In Nickel Silicide Contacts 41
2.4 Summary 51
Chapter 3 Selenium Segregation for Effective Schottky Barrier
Height Reduction in NiGe/n-Ge Contacts
3.1 Background 52
3.2 Device Fabrication 53
3.3 Results and Discussion 56
3.3.1 Electrical Characteristics of Schottky Diodes 56
3.3.2 Physical Characterization Of Ge Samples With Selenium Or Sulfur
Implant 58

3.3.3 Proposed Mechanism For Reducing The Effective Schottky Barrier
Height of Nickel Monogermanide Contacts with Se or S Segregaion 65
3.4 Summary 68
Chapter 4 Low Specific Contact Resistivity Nickel
Monogermanide Contacts on N-type Germanium using a New High
Temperature Phosphorus and Sulfur Co-Implant Technique
4.1 Background 69
4.2 Benefits of High Temperature Implantation in Ge 71
4.3 Device Fabrication 77

vi
4.4 Electrical Characteristics 80
4.5 Mechanism of ρ
c
Reduction by HT P
+
and S
+
Co-Implantation 84
4.6 Effect of Metal Thickness on the Accuracy of the Extraction of the
Specific Contact Resistivity 89
4.7 Failed Experiment of Ge FinFET Fabrication 94
4.8 Summary 99
Chapter 5 Ni(Ge
1-x
Sn
x
) Ohmic Contact Formation on N-type Ge
1-
x

Sn
x
using Selenium or Sulfur Implant and Segregation
5.1 Background 100
5.2 Device Fabrication 102
5.3 Results and Discussion 104
5.3.1 Material Characterization Of Blanket Samples Of Nickel
Stanogermanide Films With Selenium Or Sulfur Implant 104
5.3.2 Electrical Characterization Of Diodes With Selenium Or Sulfur
Implant 105
5.3.3 Mechanisms For Reduction Of The Effective Schottky Barrier
Height In Selenium Or Sulfur Implanted Nickel Germanium Tin Contacts 110
5.4 Summary 118
Chapter 6 Conclusion and Future Work
6.1 Conclusion 119
6.2 Contributions of This Thesis 120
6.2.1 Cold Silicon Pre-amorphization Implant and Pre-silicide Sulfur
Implant for Advanced Nickel Silicide Contacts 120
6.2.2 Selenium Segregation for Effective Schottky Barrier Height
Reduction in NiGe/n-Ge Contacts 120
6.2.3 Low Specific Contact Resistivity Nickel Monogermanide Contacts
on N-type Germanium using a New High Temperature Phosphorus and
Sulfur Co-Implant Technique 121

vii
6.2.4 Ni(Ge
1-x
Sn
x
) Ohmic Contact Formation on N-type Ge

1-x
Sn
x
using
Selenium or Sulfur Implant and Segregation 121
6.3 Future Directions 122
6.3.1 Laser Annealing for Achieving Dopant Segregation for Ge and
GeSn Contacts 122
6.3.2 Co-implantation of Chalcogens For Ge And GeSn Contacts 123
6.3.3 Monolayer Doping Technique For Ge And GeSn Contacts 123
6.3.4 Physics And Chemistry Of Metal/Ge or Metal/GeSn Interface 124
References 125
Appendix 146
List of Publications 146


viii
Summary

This thesis involves the development of new contact engineering techniques
for future generation of metal–oxide–semiconductor field-effect transistor (MOSFET)
and other semiconductor devices. According to the International Technology
Roadmap for Semiconductors (ITRS) 2013, silicon (Si) will remain the main
semiconductor material of MOSFET for the foreseeable future. For sub-10 nm
technology node, new materials are needed to replace silicon as an alternate channel
and source/drain to increase the saturation velocity. Germanium and germanium-tin
are possible candidates due to their high carrier mobility. This thesis documents work
performed on contact engineering for Si, Ge, and GeSn devices.
Low contact resistance is needed for advanced Si based devices and also new
generation of Ge or GeSn based devices. Contact resistivity at the interface between

metal and source and drain (S/D) region in a MOSFET is dependent exponentially on
Schottky barrier height at the interface. In this thesis, through ion-implantation of
impurity elements at the interface between metal and semiconductor (e.g. Si, Ge, and
GeSn), modulation of Schottky barrier height has been developed. Due to the ease of
adoption by the semiconductor industry, nickel silicide (NiSi), nickel germanide
(NiGe), and nickel stanogermanide [Ni(Ge
1-x
Sn
x
)] are used in this work for Si, Ge,
and GeSn contacts, respectively.
Novel low temperature pre-amorphization implantation (PAI) is developed for
Si contacts together with sulfur (S) segregation implant, achieving increase of
agglomeration temperature of NiSi and reduction of electron Schottky barrier height

ix
of NiSi/n-Si simultaneously. The mechanism responsible for the reduction of
electron Schottky barrier height is also studied through extensive material
characterization and technology computer aided design (TCAD) simulation. In
addition, selenium and sulfur segregation are developed for Ge based contacts for the
reduction of electron Schottky barrier height. Furthermore, novel high temperature
implantation is developed for reducing the implant induced damage and single
crystalline Ge is achieved after implantation. The contact resistivity of metal and n-
type Ge contact is high due to Fermi level pinning. High temperature phosphorus (P)
and S co-implant is developed for reduction of electron Schottky barrier height of
NiGe/n-Ge contacts. Finally, Se and S segregation are developed for reduction of
electron Schottky barrier height of GeSn contacts for future semiconductor devices.

x
List of Tables

Table 1.1 Process technology requirements for maximum specific contact
resistivity for multi-gate transistors in ITRS 2013 [9]. 16


xi

List of Figures
Fig. 1.1. A chart showing the technology trend of CMOS scaling in terms of
device structures and materials [4]-[8]. Cross-sectional TEM images
of transistors for technology nodes from 90 nm to 32 nm and
germanium channel transistor are shown here. Tilt top-view SEM
images are shown for Si FinFETs of 22 nm node and III-V Fin for
future technology nodes. 3
Fig. 1.2. (a) Schematic showing the contact resistance R
c
at
metal/semiconductor interface. (b) Energy band diagram of a metal/n-
type semiconductor contact at thermal equilibrium. E
fm
is the Fermi
level of the metal, E
c
is conduction band edge, E
v
is the valence band
edge, E
f
is the Fermi level of semiconductor. 5
Fig. 1.3. Experimental Schottky barrier height of metal and metal silicides on n-
type Si against the work function of the metals [34]. The straight line

marks the prediction of Schottky barrier height of metal/n-Si contacts
without Fermi level pinning. 7
Fig. 1.4. Schematic illustrating the stronger Fermi level pinning in Ge near the
valence band edge compared to Si [29]. The Fermi levels of various
metals are pinned to 0.08-0.09 eV above the valence band (VB) of Ge. 8
Fig. 1.5. Schematic illustration of the dopant segregation technique. (a) Ion
implant to semiconductor substrate. (b) Top region of semiconductor
receives ion implantation. (c) Ni deposition by e-beam evaporator or
physical sputter machine. (d) Segregation of implanted species at
metal/semiconductor interface after silicidation or germanidation
process. 10
Fig. 1.6. SIMS depth profiles of S for various S implantation doses after Ni
silicidation at 550 °C [49]. Peaks of S signal were clearly observed at
NiSi/n-Si interface, indicating S segregation at NiSi/n-Si interface. 11

xii
Fig. 1.7. Effective Schottky barrier height as a function of the implantation dose
for the NiGe/n-Ge contact with As segregation [94]. 12
Fig. 1.8. J-V characteristics of Al/GeO
x
/n-Ge and Al/GeO
x
/p-Ge diodes. It is
clearly indicated that the insertion of GeO
x
effectively reduces
electron Schottky barrier height and increases the hole Schottky
barrier height [109]. 14
Fig. 1.9. Measured contact resistance against the thickness of insertion SiN
layer for Al/n-Si and Al/n-Ge contacts [106]. Optimum thicknesses of

SiN were found to be 1 nm and 2 nm for Al/n-Si and Al/n-Ge contacts,
respectively. 14
Fig. 1.10. Benchmarking of the specific contact resistivity of (a) n-type Si and
Ge contacts and (b) p-type Si and Ge contacts with various substrate
doping concentrations. The red color dotted line indicates the
requirement of the specific contact resistivity for 15 nm technology
node in ITRS 2013 (9 × 10
-9
·cm
2
). 20
Fig. 1.11. (a) A transfer length method test structure. The resistance between
two adjacent metal pads are measured for various spacings. (b) A plot
of resistance as a function of the contact spacing, d. 22
Fig. 1.12. A four-terminal cross bridge Kelvin structure. (a) Cross sectional
view along pads 1 and 2. (b) Top view of the structure. 23
Fig. 1.13. Relative error of ρ
c
extracted by the cross bridge Kelvin structure as a
function of the true ρ
c
with various contact area [202]. 25

Fig. 2.1. (a) Process flow for fabrication of NiSi/n-Si diodes, incorporating cold
Si pre-amorphization implant and S implant. The key process steps
are schematically illustrated in (b)-(g). Blanket samples, where the
SiO
2
isolation regions were not formed, were also fabricated for
physical analyses. 32

Fig. 2.2. TEM images of the blanket samples received (a) the room temperature
Si PAI and (b) the cold (‒100 °C) Si PAI. (c) TEM image of a
NiSi/crystalline-Si (c-Si) structure after 450 °C 30 s silicidation for the

xiii
sample that received cold Si implant. (d) High magnification TEM
image of the NiSi/c-Si interface in (c). (e) Box plot of the thicknesses
of the amorphous Si layers for the samples with RT Si implant and
Cold Si implant. The thickness of amorphous Si layer was measured
at 10 points along the amorphous and crystalline Si interface in (a) and
(b). The cold Si PAI leads to a slightly thicker amorphous layer. 35
Fig. 2.3. Sheet resistance R
sh
as a function of silicidation temperature for NiSi
films formed on control samples (without PAI and S implant), samples
with cold Si PAI, and samples with cold Si PAI and S implant. The
annealing time was 30 s for all samples. Eight samples were used for
each curve, and one annealing or silicidation temperature was used for
each sample. R
sh
was measured using a four-point probe. 36
Fig. 2.4. SEM images of the top surface of NiSi/n-Si samples with and without
the cold Si PAI and S implant, observed after annealing for 30 s at the
various temperatures. The agglomeration of NiSi occurs at ~650 °C
for the control sample. A delay of the agglomeration is clearly
observed for the sample that received the cold Si PAI and S implant. 38
Fig. 2.5. (a) Room temperature current-voltage characteristics of NiSi/n-Si
contact devices formed with and without the cold Si PAI and S
implant. (b) Arrhenius plot of NiSi/n-Si contact with the cold Si PAI
and S implant. The data fitting was only done in the low temperature

part of the Arrhenius plot in order to avoid the effect of series
resistance. The inset shows the low temperature current-voltage
characteristics used to extract Φ
B
n
. The area of diode is 100 µm × 100
µm in the experiment. 40
Fig. 2.6. (a) The SIMS depth profiles of Ni and Si in the NiSi/n-Si contact after
450 °C 30 s annealing. (b) The SIMS depth profiles of Ni, Si, and S
in the NiSi/n-Si contact with the cold Si and S implant after 450 °C 30
s annealing. Obvious S segregation peak was found near NiSi/n-Si
interface. It is believed that S atoms were pushed to the interface due
to the snowplow effect. 43

xiv
Fig. 2.7. (a) The structure used in the simulation. S was modeled as the donor-
like traps underneath the interface. (b) Experimental obtained profile
of S (circle) as a function of depth from the NiSi and n-Si interface,
the profile of modeled S traps (solid line), and the profile of ionized S
(dash line) are shown. 45
Fig. 2.8. Simulated energy band diagram across the NiSi and n-Si interface for
the samples with and without S traps. E
f
, E
c
, and E
v
are the Fermi
energy level, conduction, and valence band edge, respectively. 46
Fig. 2.9. (a) Simulated I-V characteristics of NiSi/n-Si contacts with various η

(ratio of S atoms that act as donor-like traps). The curve with η of
20% shows a similar reverse current compared to the experimental
result. (b) Rectifying factor at ±1V as a function of η. Ohmic contact
can be achieved when η is larger than 40%. 49
Fig. 2.10. The simulated current-voltage characteristics of NiSi/n-Si contact
with η of 20% at various temperatures. 50
Fig. 2.11. The Arrhenius plot for Φ
B
n
extraction using the simulated reverse
currents at – 0.1 V. Φ
B
n
has a value of 0.2 eV. 50

Fig. 3.1. Process flow of NiGe/n-Ge Schottky diodes with pre-germanide Se or
S implant and segregation. 54
Fig. 3.2. Simulated Se and S as-implant profiles using TRIM software. The
projected ranges (R
p
) for the implanted species Se and S calculated
using TRIM software are 66 and 68 Å, respectively. 54
Fig. 3.3. The top-down view of the diode structures after unreacted metal
removal using the optical microscopy. The opening area is 100 µm ×
100 µm. 55
Fig. 3.4. Room temperature current-voltage characteristics of NiGe/n-Ge
contact devices formed with pre-germanide Se or S implant. The
contact has an area of 100 × 100 μm
2
. Φ

B
n
was extracted using
activation energy method. The extracted Φ
B
n
of the samples with Se
and S implants are 0.13 and 0.1 eV, respectively. The rectifying

xv
behaviour for the control sample indicates strong Fermi level pinning
near the valence band edge of n-Ge. Φ
B
n
is 0.61 eV for the control
sample without implant. 57
Fig. 3.5. Low temperature current-voltage characteristics of NiGe/n-Ge
Schottky diodes formed with pre-germanide Se implant (8 keV, 1 ×
10
15
cm
-2
). The inset shows the Arrhenius plot used to extract the Φ
B
n
.
In order to avoid the influence of the voltage drop across the Ge
substrate series resistance, the currents under reverse bias (-0.1 V) at
temperatures ranging from 260 to 285 K were used to extract the
effective Schottky barrier height. Φ

B
n
of the sample with S implant
was extracted using the same method. The extracted Φ
B
n
of the
sample with Se implant is 0.13 eV. 58
Fig. 3.6. Cross sectional TEM images show Ge surface amorphization caused
by Se or S implant at a dose of 1 × 10
15
cm
-2
. The interface between
amorphous and crystalline Ge is obviously found. The amorphization
of top Ge surface region is caused by the Se or S implant induced
damage. The TEM was performed by Dr. Qian Zhou of the
Department of Electrical and Computer Engineering using the
facilities at the Department of Materials Science and Engineering. 60
Fig. 3.7. Cross sectional TEM images of NiGe/n-Ge samples with and without
Se or S implant after 350 °C 30 s annealing in a N
2
ambient. No
obvious interfacial layers are found for all splits. 61
Fig. 3.8. Thicknesses of NiGe films were measured at 10 positions along the
NiGe/n-Ge interface from the TEM images in Fig. 3.5. 62
Fig. 3.9. Top view SEM images show smooth NiGe top surfaces for all samples. 63
Fig. 3.10. XRD phase analysis of NiGe/n-Ge films with pre-germanide Se and S
implants. The peaks of signal reveal that Se and S do not affect low-
resistivity nickel monogermanide formation. 63

Fig. 3.11. The depth profiles of the implanted species in NiGe/n-Ge contacts
with S implant (5 keV, 1 × 10
15
cm
-2
). Obvious S segregation peak

xvi
was found at NiGe/n-Ge interfaces. Another S peak was found inside
the NiGe film near the surface. 64
Fig. 3.12. The depth profiles of the implanted species in NiGe/n-Ge contacts
with Se implant (8 keV, 1 × 10
15
cm
-2
). Obvious Se segregation peak
was found at NiGe/n-Ge interfaces. 65
Fig. 3.13. Se distribution profile inside n-Ge substrate used in TCAD simulation.
The Se distribution profile matches with the profile measured by
SIMS. 66
Fig. 3.14. Simulated energy band diagram of NiGe/n-Ge contacts without any
implant. The depletion width is wide compared with that of contacts
with Se implant. 67
Fig. 3.15. Simulated energy band diagram of NiGe/n-Ge contacts with Se
implant. The depletion width is narrow, so that electrons may tunnel
through the barrier. 68

Fig. 4.1. (a) Cross-sectional TEM image of Ge substrate that received room
temperature (25 °C) phosphorus implant with a dose of 2 × 10
15

cm
-2

at an energy of 20 keV. The top Ge layer becomes amorphous. The
thickness of the amorphous Ge layer is ~30 nm. The TEM was
performed as an external service job at IMRE. (b) High magnification
cross-sectional TEM image of interfacial region between the
amorphous and crystalline Ge. The implant induced amorphous Ge is
clearly observed. 73
Fig. 4.2. (a) Cross-sectional TEM image of Ge substrate that received high
temperature (400 °C) phosphorus implant with a dose of 2 × 10
15
cm
-2

at an energy of 20 keV. (b) High magnification cross-sectional TEM
image of Ge region that received high temperature phosphorus implant
(400 °C) shows good monocrystalline lattice, indicating self-
crystallization during the high temperature phosphorus implant. 73
Fig. 4.3. (a) Schematics of Ge fin structure on top of the buried oxide layer
(BOX) and Si substrate. The fin structure received high temperature

xvii
(400 °C) phosphorus implant with a dose of 2 × 10
15
cm
-2
at an energy
of 30 keV. (b) Tilted cross-sectional SEM image of Ge fin structure
in the A-A‘ plane. The fin width is ~150 nm. (c) Cross-sectional

TEM image of Ge fin in the A-A‘ plane. (d) High magnification
cross-sectional TEM image of Ge fin. Damage-free crystalline Ge fin
is observed. 74
Fig. 4.4. Depth profiles (obtained by SIMS) of P in the blanket Ge samples with
high temperature P
+
implant at 400 °C and room temperature P
+

implant followed by RTA annealing at 400 °C for 135 s. The high
temperature P
+
implant leads to a slightly deeper junction than room
temperature P
+
implant sample with additional annealing. It is caused
by the lack of an amorphous layer during the HT implant process. 76
Fig. 4.5. (a) Cross-sectional TEM image of Ge substrate that received high
temperature (400 °C) phosphorus implant with a dose of 2 × 10
15
cm
-2

at an energy of 30 keV followed by high temperature (400 °C) sulfur
implant with a dose of 5 × 10
14
cm
-2
at an energy of 5 keV. (b) High
magnification cross-sectional TEM image of Ge surface region shows

good single crystalline Ge. 76
Fig. 4.6. Depth profiles of S in the high temperature P
+
and S
+
as-implanted Ge
sample and activated Ge sample annealed at 550 °C 30 s using RTA.
The SIMS was performed as an external service job at IMRE. 78
Fig. 4.7. (a) Process flow for fabrication of the n-Ge TLM structure. High
temperature phosphorus and sulfur co-implant was used for the first
time. NiGe was formed by RTA. (b) Schematic illustrating the TLM
structure with NiGe on top of n-Ge mesa on p-Ge substrate. 79
Fig. 4.8. Top view SEM image of a TLM structure. The bright color rectangle
regions are NiGe contacts. The numbers indicate the various spacings
d of TLM structure in units of µm. 79
Fig. 4.9. I-V characteristics of the TLM structure with high temperature P
+
and
S
+
co-implant. The currents were measured between two adjacent
metal pads with various spacings. An ohmic behavior is observed. 81

xviii
Fig. 4.10. Resistance versus contact spacing for high temperature P
+
only and
high temperature P
+
followed by high temperature S

+
samples. Linear
regression (solid lines) was performed. The extracted contact
resistivity was reduced from 9.38 × 10
-7
to 1.64 × 10
-7
·cm
2
with the
addition of high temperature S
+
implant. 82
Fig. 4.11. (a) Cumulative probability of the specific contact resistivity extracted
from 10 TLM structures with high temperature P
+
implant. The tight
distribution is observed. (b) Cumulative probability of the specific
contact resistivity extracted from 10 TLM structures with high
temperature P
+
and S
+
co-implant. 83
Fig. 4.12. XRD spectra show nickel monogermanide formation for the high
temperature P
+
-implanted sample 85
Fig. 4.13. Cross-sectional TEM image of NiGe film formed on Ge that received
high temperature P

+
and S
+
co-implant. Inset shows the high
magnification cross-sectional TEM image of NiGe/n-Ge interfacial
region. Nickel monogermanide was found using EDX measurement. 85
Fig. 4.14. SIMS depth profiles of the implanted species in NiGe/n-Ge indicate
an obvious S segregation peak at the NiGe/n-Ge interface. Another S
peak is observed inside NiGe film. 86
Fig. 4.15. Experimental (square) and modeled (line) ellipsometric angles from
infrared ellipsometry to determine an average active carrier
concentration (N
D
) for high temperature P
+
and S
+
co-implant sample.
Extracted N
D
is 2.6 × 10
19
cm
-3
. 88
Fig. 4.16. (a) Energy band diagram of a typical metal/n-Ge contact showing two
major reasons for high contact resistivity, i.e. Fermi Level Pinning
near valence band edge and low n-type doping concentration in Ge.
(b) Energy band diagram of a metal/n-Ge contact with S induced traps
at metal/n-Ge interface and increased doping concentration, leading to

high TFE and FE currents. 90
Fig. 4.17. Schematic illustration of the TLM structure used in TCAD
simulation. The doping concentration of n-Ge is 2.5 × 10
18
cm
-3
. The

xix
input value of ρ
c
at metal/n-Ge interface is 1.0 × 10
-9
·cm
2
. The
metal thicknesses are 25, 300, 450, and 550 nm. The spacings are 1,
2, and 3 µm. The length of the metal pad is 10 µm. 91
Fig. 4.18. Resistance versus contact spacing for various metal thicknesses, i.e.
25, 300, 450, and 550 nm. Linear regression (dash lines) was
performed for each split. The ρ
c
could be extracted using the slope
and intercept in y-axis. 93
Fig. 4.19. The extracted specific contact resistivity as a function of the metal
thickness. The input ρ
c
is 1.0 × 10
-9
·cm

2
in the code. It is clearly
observed that the thin metal will cause a poor accuracy of ρ
c

extraction. 93
Fig. 4.20. Process flow to fabricate Ge FinFETs. 95
Fig. 4.21. (a) An ideal schematic of a Ge FinFET. (b) A real tilt SEM image of
a Ge FinFET. 95
Fig. 4.22. Top view microscope image of Ge FinFETs. (a) A dirty Ge FinFET.
(b) A clean Ge FinFET. 96
Fig. 4.23. (a) Conductivity check on source/drain pad of Ge FinFET. (b)
Conductivity check on TaN gate pad of Ge FinFET. 97
Fig. 4.24. The I
D
-V
D
characteristics of Ge FinFETs were measured under gate
bias of 0, 1, and 2 V. No gate control for Ge FinFETs. 98
Fig. 4.25. The I
D
-V
D
characteristics of Ge FinFETs were measured under gate
bias of 0, 1, and 2 V. No gate control for Ge FinFETs. 98

Fig. 5.1. TEM image of the epitaxially grown Ge
1-x
Sn
x

layer on top of n-type Ge
(100) substrate. The TEM was performed as an external service job at
the Institute of Materials Research and Engineering. The interface
between Ge
1-x
Sn
x
and Ge is clearly observed. The quality of the
epitaxial Ge
1-x
Sn
x
is good. The Ge
1-x
Sn
x
film was grown by MBE by a
collaborator. 102
Fig. 5.2. Schematic of a Ni(Ge
1-x
Sn
x
)/n-Ge
1-x
Sn
x
contact with pre-
stanogermanide Se or S implant and segregation. S or Se implant was

xx

performed prior to the deposition and reaction of Ni with Ge
1-x
Sn
x
to
form Ni(Ge
1-x
Sn
x
) or NiGeSn. Electrical characterization was done by
applying a voltage V on Ni(Ge
1-x
Sn
x
), and the Al contact is grounded. 104
Fig. 5.3. XRD characterization of Ni(Ge
1-x
Sn
x
) films for the samples with Se
and S implant. It is found that the phase of Ni(Ge
1-x
Sn
x
) is nickel
monostanogermanide after a 350 °C 30 s anneal. Se and S do not
affect the formation of low-resistivity nickel monostanogermanide.
The XRD was performed as an external service job at IMRE. 105
Fig. 5.4. Room temperature current-voltage characteristics of Ni(Ge
1-x

Sn
x
)/n-
Ge
1-x
Sn
x
contact devices formed with pre-stanogermanide Se or S
implant. The contact has an area of 100 × 100 μm
2
. Φ
B
n
was extracted
using activation energy method. The extracted Φ
B
n
of the samples
with Se and S implants are 0.12 and 0.11 eV, respectively. The
rectifying behaviour for the control sample indicates strong Fermi
level pinning near the valence band edge of n-Ge
1-x
Sn
x
. 106
Fig. 5.5. Cumulative probability plot of the reverse current measured at -1 V for
Ni(Ge
1-x
Sn
x

)/n-Ge
1-x
Sn
x
contacts with Se and S implant. 107
Fig. 5.6. Arrhenius plot of Ni(Ge
1-x
Sn
x
)/n-Ge
1-x
Sn
x
contacts formed with pre-
stanogermanide Se implant (8 keV, 1 × 10
15
cm
-2
). The Se implanted
sample with the median value for current density was used in low
temperature I-V measurement. The inset shows the low temperature
current-voltage characteristics used to extract Φ
B
n
. In order to avoid
the influence of the voltage drop across the substrate series resistance,
the currents under reverse bias (-0.1 V) at temperatures ranging from
230 to 255 K were used to extract the effective Schottky barrier height.
The extracted Φ
B

n
is 0.12 eV. 108
Fig. 5.7. Arrhenius plot of Ni(Ge
1-x
Sn
x
)/n-Ge
1-x
Sn
x
contacts formed with pre-
stanogermanide S implant (5 keV, 1 × 10
15
cm
-2
). The inset shows the
low temperature current-voltage characteristics used to extract Φ
B
n
.
The extracted Φ
B
n
is 0.11 eV. 109

xxi
Fig. 5.8. (a) The depth profiles of the implanted species in Ni(Ge
1-x
Sn
x

)/n-Ge
1-
x
Sn
x
contacts with S implant (5 keV, 1 × 10
15
cm
-2
). (b) The depth
profiles of the implanted species in Ni(Ge
1-x
Sn
x
)/n-Ge
1-x
Sn
x
contacts
with Se implant (8 keV, 1 × 10
15
cm
-2
). Obvious S segregation peak
was found at Ni(Ge
1-x
Sn
x
)/n-Ge
1-x

Sn
x
interface while the Se
segregation peak was located inside Ni(Ge
1-x
Sn
x
) layer. It is believed
that Se and S atoms were pushed to the interface due to the snowplow
effect. 111
Fig. 5.9. Energy band diagram of a Ni(Ge
1-x
Sn
x
)/n-Ge
1-x
Sn
x
contact without any
implant and segregation. E
f
, E
c
, and E
v
are the Fermi energy level,
conduction, and valence band edge, respectively. Electrons may
surmount the actual Schottky barrier by TE. 112
Fig. 5.10. (a) The depth profile of sulfur used in numerical simulation is plotted
using a solid line, which fits well to the experimental SIMS sulfur

profile (in circles). The profile of ionized sulfur traps was extracted
from numerical simulation. (b) Simulated energy band diagram of the
Ni(Ge
1-x
Sn
x
)/n-Ge
1-x
Sn
x
contacts with and without S implant and
segregation. E
f
, E
c
, and E
v
are the Fermi energy level, conduction, and
valence band edge, respectively. 115
Fig. 5.11. (a) The depth profile of selenium used in numerical simulation is
plotted using a solid line, which fits well to the experimental SIMS
selenium profile (in circles). The profile of ionized selenium traps was
extracted from numerical simulation. (b) Simulated energy band
diagram of the Ni(Ge
1-x
Sn
x
)/n-Ge
1-x
Sn

x
contacts with and without Se
implant and segregation. E
f
, E
c
, and E
v
are the Fermi energy level,
conduction, and valence band edge, respectively. 116
Fig. 5. 12. Simulated I-V characteristics of the S implanted Ni(Ge
1-x
Sn
x
)/n-Ge
1-
x
Sn
x
contacts with and without turning on the TAT model. 117