FINITE STATE MACHINE with DATAPATH

FINITE STATE MACHINE with DATAPATH
SYNTHESIS

Dr. Le Dung
Hanoi University of Science and Technology


FSMD MODEL
Data inputs
Status signals

Controller
inputs

Controller

Datapath

Control
signals

Data outputs

Controller outputs

Datapath

 performs the computations on data

Controller  indicates to the datapath which operations have to
be carried out on which data (algorithm)

Dr. Le Dung

Hanoi University of Science and Technology


Datapath Design
Temporary storage:
 registers, (shift registers), counters, register files, FIFOs, LIFOs

Functional units:
 arithmetic units, logical units and (barrel shifter)

Connections:
 data busses, multiplexers, tri-state buffers

Shift register (temporary store)  Register (temporary store)
Barrel shifter (functional unit)

Dr. Le Dung

Hanoi University of Science and Technology


Temporary storage
Inputs

Reset
Load

R

L

Register C

Inputs
Reset
Up/Down
Load

Clock

Output

RE
RA(n)

Write Enable
Write Address
(n bits)

WE
WA(n)

Register
Files
2n

Clock

Output

Inputs

Read Enable
Read Address
(n bits)

R
U/D Counter C
L

C

Clock

Output

Dr. Le Dung

Hanoi University of Science and Technology


Register Files

Dr. Le Dung

Hanoi University of Science and Technology


Functional Units

• Arithmetic units : Adder, Subtractor, Multiplier, Divider
• Logical units : Comparator, AND, OR, XOR …
• Barrel shifter : a digital circuit that can shift a data word
by a specified number of bits in one clock cycle.

Dr. Le Dung

Hanoi University of Science and Technology


Eight-bit Barrel Shifter
8 bits input
Shift
Number (0-7)

Sh

8-bit Barrel shifter

Nr
8 bits output

Dr. Le Dung

Hanoi University of Science and Technology


Generic structure of the Datapath
External inputs
Connections

Temporary storage
Connections

Operand switching network
Functional units

Connections

Result switching network
External outputs

Dr. Le Dung

Hanoi University of Science and Technology


Connections in Datapath
Inputs
k0

k1
S MUX

R
L

RE
RA(n)

Register

Files
2n

Register C

ROE

WE
WA(n)

R
U/D Counter C
L

C

COE

Tri-buffer

Data
busses

Data
busses
Comparator
<
=
>

F

AOE

Dr. Le Dung

ALU
Tri-buffer

Barrel shifter
BOE

Sh
Nr

Outputs
OOE

Hanoi University of Science and Technology


Example 1: Datapath design (1)
• Each variable and constant corresponds to a register or counter

• Each operator corresponds to a functional unit.

Algorithm :

Temporary storage:

input sum;
FOR i = 1 TO 5

sum
i
5
x

input x;
sum = sum + x;
ENDFOR
outport sum;

Dr. Le Dung

 Register
 Up counter
 Register
 Register

Functional units:
+
>5

 Adder
 Comparator

Hanoi University of Science and Technology

Example 1: Datapath design (2)
• Connect outputs of registers and counter to input of functional units
• Connect output of functional units to input of registers and counter
input sum;
FOR i = 1 TO 5
input x;
sum = sum + x;
ENDFOR
outport sum;

Input

1

L

C

1

1

5
Register
=5

5
3

k1

k0

Up Counter
i
C

U
L

Comparator
<

4

L

Register
x C

2

S

L

MUX

Register
sum C

Output

Adder

6

(status)
Dr. Le Dung

Hanoi University of Science and Technology


Example 1: Controller design
State A
1 = 0  k0

Input sum;
FOR i = 1 TO 5
input x;
sum = sum + x;
ENDFOR
outport sum;

Start=1

Controller
C

2

3
4
5
6

Clk
Dr. Le Dung

One-hot FSM

State B
1 =0 2 3

1

Start

Start=0

 D-FF design

State C
1 =1 4
State D
1 =1 2

0
C

1

State F
1 =1 6

State E
1 =1 5
Hanoi University of Science and Technology


Example 2: FSMD Design

Dr. Le Dung

Hanoi University of Science and Technology


Exercise
Thiết kế Datapath cho FSMD thực hiện thuật toán đếm và tính tổng của
các số lớn hơn 10 trong các số x đựơc đưa vào như sau:
cnt=0; sum=0;
Repeat
input x
if (x> 10) then
cnt=cnt + 1; sum=sum + x;
end if;
until x =0;
output sum; output cnt;
Chú ý: 1. 0 ≤ x ≤255, 0≤ sum ≤255.
Các lệnh viết trên cùng 1 hàng được thực hiện song song.
2. Chỉ rõ các thanh ghi trong datapath là bao nhiêu bit.

Dr. Le Dung

Hanoi University of Science and Technology