Computer organization and architecture 9th edition

COMPUTER ORGANIZATION
AND ARCHITECTURE

DESIGNING FOR PERFORMANCE
NINTH EDITION

William Stallings

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10 9 8 7 6 5 4 3 2 1

ISBN 10:
0-13-293633-X
ISBN 13: 978-0-13-293633-0


To Tricia (ATS),
my loving wife, the kindest
and gentlest person


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CONTENTS
Online Resources xi
Preface xiii
About the Author xxi
Chapter 0 Reader’s and Instructor’s Guide 1
0.1
Outline of the Book 2
0.2
A Roadmap for Readers and Instructors 2
0.3
Why Study Computer Organization and Architecture? 3
0.4
Internet and Web Resources 5

PART ONE OVERVIEW 6
Chapter 1 Introduction 6
1.1
Organization and Architecture 7
1.2
Structure and Function 8
1.3
Key Terms and Review Questions 14
Chapter 2 Computer Evolution and Performance 15
2.1
A Brief History of Computers 16
2.2
Designing for Performance 37
2.3
Multicore, MICs, and GPGPUs 43
2.4
The Evolution of the Intel x86 Architecture 44
2.5
Embedded Systems and the ARM 45
2.6
Performance Assessment 49
2.7
Recommended Reading 59
2.8
Key Terms, Review Questions, and Problems 60
PART TWO THE COMPUTER SYSTEM 65
Chapter 3 A Top-Level View of Computer Function
and Interconnection 65
3.1
Computer Components 66

3.2
Computer Function 68
3.3
Interconnection Structures 84
3.4
Bus Interconnection 85
3.5
Point-To-Point Interconnect 93
3.6
PCI Express 98
3.7
Recommended Reading 108
3.8
Key Terms, Review Questions, and Problems 108
Chapter 4 Cache Memory 112
4.1
Computer Memory System Overview 113
4.2
Cache Memory Principles 120
4.3
Elements of Cache Design 123

v


vi

CONTENTS

4.4

4.5
4.6
4.7
Chapter
5.1
5.2
5.3
5.4
5.5
Chapter
6.1
6.2
6.3
6.4
6.5
6.6
6.7
Chapter
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
Chapter
8.1

8.2
8.3
8.4
8.5
8.6
8.7

5

6

7

8

Pentium 4 Cache Organization 141
ARM Cache Organization 144
Recommended Reading 146
Key Terms, Review Questions, and Problems 147
Appendix 4A Performance Characteristics of Two-Level Memories 152
Internal Memory 159
Semiconductor Main Memory 160
Error Correction 170
Advanced DRAM Organization 174
Recommended Reading 180
Key Terms, Review Questions, and Problems 181
External Memory 185
Magnetic Disk 186
RAID 195
Solid State Drives 205

Optical Memory 210
Magnetic Tape 215
Recommended Reading 217
Key Terms, Review Questions, and Problems 218
Input/Output 221
External Devices 223
I/O Modules 226
Programmed I/O 228
Interrupt-Driven I/O 232
Direct Memory Access 240
I/O Channels and Processors 246
The External Interface: Thunderbolt and Infiniband 248
IBM zEnterprise 196 I/O Structure 256
Recommended Reading 260
Key Terms, Review Questions, and Problems 260
Operating System Support 265
Operating System Overview 266
Scheduling 277
Memory Management 283
Pentium Memory Management 294
ARM Memory Management 299
Recommended Reading 304
Key Terms, Review Questions, and Problems 304

PART THREE ARITHMETIC AND LOGIC 309
Chapter 9 Number Systems 309
9.1
The Decimal System 310
9.2
Positional Number Systems 311

9.3
The Binary System 312
9.4
Converting Between Binary and Decimal 312


CONTENTS

9.5
Hexadecimal Notation 315
9.6
Recommended Reading 317
9.7
Key Terms and Problems 317
Chapter 10 Computer Arithmetic 319
10.1
The Arithmetic and Logic Unit 320
10.2
Integer Representation 321
10.3
Integer Arithmetic 326
10.4
Floating-Point Representation 341
10.5
Floating-Point Arithmetic 349
10.6
Recommended Reading 358
10.7
Key Terms, Review Questions, and Problems 359
Chapter 11 Digital Logic 364

11.1
Boolean Algebra 365
11.2
Gates 368
11.3
Combinational Circuits 370
11.4
Sequential Circuits 388
11.5
Programmable Logic Devices 397
11.6
Recommended Reading 401
11.7
Key Terms and Problems 401
PART FOUR THE CENTRAL PROCESSING UNIT 405
Chapter 12 Instruction Sets: Characteristics and Functions 405
12.1
Machine Instruction Characteristics 406
12.2
Types of Operands 413
12.3
Intel x86 and ARM Data Types 415
12.4
Types of Operations 418
12.5
Intel x86 and ARM Operation Types 431
12.6
Recommended Reading 441
12.7
Key Terms, Review Questions, and Problems 441

Appendix 12A Little-, Big-, and Bi-Endian 447
Chapter 13 Instruction Sets: Addressing Modes and Formats 451
13.1
Addressing Modes 452
13.2
x86 and ARM Addressing Modes 459
13.3
Instruction Formats 464
13.4
x86 and ARM Instruction Formats 473
13.5
Assembly Language 477
13.6
Recommended Reading 479
13.7
Key Terms, Review Questions, and Problems 479
Chapter 14 Processor Structure and Function 483
14.1
Processor Organization 484
14.2
Register Organization 486
14.3
Instruction Cycle 491
14.4
Instruction Pipelining 495
14.5
The x86 Processor Family 512

vii

viii

CONTENTS

14.6
14.7
14.8
Chapter 15
15.1
15.2
15.3
15.4
15.5
15.6
15.7
15.8
15.9
15.10
Chapter 16
16.1
16.2
16.3
16.4
16.5
16.6

The ARM Processor 520
Recommended Reading 526
Key Terms, Review Questions, and Problems 527

Reduced Instruction Set Computers 531
Instruction Execution Characteristics 533
The Use of a Large Register File 538
Compiler-Based Register Optimization 543
Reduced Instruction Set Architecture 545
RISC Pipelining 551
MIPS R4000 556
SPARC 562
RISC Versus CISC Controversy 568
Recommended Reading 569
Key Terms, Review Questions, and Problems 569
Instruction-Level Parallelism and Superscalar Processors 573
Overview 574
Design Issues 579
Pentium 4 589
ARM Cortex-A8 595
Recommended Reading 603
Key Terms, Review Questions, and Problems 605

PART FIVE PARALLEL ORGANIZATION 611
Chapter 17 Parallel Processing 611
17.1
Multiple Processor Organizations 613
17.2
Symmetric Multiprocessors 615
17.3
Cache Coherence and the MESI Protocol 619
17.4
Multithreading and Chip Multiprocessors 626
17.5

Clusters 633
17.6
Nonuniform Memory Access 640
17.7
Vector Computation 644
17.8
Recommended Reading 656
17.9
Key Terms, Review Questions, and Problems 657
Chapter 18 Multicore Computers 664
18.1
Hardware Performance Issues 665
18.2
Software Performance Issues 669
18.3
Multicore Organization 674
18.4
Intel x86 Multicore Organization 676
18.5
ARM11 MPCore 679
18.6
IBM zEnterprise 196 Mainframe 684
18.7
Recommended Reading 687
18.8
Key Terms, Review Questions, and Problems 687


CONTENTS

Appendix A
A.1
A.2
A.3
A.4
A.5
A.6
A.7

ix

Projects for Teaching Computer Organization
and Architecture 691
Interactive Simulations 692
Research Projects 694
Simulation Projects 694
Assembly Language Projects 695
Reading/Report Assignments 696
Writing Assignments 696
Test Bank 696

Appendix B
Assembly Language and Related Topics 697
B.1
Assembly Language 698
B.2
Assemblers 706
B.3
Loading and Linking 710
B.4

Recommended Reading 718
B.5
Key Terms, Review Questions, and Problems 719
ONLINE CHAPTERS1
PART SIX
Chapter 19
19.1
19.2
19.3
19.4
19.5
Chapter 20
20.1
20.2
20.3
20.4
20.5
20.6

THE CONTROL UNIT 19-1
Control Unit Operation 19-1
Micro-operations 19-3
Control of the Processor 19-13
Hardwired Implementation 19-30
Recommended Reading 19-35
Key Terms, Review Questions, and Problems 19-35
Microprogrammed Control 20-1
Basic Concepts 20-3
Microinstruction Sequencing 20-16
Microinstruction Execution 20-26

TI 8800 20-45
Recommended Reading 20-59
Key Terms, Review Questions, and Problems 20-60
ONLINE APPENDICES

Appendix C

Hash Tables

Appendix D
Victim Cache Strategies
D.1
Victim Cache
D.2
Selective Victim Cache
1

Online chapters, appendices, and other documents are Premium Content, available via the access card
at the front of this book.


x

CONTENTS

Appendix E

Interleaved Memory

Appendix F

The International Reference Alphabet

Appendix G
Virtual Memory Page Replacement Algorithms
G.1
Optimal
G.2
Least Recently Used
G.3
First-In-First-Out
G.4
Other Page Replacement Algorithms
Appendix H
Recursive Procedures
H.1
Recursion
H.2
Activation Tree Representation
H.3
Stack Processing
H.4
Recursion and Iteration
Appendix
I.1
I.2
I.3
I.4

I

Additional Instruction Pipeline Topics
Pipeline Reservation Tables
Reorder Buffers
Tomasulo’s Algorithm
Scoreboarding

Appendix
J.1
J.2
J.3

J

Linear Tape Open Technology
LTO Generations
LTO Format
LTO Operation

Appendix K

DDR SRAM

Appendix L
Protocols and Protocol Architectures
L.1
Introduction
L.2
The TCP/IP Protocol Architecture
L.3

The Role of an Internet Protocol
L.4
IPv4
L.5
IPv6
L.6
The OSI Protocol Architecture
Appendix M

Scrambling

Appendix N

Timing Diagrams

Appendix O
Stacks
O.1
Stack Structure
O.2
Stack Implementation
O.3
Expression Evaluation
Glossary 723
References 733
Index 745


ONLINE RESOURCES
Site

Companion Website

Location
WilliamStallings.com/
ComputerOrganization

Description
Student Resources link: Useful links
and documents for students.
Instructor Resources link: Useful links
and documents for instructors.

Premium Content

Click on Premium Content link
at Companion Website or at
pearsonhighered.com/stallings and
enter the student access code found
on the card in the front of the book.

Online chapters, appendices, and other
documents that supplement the book.

Instructor Resource
Center (IRC)

Click on Pearson Resources for
Instructors link at Companion
Website or on Instructor Resource
link at pearsonhighered.com/stallings.

Solutions manual, projects manual,
slides, and other useful documents.

Computer Science
Student Resource Site

ComputerScienceStudent.com

Useful links and documents for
computer science students.

xi


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PREFACE
WHAT’S NEW IN THE NINTH EDITION
In the four years since the eighth edition of this book was published, the field has seen continued innovations and improvements. In this new edition, I try to capture these changes
while maintaining a broad and comprehensive coverage of the entire field. To begin this
process of revision, the eighth edition of this book was extensively reviewed by a number
of professors who teach the subject and by professionals working in the field. The result is
that, in many places, the narrative has been clarified and tightened, and illustrations have
been improved.
Beyond these refinements to improve pedagogy and user-friendliness, there have been
substantive changes throughout the book. Roughly the same chapter organization has been
retained, but much of the material has been revised and new material has been added. The
most noteworthy changes are as follows:

• Point-to-point interconnect: The traditional bus architecture has increasingly been replaced with high-speed point-to-point interconnect schemes. A new section explores
this technology, using Intel’s QuickPath Interconnect (QPI) as an example.
• PCI Express: PCI Express (PCIe) has become a standard peripheral interconnect architecture, replacing PCI and other bus-based architectures. A new section covers PCIe.
• Solid state drive and flash memory: Solid state drives are increasingly displacing hard
disk drives over a range of computers. A new section covers SSDs and the underlying
flash memory technology.
• IEEE 754 Floating-Point Standard: The coverage of IEEE 754 has been updated to
reflect the 2008 standard.
• Contemporary mainframe organization: Chapters 7 and 18 include sections on the
zEnterprise 196, IBM’s latest mainframe computer offering (at the time of this writing),
introduced in 2010.
• I/O standards: The book has been updated to reflect the latest developments, including
Thunderbolt.
• Multicore architecture: The material on multicore architecture has been expanded significantly.
• Student study aids: Each chapter now begins with a list of learning objectives.

xiii


xiv

PREFACE

• Sample syllabus: The text contains more material than can be conveniently covered in
one semester. Accordingly, instructors are provided with several sample syllabi that
guide the use of the text within limited time (e.g., 16 weeks or 12 weeks). These samples
are based on real-world experience by professors with the eighth edition.
• Test bank: A set of review questions, including yes/no, multiple choice, and fill in the
blank is provided for each chapter.
With each new edition it is a struggle to maintain a reasonable page count while adding

new material. In part this objective is realized by eliminating obsolete material and tightening the narrative. For this edition, chapters and appendices that are of less general interest
have been moved online, as individual PDF files. This has allowed an expansion of material
without the corresponding increase in size and price.

OBJECTIVES
This book is about the structure and function of computers. Its purpose is to present, as
clearly and completely as possible, the nature and characteristics of modern-day computer
systems.
This task is challenging for several reasons. First, there is a tremendous variety of products that can rightly claim the name of computer, from single-chip microprocessors costing
a few dollars to supercomputers costing tens of millions of dollars. Variety is exhibited not
only in cost but also in size, performance, and application. Second, the rapid pace of change
that has always characterized computer technology continues with no letup. These changes
cover all aspects of computer technology, from the underlying integrated circuit technology
used to construct computer components to the increasing use of parallel organization concepts in combining those components.
In spite of the variety and pace of change in the computer field, certain fundamental
concepts apply consistently throughout. The application of these concepts depends on the
current state of the technology and the price/performance objectives of the designer. The
intent of this book is to provide a thorough discussion of the fundamentals of computer
organization and architecture and to relate these to contemporary design issues.
The subtitle suggests the theme and the approach taken in this book. It has always
been important to design computer systems to achieve high performance, but never has this
requirement been stronger or more difficult to satisfy than today. All of the basic performance characteristics of computer systems, including processor speed, memory speed, memory
capacity, and interconnection data rates, are increasing rapidly. Moreover, they are increasing at different rates. This makes it difficult to design a balanced system that maximizes the
performance and utilization of all elements. Thus, computer design increasingly becomes a
game of changing the structure or function in one area to compensate for a performance
mismatch in another area. We will see this game played out in numerous design decisions
throughout the book.
A computer system, like any system, consists of an interrelated set of components.
The system is best characterized in terms of structure—the way in which components are
interconnected, and function—the operation of the individual components. Furthermore, a

computer’s organization is hierarchical. Each major component can be further described by
decomposing it into its major subcomponents and describing their structure and function.


PREFACE

xv

For clarity and ease of understanding, this hierarchical organization is described in this book
from the top down:
• Computer system: Major components are processor, memory, I/O.
• Processor: Major components are control unit, registers, ALU, and instruction execution unit.
• Control unit: Provides control signals for the operation and coordination of all processor
components. Traditionally, a microprogramming implementation has been used, in
which major components are control memory, microinstruction sequencing logic, and
registers. More recently, microprogramming has been less prominent but remains an
important implementation technique.
The objective is to present the material in a fashion that keeps new material in a clear
context. This should minimize the chance that the reader will get lost and should provide
better motivation than a bottom-up approach.
Throughout the discussion, aspects of the system are viewed from the points of view
of both architecture (those attributes of a system visible to a machine language programmer) and organization (the operational units and their interconnections that realize the
architecture).

EXAMPLE SYSTEMS
This text is intended to acquaint the reader with the design principles and implementation
issues of contemporary operating systems. Accordingly, a purely conceptual or theoretical
treatment would be inadequate. To illustrate the concepts and to tie them to real-world design
choices that must be made, two processor families have been chosen as running examples:
• Intel x86 architecture: The x86 architecture is the most widely used for nonembedded

computer systems. The x86 is essentially a complex instruction set computer (CISC)
with some RISC features. Recent members of the x86 family make use of superscalar
and multicore design principles. The evolution of features in the x86 architecture provides a unique case study of the evolution of most of the design principles in computer
architecture.
• ARM: The ARM architecture is arguably the most widely used embedded processor,
used in cell phones, iPods, remote sensor equipment, and many other devices. The
ARM is essentially a reduced instruction set computer (RISC). Recent members of the
ARM family make use of superscalar and multicore design principles.
Many, but by no means all, of the examples in this book are drawn from these two computer
families. Numerous other systems, both contemporary and historical, provide examples of
important computer architecture design features.

PLAN OF THE TEXT
The book is organized into six parts (see Chapter 0 for an overview):
• Overview
• The computer system


xvi
•
•
•
•

PREFACE

Arithmetic and logic
The central processing unit
Parallel organization, including multicore
The control unit

The book includes a number of pedagogic features, including the use of interactive
simulations and numerous figures and tables to clarify the discussion. Each chapter includes
a list of key words, review questions, homework problems, and suggestions for further reading. The book also includes an extensive glossary, a list of frequently used acronyms, and a
bibliography.

INTENDED AUDIENCE
The book is intended for both an academic and a professional audience. As a textbook,
it is intended as a one- or two-semester undergraduate course for computer science, computer engineering, and electrical engineering majors. It covers all the core topics in the
body of knowledge category, Architecture and Organization, in the IEEE/ACM Computer
Curriculum 2008: An Interim Revision to CS 2001. This book also covers the core area
CE-CAO Computer Architecture and Organization from the IEEE/ACM Computer
Engineering Curriculum Guidelines 2004.
For the professional interested in this field, the book serves as a basic reference volume and is suitable for self-study.

INSTRUCTOR SUPPORT MATERIALS
Support materials for instructors are available at the Instructor Resource Center (IRC) for
this textbook, which can be reached through the Publisher’s Website www.pearsonhighered
.com/stallings or by clicking on the link labeled “Pearson Resources for Instructors” at this
book’s Companion Website at WilliamStallings.com/ComputerOrganization. To gain access
to the IRC, please contact your local Pearson sales representative via pearsonhighered
.com/educator/replocator/requestSalesRep.page or call Pearson Faculty Services at
1-800-526-0485. The IRC provides the following materials:
• Projects manual: Project resources including documents and portable software, plus
suggested project assignments for all of the project categories listed subsequently in
this Preface.
• Solutions manual: Solutions to end-of-chapter Review Questions and Problems.
• PowerPoint slides: A set of slides covering all chapters, suitable for use in lecturing.
• PDF files: Copies of all figures and tables from the book.
• Test bank: A chapter-by-chapter set of questions.

• Sample syllabuses: The text contains more material than can be conveniently covered
in one semester. Accordingly, instructors are provided with several sample syllabuses
that guide the use of the text within limited time. These samples are based on realworld experience by professors with the first edition.


PREFACE

xvii

The Companion Website, at WilliamStallings.com/ComputerOrganization (click on
Instructor Resources link) includes the following:
• Links to Websites for other courses being taught using this book.
• Sign-up information for an Internet mailing list for instructors using this book to
exchange information, suggestions, and questions with each other and with the author.

STUDENT RESOURCES
For this new edition, a tremendous amount of original supporting material for students
has been made available online, at two Web locations. The Companion Website, at
WilliamStallings.com/ComputerOrganization (click on Student Resources link), includes a
list of relevant links organized by chapter and an errata sheet for the book.
Purchasing this textbook new grants the reader six months of access to the Premium
Content Site, which includes the following materials:
• Online chapters: To limit the size and cost of the book, two chapters of the book are
provided in PDF format. The chapters are listed in this book’s table of contents.
• Online appendices: There are numerous interesting topics that support material found
in the text but whose inclusion is not warranted in the printed text. A total of 13 appendices cover these topics for the interested student. The appendices are listed in this
book’s table of contents.
• Homework problems and solutions: To aid the student in understanding the material, a
separate set of homework problems with solutions are available. Students can enhance
their understanding of the material by working out the solutions to these problems and

then checking their answers.
• Key papers: Several dozen papers from the professional literature, many hard to find,
are provided for further reading.
• Supporting documents: A variety of other useful documents are referenced in the text
and provided online.
Finally, I maintain the Computer Science Student Resource Site at WilliamStallings
.com/StudentSupport.html.

PROJECTS AND OTHER STUDENT EXERCISES
For many instructors, an important component of a computer organization and architecture course is a project or set of projects by which the student gets hands-on experience to
reinforce concepts from the text. This book provides an unparalleled degree of support for
including a projects component in the course. The instructor’s support materials available
through Prentice Hall not only includes guidance on how to assign and structure the projects
but also includes a set of user’s manuals for various project types plus specific assignments,
all written especially for this book. Instructors can assign work in the following areas:
• Interactive simulation assignments: Described subsequently.


xviii

PREFACE

• Research projects: A series of research assignments that instruct the student to research
a particular topic on the Internet and write a report.
• Simulation projects: The IRC provides support for the use of the two simulation packages: SimpleScalar can be used to explore computer organization and architecture
design issues. SMPCache provides a powerful educational tool for examining cache
design issues for symmetric multiprocessors.
• Assembly language projects: A simplified assembly language, CodeBlue, is used and
assignments based on the popular Core Wars concept are provided.
• Reading/report assignments: A list of papers in the literature, one or more for each

chapter, that can be assigned for the student to read and then write a short report.
• Writing assignments: A list of writing assignments to facilitate learning the material.
• Test bank: Includes T/F, multiple choice, and fill-in-the-blanks questions and answers.
This diverse set of projects and other student exercises enables the instructor to use
the book as one component in a rich and varied learning experience and to tailor a course
plan to meet the specific needs of the instructor and students. See Appendix A in this book
for details.

INTERACTIVE SIMULATIONS
An important feature in this edition is the incorporation of interactive simulations. These
simulations provide a powerful tool for understanding the complex design features of a modern computer system. A total of 20 interactive simulations are used to illustrate key functions
and algorithms in computer organization and architecture design. At the relevant point in the
book, an icon indicates that a relevant interactive simulation is available online for student use.
Because the animations enable the user to set initial conditions, they can serve as the basis for
student assignments. The instructor’s supplement includes a set of assignments, one for each
of the animations. Each assignment includes several specific problems that can be assigned
to students. For access to the animations, click on the rotating globe at this book’s Website at
/>
ACKNOWLEDGMENTS
This new edition has benefited from review by a number of people, who gave generously
of their time and expertise. The following professors and instructors reviewed all or a
large part of the manuscript: Branson Murrill (Virginia Commonwealth University), Pan
Deng (Florida International University), Bob Broeg (Western Oregon University), Curtis
Meadow (University of Maine, Orono), Charles Weems (University of Massachusetts), and
Mike Jochen (East Stroudsberg University).
Thanks also to the many people who provided detailed technical reviews of one or
more chapters: Kauser Johar, Todd Bezenek (Quantum), Moustafa Mohamed (University
of Colorado at Boulder), Dharmesh Parikh, Qigang Wang, Rajiv Dasmohapatra (WIPRO
Ltd), Anup Holey (University of Minnesota, Twin Cities), Alexandre Keunecke Ignacio de
Mendonca, Douglas Tiedt, Kursad Albayraktaroglu (Advanced Micro Device), Nilanjan

Goswami (University of Florida, Gainesville), Adnan Khaleel (Cray, Inc.), Geri Lamble,


PREFACE

xix

Liu Han, Mafijul Islam (Volvo Technology, Sweden), Roger Kahn, Brian Case, Mani
Srinivasan, Abhishek Deb, Sushil Menon (University of Pennsylvania), Jigar Savla (Georgia
Institute of Technology), Madhu Mutyam, Karl Stevens, Vineet Chadha (Intel Labs),
Xingxing Jin (University of Saskatchewan), Jan Hoogerbrugge (NXP Semiconductors),
Ninad Laxman Sawant, Aziz Eker (TOBB University of Economics and Technology,
Ankara, Turkey), Bhupati Shukla, Niket Choudhary (North Carolina State University), and
Oguz Ergin (TOBB University of Economics and Technology, Ankara, Turkey).
Professor Cindy Norris of Appalachian State University, Professor Bin Mu of the
University of New Brunswick, and Professor Kenrick Mock of the University of Alaska
kindly supplied homework problems.
Aswin Sreedhar of the University of Massachusetts developed the interactive simulation assignments and also wrote the test bank.
Professor Miguel Angel Vega Rodriguez, Professor Dr. Juan Manuel Sánchez Pérez,
and Professor Dr. Juan Antonio Gómez Pulido, all of University of Extremadura, Spain,
prepared the SMPCache problems in the instructor’s manual and authored the SMPCache
User’s Guide.
Todd Bezenek of the University of Wisconsin and James Stine of Lehigh University
prepared the SimpleScalar problems in the instructor’s manual, and Todd also authored the
SimpleScalar User’s Guide.
Finally, I would like to thank the many people responsible for the publication of the
book, all of whom did their usual excellent job. This includes the staff at Pearson Education,
particularly my editor Tracy Dunkelberger, her assistant Carole Snyder, and production
managers Kayla Smith-Tarbox and Pat Brown. I also thank Shiny Rajesh and the production staff at Integra for another excellent and rapid job. Thanks also to the marketing and
sales staffs at Pearson, without whose efforts this book would not be in your hands.

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ABOUT THE AUTHOR
Dr. William Stallings has made a unique contribution to understanding the broad sweep of
technical developments in computer security, computer networking and computer architecture. He has authored 17 titles, and counting revised editions, a total of 42 books on various
aspects of these subjects. His writings have appeared in numerous ACM and IEEE publications, including the Proceedings of the IEEE and ACM Computing Reviews.
He has 10 times received the award for the best Computer Science textbook of the
year from the Text and Academic Authors Association.
In over 30 years in the field, he has been a technical contributor, technical manager,
and an executive with several high-technology firms. He has designed and implemented
both TCP/IP-based and OSI-based protocol suites on a variety of computers and operating
systems, ranging from microcomputers to mainframes. As a consultant, he has advised government agencies, computer and software vendors, and major users on the design, selection,
and use of networking software and products.
He created and maintains the Computer Science Student Resource Site at
WilliamStallings.com/StudentSupport.html. This site provides documents and links on a
variety of subjects of general interest to computer science students (and professionals). He
is a member of the editorial board of Cryptologia, a scholarly journal devoted to all aspects
of cryptology.
Dr. Stallings holds a PhD from M.I.T. in Computer Science and a B.S. from Notre
Dame in electrical engineering.

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CHAPTER

READER’S AND
INSTRUCTOR’S GUIDE
0.1

Outline of the Book

0.2

A Roadmap for Readers and Instructors

0.3

Why Study Computer Organization and Architecture?

0.4

Internet and Web Resources
Web Sites for This Book
Computer Science Student Resource Site
Other Web Sites

1


2

CHAPTER 0 / READER’S AND INSTRUCTOR’S GUIDE

This book, with its accompanying Web sites, covers a lot of material. In this chapter,
we give the reader an overview.

0.1 OUTLINE OF THE BOOK
The book is organized into five parts:
Part One Overview: Provides an overview of computer organization and architecture and looks at how computer design has evolved.
Part Two The Computer System: Examines the major components of a computer and their interconnections, both with each other and the outside world.
This part also includes a detailed discussion of internal and external memory
and of input/output (I/O). Finally, the relationship between a computer’s architecture and the operating system running on that architecture is examined.
Part Three Arithmetic and Logic: This part begins with a chapter that reviews
number systems. Chapter 10 is an extended discussion of computer arithmetic.
Chapter 11 is a survey of digital logic.
Part Four The Central Processing Unit: Examines the internal architecture
and organization of the processor. This part looks at the instruction set architecture. The remainder of the part deals with the structure and function of the
processor, including a discussion of reduced instruction set computer (RISC)
and superscalar approaches.
Part Five Parallel Organization: Deals with parallel organization, including
symmetric multiprocessing, clusters, and multicore architecture.
Part Six The Control Unit: Discusses the internal structure of the processor’s
control unit and the use of microprogramming.
A number of online chapters and appendices at this book’s Web site cover
additional topics relevant to the book.
This text is intended to acquaint you with the design principles and implementation
issues of contemporary computer organization and architecture. Accordingly, a purely
conceptual or theoretical treatment would be inadequate. This book uses examples from
a number of different machines to clarify and reinforce the concepts being presented.
Many, but by no means all, of the examples are drawn from two computer families:
the Intel x86 family and the ARM family. These two systems together encompass
most of the current computer design trends. The Intel x86 architecture is essentially a
complex instruction set computer (CISC) with some RISC features, while the ARM is

essentially a RISC. Both systems make use of superscalar design principles, and both
support multiple processor and multicore configurations.

0.2 A ROADMAP FOR READERS AND INSTRUCTORS
This book follows a top–down approach to the presentation of the material. As
we discuss in more detail in Section 1.2, a computer system can be viewed as a
hierarchical structure. At a top level, we are concerned with the major components