Tài liệu William Stallings Computer Organization and Architecture P4 docx

William Stallings
Computer Organization
and Architecture
Chapter 9
Instruction Sets:
Characteristics
and Functions
What is an instruction set?
§ The complete collection of instructions that are understood by a
CPU
§ Machine Code
§ Binary
§ Usually represented by assembly codes
• Assembly language is a symbolic representation of machine L.
Elements of an Instruction
§ Operation code (Op code)
• specifies operation to be performed
• Represented by mnemonics (SUB, ADD)
§ Source Operand reference
• Input to the operation
• 1 or 2 (can be constant, in a reg, mem, I/O)
§ Result Operand reference
• Put the answer here (Reg, Mem, I/O)
§ Next Instruction Reference
• Tells CPU where to fetch next instruction
• On most case, next instruction to be fetched immediately
follows current instruction
Instruction Representation
§ In machine code each instruction has a unique bit pattern
§ For human consumption (well, programmers anyway) a symbolic
representation is used

• e.g. ADD, SUB, LOAD
§ Operands can also be represented in this way
• ADD A,B
Instruction Types
§ Data processing
• Arithmetic & Logic instruction
üProcess numeric data
üOperates on bits of the word as bits and not as numbers
§ Data storage (main memory)
• Register - memory
§ Data movement (I/O) (IN, OUT, Memory mapped I/O)
• I/O – Memory
• I/O – Reg.
§ Program flow control
• Test & branch
• Testing data, status of computation (zero, overflow)
• Branch to some location depending on decision
Number of Addresses (a)
§ # of address allowed in an instruction
§ Decide the categories of processor architecture
§ 3 addresses
• Operand 1, Operand 2, Result
• a = b + c;
• May be a forth - next instruction (usually implicit)
• Not common
• Needs very long words to hold everything
Number of Addresses (b)
§ 2 addresses
• One address doubles as operand and result
• a = a + b

• Reduces length of instruction
• Requires some extra work
üTemporary storage to hold some results
Number of Addresses (c)
§ 1 address
• Implicit second address
• Usually a register (accumulator)
• Common on early machines
§ Adv.
• Minimize internal state of machine
• Short inst.
§ Dis.
• One register (A) à high memory traffic
Number of Addresses (d)
§ 0 (zero) addresses
• All addresses implicit
• Uses a stack
üOperands are on top of stack
• e.g. push a
• push b
• add
• pop c
• c = a + b
Dis, stack can not be accessed randomly
-> difficult to generate efficient code
à longer program
Ad. Short instruction
example
§ D = A + B + C
(stack) ACCUMULATOR 2-ADDRESS 3-ADDRESS

HP 3000 PDP-8 INTEL 8086 VAX
===========================================
PUSH A LOAD A LOAD R1, A ADD D, A, B
PUSH B ADD B ADD R1, B ADD D, D, C
ADD ADD C ADD R1, C
PUSH C STORE D STORE D, R1
ADD
POP D
ß---------------------------- short instruction
---------------------------à compact program, longer inst.
How Many Addresses
§ More addresses
• More complex (powerful?) instructions
• More registers
üInter-register operations are quicker
• Fewer instructions per program
§ Fewer addresses
• Less complex (powerful?) instructions
• More instructions per program
• Faster fetch/execution of instructions
Design Decisions (1)
§ Operation repertoire
• How many ops?
• What can they do?
• How complex are they?
§ Data types
§ Instruction formats
• Length of op code field
• Number of addresses