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A LTPS TFT pixel circuit for active matrix organic light emitting diode based on improved current mirror

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Accepted Manuscript
A LTPS-TFT Pixel Circuit for Active Matrix Organic Light Emitting Diode
Based on Improved Current Mirror
Kun Sun, Liuyan Chen, Jianping Guo, Dongdong Teng, Lilin Liu
PII:
DOI:
Reference:

S0141-9382(16)30072-5
/>DISPLA 1792

To appear in:

Displays

Received Date:
Revised Date:
Accepted Date:

20 August 2015
9 November 2015
22 May 2016

Please cite this article as: K. Sun, L. Chen, J. Guo, D. Teng, L. Liu, A LTPS-TFT Pixel Circuit for Active Matrix
Organic Light Emitting Diode Based on Improved Current Mirror, Displays (2016), doi: />j.displa.2016.05.005

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A LTPS-TFT Pixel Circuit for Active Matrix Organic Light Emitting
Diode Based on Improved Current Mirror
Kun Suna,b, LiuyanChena,b, JianpingGuoa,b, DongdongTenga,c*, LilinLiua,b*
a

State key laboratory of optoelectronic materials and technology, bSchool of Microelectronics,
c

School of Physics and Engineering, Sun Yat-Sen University, Guangzhou, P.R. China.
*The corresponding authors: ;

Abstract:
In this paper, a voltage-driving and current compensation method for active matrix
organic light emitting diode (AMOLED) displays is proposed. An improved current
mirror is introduced into the pixel circuit to overcome the channel length modulation
effect of TFTs. The SPICE simulation results show that the proposed pixel circuit not
only effectively compensates for non-idealities related with deviations of μ and VT in
TFTs, the OLED degradation, but also offers a less setting time and guarantees a good
liner relationship between VDATA and IOLED.
Keywords: Active matrix organic light emitting diode (AMOLED); low-temperature
poly-silicon thin-film transistor (LTPS-TFT); current programmed pixel circuit
(CPPC); channel length modulation effect


1. Introduction
Organic light-emitting diode (OLED) displays are one important type of self
light-emitting display techniques. They offer many unique performances compared
with liquid crystal displays (LCD), such as high contrast ratio, very fast response time
(µs), wide diverging angle, lower power-consumption, etc. These merits make OLED

display panels have great potentials for developing glass-free three-dimensional (3D)
display techniques. At present, more and more television manufacturers begin to
incorporate 3D display functions in their products. Due to the compatibility with
existing plane image systems based on flat two-dimensional (2D) display panels[1],
multi-view 3D display technologies become prosperous. Through presenting position
dependent views of a 3D scene to viewers, the multi-view display can offer both stereo
andmotion parallax depth cues. Recently, taking advantages of wide diverging angles
of OLED pixels,Teng et al.[2-4] solved the discontinuous motion parallax problem of
multi-view 3D display systems. In general, high-refresh-rate and high-resolution
AMOLED display panels are crucial for obtaining better 3D effects. Thus, low
temperature poly-silicon thin film transistors (LTPS-TFT) have attracted wide
attentions for AMOLEDs, due to their higher field-effect mobility and better electrical
stability compared to other TFT technologies.
However, random distribution of grain boundaries in poly-silicon films cause the
inevitable non-uniformity of LTPS-TFT parameters, including mobility (μ) and
threshold voltage (VT)[5].The application of LTPS-TFTs in flexible displays poses an
additional stress factor to AMOLEDs, which will also result in non-uniformity varied
with deformation. In addition, the threshold voltage of OLEDs (VT_OLED) degrades at
0.2mV/h during operation[6]. The conventional pixel circuit of two transistors and one
capacitor (2T1C), as shown in Fig. 1(a), doesn’t work for the non-uniformity of
AMOLED display panels. As a result, some compensation methods have been
proposed [5-14]. In those methods, voltage compensation has a faster setting time, but
at the price of less effective compensation for VTH shift than the current compensation
scheme[10]. However, the current compensation methods require inconvenient
constant current sources[8], and ignore the channel length modulation effect of


TFTs[15]. A typical mirrored current programmed pixel circuit(CPPC) is shown in Fig.
1(b)[7].
In this work, an improved current mirror pixel circuit is proposed which uses

voltage driving and provides current compensation. The compensation circuit takes
the advantage of current compensation and avoids the disadvantage of using constant
current sources. The improved current mirror can make the input voltage (VDD) and
the output current (IOLED) exhibit a good linear relationship by overcoming the
channel length modulation. As a result, the pixel circuit not only can effective
compensate μ and VT shifts of TFTs, the OLED degradation, but also offers a less
setting time.
2. Proposed Pixel Circuit And Driving Method
The proposed pixel circuit is schematically drawn in Fig. 2(a), which includes six
P-type TFTs (T1-T6) and one storage capacitor (CS). The column external driver
circuit consists of an integral module and a current sensing module. Signal
communications between the pixel circuit and the external driver are carried out
through the data line and the feedback line.
The signal timing diagram is given in Fig. 2(b). The operation consists two
phases: programming model and hold model. During the programming model, VSEL is
low to turn on T1 and T2, the output voltage of AMP1 (VFB) is given as:
VFB  VDATA  I FB  RFB   G (1)

where G is the gain of the amplifier (AMP1).
The output voltage (VOUT)of the integral module is derived by integratingVFB:

VOUT(t 2 )  

1
RC
1 1

t2




t1

VFBdt  VOUT(t 1 ) (2)

where VOUT(t1) and VOUT(t2) are the voltage values of VOUT at the start time of t1 and
the end time of t 2, R1 and C1 denote the values of the used resistor and capacitor.
The channel length modulation effect of TFT will make the drain current (ID)
keep changing with the variation of VDS in saturation region. In the proposed pixel
circuit, this effect of TFT is taken into consideration by using the MOS model[16], the


drain current of T1 and T2 in saturation region can be expressed as

I

D



 W
1
Cox   (VGS  VT )2(1  VDS )
2
L

(3)

where COX denotes the gate capacitance, μ is the mobility, W/L denotes the aspect
ratio of TFT. The threshold voltage VT and the channel length modulation factor λ are

introduced into the equation. Hence,
I D1
( W / L)1 (1  VDS1 )


I D2
( W / L)2 (1  VDS2 )

(4)

Compared with the typical mirrored CPPC, the proposed pixel circuit adds two TFTs
(T3 and T4) to cope with the channel length modulation effect. In this way,
VD1+VSG3=VD2+VSG4. If (W/L)3/(W/L)4=(W/L)1/(W/L)2, then VSG3=VSG4 and VD1=VD2.
According to the device parameters summarized in Table 1, IOLED and IFB are equal.
At the end of programming mode, the improved current mirror pixel circuit takes
the self-regulation voltage (VG) through voltage driving and current feedback
operation, the negative feedback system will keep balance, leading to:
I OLED  I

FB



VDATA
RFB

(5)

Since IOLED is determined by VDATA and RFB, the final stabilized IOLED will be
insensitive to variations of the electrical properties of TFTs and OLEDs. Thus, the

proposed driving scheme has high immunity to the variation of LTPS-TFTs and
OLED characteristics.
During the hold phase, VSEL is high to turn off T1 and T2. Consequently, CS
continues to sustain VG. Therefore, IOLED will keep a specific value, the same as that at
the end time of programming model.
3. Simulation Setup
To verify performances of the proposed driving scheme, circuit simulations are
conducted by the Cadence-virtuoso software. A p-type LTPS-TFT SPICE model (Level
62) is used, where μ and VT are set as 48cm2/V·s and -2.5V, respectively. The output
characteristics of the LTPS-TFTs are simulated, as shown in Fig. 3(a), which presents
obvious channel length effects. The OLED is modeled as a diode-connected TFT and a


capacitor. The VT_OLED and size of OLED are set as 3V and 104um2, respectively. The
OLED capacitance takes a value of 25nF/cm2. The simulated current–voltage curve of
this OLED model is drawn in Fig. 3(b).
The proposed external driving circuit is simulated with a 0.35μm 24V CMOS
process in HHNEC. The gain of AMP1 and AMP2 are set as 38 and 66 dB, respectively.
Their -3dB bandwidth are 540k and 39kHz. Other simulation parameters are
summarized in Table I.
4. Results And Discussion
The proposed scheme has good stability to deviations of VT, μ and VT_OLED
values. The comparisons between the proposed scheme and the conventional 2T1C
circuit are conducted at the nominal programming current of 1μA, results as shown in
Fig. 4(a-c). Within a VT deviation range of -1.0V~1.0V, the relative errors of the
proposed scheme are all less than 0.5%, as indicated by Fig. 4(a). The proposed
scheme also provide a relative error of less than 0.3% as the μ deviation range of
-20cm2/V.s ~ 20cm2/V.s, as indicated by Fig. 4(b). A relative error less than 1.4% is
obtained by the proposed driving scheme within a VT_OLED shift range of -1.0~1.0V
related with OLED degradation, as indicated by Fig. 4(c).

The proposed scheme can offer better linearity through overcoming the channel
length modulation effect of TFT. In a typical CPPC, the two TFTs (T3 and T4 in
Fig1.b) have the same VGS, but a different VDS in the saturation region. In the
improved current mirror, the added two TFTs (T3 and T4 in Fig2. b) will help to
overcome the channel length modulation effect. Thus the improved current mirror
circuit can support a stronger loading capability than the typical mirrored CPPC,
which is importance to resist the non-uniform electrical characteristics of OLED
pixels. Simulations are conducted under the proposed scheme and the typical mirrored
CPPC scheme at the same operation situation. Their input/output data relationship and
the relative error as a function of input data are compared, as presented in Fig. 5(a)
and (b). The maximum relative error of the proposed circuit is 2%, much smaller than
that of typical mirrored CPPC.
Compared with the typical mirrored CPPC, the proposed scheme provides less


setting time, as shown in Fig. 6. The setting time for all ranges of data currents is
smaller than 20 us with parasitic loads of Cp and Rp on both the data line and the
feedback line in the proposed scheme.
In a word, above results clearly prove that the proposed pixel circuit not only has
high immunity to non-idealities of poly-Si TFTs and OLED degradation, but also
offer less setting time.
5. Conclusions
A current compensation method for AMOLED pixel circuits based on voltage
driving scheme is proposed.The improved current mirror can overcome the channel
length modulation effect of TFTs by adding two TFTs, which guarantees a good
linear relationship between VDATA and IOLED. Simulation results based on LTPS-TFTs
show that the proposed circuit can effectively compensates for non-idealities related
with deviations of μ and VT in TFTs, the OLED degradation and achieves less setting
time.
Acknowledgment

This work was supported by the grants from the Natural Science Foundation of
China (No. U1201254), the National High Technology Research and development
Program of China (No.2013AA03A106, No.2015AA03A101), the Guangzhou
Technical Plan Project under No. 201510010280.
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Table and Figure captions
Table 1: Device parameters used in the simulation.
Fig.1 (a)The conventional 2T1C pixel circuit; (b)the typical mirrored current
programmed pixel circuit (CPPC).
Fig.2 (a)Equivalent circuit of the proposed driving scheme; (b)signal timing diagram.
Fig.3 (a)Output characteristics of the LTPS-TFTs; (b)current–voltage curve of the

OLED device.
Fig.4 The comparisons between the proposed scheme and the conventional 2T1C
circuit at the nominal programming current of 1μA on their resistances to deviations of
(a)VT; (b)μ and (c)VT_OLED values.
Fig.5 Comparisons on the input/output relationship and the relative erroras a function
of input data between (a) the proposed scheme and (b) the typical mirrored CPPC.
Fig.6 The evolutions of the setting time with IOLED under the proposed driving scheme
and the typical mirrored CPPC.


VDD

VSEL

VSEL
CS

VDATA

IDATA

T1

T2

VDD

T1
T3


T2
CS

OLED

OLED

(a)

(b)

Fig.1. (a) The conventional 2T1C pixel circuit (b) the typical mirrored current programmed pixel
circuit (CPPC).

AMOLED Pixel

External Driver
Integral Model

VDD

C1
R1
CC

VFB

R2

AMP2


Data line
CP1

RP1

T5
VSEL

CP2

RP2

G

T3

T6
OLED
Vss

Current Sensing Module

(a)

T2
T4

IOLED IFB


Feedback line
AMP1 VDATA
RFB

Cs

T1

T4






VSEL
VDATA XXX

XXXXXX

XXX

① Programming Mode
② Hold Mode
(b)

Fig. 2 (a) Equivalent circuit of the proposed driving scheme (b) signal timing
diagram.

60


(a)

W/L=15m/5m

VGS=-7V

50

ISD(A)

40

VGS=-6V

30
20

VGS=-5V

10

VGS=-4V

0

-10

-8


-6

-4

-2

0

VDS(V)

(b)

10

IOLED(A)

8

COLED

6
4

OLED

2
0
-1

0


1

2

3

4

5

6

7

8

9

10 11

VOLED(V)

Fig. 3 (a) Output characteristics of the LTPS-TFTs (b) current–voltage curve of the
OLED device.


150
a


Error 

Relative Error()

100

IOLED(VT )  IOLED(VT  0)
IOLED(VT  0)

50
0
-50
-100

Conventional 2T1C
Proposed Scheme

-1.0

-0.5

0.0

0.5

1.0

VT(V)

20

16

(b)

Error 

Relative Error()

12
8

IOLED() IOLED(  0)
IOLED(  0)

4
0
-4
-8
-12
-16

Conventional 2T1C
Proposed Scheme

-20
-24
-20

-10


0

2

10

20

(cm /Vs)

40

Relative Error()

30

(c)

Error 

20

IOLED(VT _ OLED )  IOLED(VT _ OLED  0)
IOLED(VT _ OLED  0)

10
0
-10
-20
Conventional 2T1C

Proposed Scheme

-30
-40

-1.0

-0.5

0.0

0.5

1.0

VT_OLED(V)

Fig. 4 The comparisons between the proposed scheme and the conventional 2T1C
circuit at the nominal programming current of 1μA on their resistances to deviations
of (a) VT, (b)μ and (c) VT_OLED values.


2.0

(a)

Error 

IOLED(A)


2.5

IOLED  (VDATA / RFB )
(VDATA / RFB )

1.5
1.0
0.5

2.0

0.0

1.5

-0.5

1.0

-1.0

0.5

-1.5

0.0

Relative Error(%)

3.0


-2.0
0

5

10

15

20

25

30

VDATA(mV)

(b)

Error 

IOLED(A)

2.5

35

IOLED  I DATA
I DATA


30
25
20

2.0

15
10

1.5

5
0

1.0

-5
0.5
0.0
0.0

-10

Relative Error()

3.0

-15
0.5


1.0

1.5

2.0

IDATA(A)

2.5

3.0

Fig. 5.Comparisons on the input/output relationship and the relative error as a
function of input data between (a) the proposed scheme and (b) the typical mirrored
CPPC.


Setting Time(s)

80
Typical CPPC
Proposed Scheme

70
60
50
40
30
20

10
0.0

0.5

1.0

1.5

2.0

IOLED(A)

2.5

3.0

Fig. 6 The evolutions of the setting time with IOLED under the proposed driving
scheme and the typical mirrored CPPC.


Table 1: Device parameters used in the simulation
TFT W/L Value Capacitor Value Resistor Value
T1 15µm/5µm
C1
10pF
R1
10kΩ
T2 15µm/5µm
CC

5pF
R2
1kΩ
T3 5µm/5µm
CS
5pF
RFB
10kΩ
T4 5µm/5µm
CP1
100pF
RP1
1.5kΩ
T5 5µm/5µm
CP2
100pF
RP2
1.5kΩ
T6 5µm/5µm


Highlights

1) Introducing an improved current mirror into the pixel circuit to overcome the
channel length modulation effect of TFTs.
2) The designed pixel circuit can support a stronger loading capability than the typical
mirrored CPPC, which is importance to resist the non-uniform electrical
characteristics of OLED pixels.
3) The proposed pixel circuit not only effectively compensates for non-idealities
related with deviations of μ and VT in TFTs, the OLED degradation, but also offers a

less setting time and guarantees a good liner relationship between VDATA and IOLED.
4) The proposed pixel circuit uses voltage driving and provides current compensation.
The compensation circuit takes the advantage of current compensation and avoids
the disadvantage of using constant current sources.



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