Lecture Notes
Fundamentals of Control Systems
Instructor: Assoc. Prof. Dr. Huynh Thai Hoang
Department of Automatic Control
Faculty of Electrical & Electronics Engineering
Ho Chi Minh City University of Technology
Email:
Homepage: www4.hcmut.edu.vn/~hthoang/
www4 hcmut edu vn/ hthoang/
6 December 2013
© H. T. Hoang - www4.hcmut.edu.vn/~hthoang/
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Chapter 9
DESIGN OF
DISCRETE CONTROL SYSTEMS
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Content
Introduction
Discrete lead – lag compensator and PID controller
Design discrete systems in the Z domain
Controllability and observability of discrete systems
Design
D i state
t t feedback
f db k controller
t ll using
i pole
l
placement
Design state estimator
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Discrete lead lag compensators
and PID controllers
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Control schemes
Serial compensator
R(z)
+
T
GC(z)
ZOH
G(z)
Y(z)
H( )
H(z)
State feedback control
r(k)
+
u(k)
x (k 1) Ad x (k ) Bd u (k )
x(t)
Cd
y(k)
K
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Transfer function of discrete difference term
u(k)
e(k)
D
Differential term:
dde(t )
u (t )
dt
e( kT ) e[( k 1)T ]
Discrete difference: u ( kT )
T
E ( z ) z 1 E ( z )
U ( z)
T
Transfer function of the discrete difference term:
1 z 1
GD ( z )
T z
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Transfer function of discrete integral term
e(t)
I t
Integral
l
u(t)
t
Continuous integral:u(t ) e( )d
0
Di
Discrete
t integral:
i t
l
u ( kT ) = u[( k - 1)T ] +
U ( z ) z 1U ( z )
kT
( k 1)T
kT
0
0
( k 1)T
u (kT ) e( )d
e( )d e( )d
kT
T
e
(
t
)
d
t
=
u
[(
k
1)
T
]
+
(e[( k - 1)T ] + e(kT )
ò
2
( k -1) T
T 1
z E( z) E( z)
2
TF of discrete integral term: GI ( z ) T z 1
2 z 1
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Transfer function of discrete PID controller
C ti
Continuous
PID controller:
t ll
K
GPID ( s ) K P K D s
s
Discrete PID controller:
KIT z 1 KD z 1
GPID ( z ) K P
2 z 1 T z
P
or
D
z
KD z 1
GPID ( z ) K P K I T
z 1 T z
P
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I
I
D
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Digital PID controller
r(k)
(k)
+
e(k)
PID
u(k)
D/A
G(s)
y(k)
A/D
KIT z 1 KD z 1
U ( z)
G PID ( z )
KP
E( z)
2 z 1 T z
u( k ) u( k 1) K P [e( k ) e( k 1)]
)
KIT
KD
[e( k ) e( k 1)]
[e( k ) 2e( k 1) e( k 2)]
2
T
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Digital PID control programming
float PID_control(float
PID control(float setpoint,
setpoint float measure)
{ ek_2 = ek_1;
ek_1 = ek;
ek = setpoint – measure;
uk_1 = uk;
uk = uk_1
uk 1 + Kp
Kp*(ek
(ek-ek_1)
ek 1) + Ki
Ki*T/2*(ek+ek
T/2 (ek+ek_1)
1) +…
+
Kd/T*(ek – 2ek_1+ek_2);
If uk > umax, uk = umax;
If uk < umin, uk = umin;
return(uk)
}
Note: Kp, Ki, Kd, uk, uk_1, ek, ek_1, ek_2 must be declared as
global variables;; uk_1,, ek_1 and ek_e must be initialized
g
to be zero; umax and umin are constants.
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TF of discrete phase lead/lag compensator
Continuous phase lead/lag compensator:
sa
phase lead
a
b
GC ( s ) K
phase lag
g
ab p
sb
Discretization using trapezoidal integral:
(aT 2) z (aT 2)
GC ( z ) K
(bT 2) z (bT 2)
( aT 2)
Denote zC
( aT 2)
(bT 2)
and pC
(bT 2)
TF
TF off discrete
di
t phase
h
l d/l compensator
lead/lag
t
z zC
GC ( z ) KC
z pC
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zC 1
zC pC phase lead
pC 1
zC pC phase lag
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Approaches to design discrete controllers
IIndirect
di t design:
d i
Fi t design
First
d i
a continuous
ti
controller, then discretize the controller to have a
discrete control system.
system The performances of the
obtained discrete control system are approximate
those of the continuous control system
y
provided
p
that the sample time is small enough.
Direct design: Directly design discrete controllers
in Z domain.
Methods: root locus, pole placement, analytical
method,, …
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D
Design
i discrete
di
t controllers
t ll
in
i the
th Z domain
d
i
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Procedure for designing discrete lead compensator using the RL
z zC
Lead compensator: GC ( z ) KC
z pC
( zC pC )
*
Step 1: Determine the dominant poles z1, 2 from desired
transient response specification:
Overshoot (POT)
Settling
g time ts
n
s1*, 2 n jn 1 2
z e
r z* e Tn
z* Tn 1 2
*
1, 2
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Ts*
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Procedure for designing discrete lead compensator using the RL
Step 2
St
2: Determine
D t
i th
the deficiency
d fi i
angle
l so that
th t the
th
dominant poles z1*, 2 lie on the root locus of the system
after compensated:
n
m
i 1
i 1
* 180 0 arg( z1* pi ) arg( z1* zi )
where pi and zi are poles and zeros of G(z)
Geometry formula:
* 180 0 angles from poles of G ( z ) to z1*
angles from zer os of G ( z ) to z1*
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Procedure for designing discrete lead compensator using the RL
Step 3: Determine the pole & zero of the lead compensator
Draw 2 arbitrarily rays starting from the dominant pole z1*such
that the angle between the two rays equal to *. The
intersection between the two rays and the real axis are the
positions of the pole and the zero of the lead compensator.
Two methods often used for drawing the rays:
Bisector method
Pole elimination method
Step 4: Calculate the gain KC using the equation:
GC ( z )G ( z ) z z* 1
1
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Design discrete lead compensator using RL – Example
R(s)
+
T
GC(z)
50
G( s)
s( s 5)
ZOH
G(s)
Y(s)
T 0.1sec
Design the compensator GC(z) so that the compensated system
has dominant poles with 0.707, n 10 (rad/sec)
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Design discrete lead compensator using RL – Example (cont’)
Solution:
The open-loop discrete TF:
G( s)
G ( z ) (1 z )Z
s
50
1
(1 z )Z 2
s ( s 5)
1
50
G( s)
s( s 5)
0 .5
0 .5
0. 5
z
[(
0
.
5
1
e
)
z
(
1
e
0
.
5
e
)]
1
10(1 z )
2
0 .5
5( z 1) ( z e )
0.21z 0.18a z(aT 1 e aT ) z (1 e aT aTe aT )
G( z)
Z 2
( z 1)( z 0s.607
( s )a )
a ( z 1) 2 ( z e aT )
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Design discrete lead compensator using RL – Example (cont’)
The desired poles:
z1*, 2 re j
where
r e Tn e 0.10.70710 0.493
Tn 1 2 0.1 10 1 0.707 2 0.707
z1*, 2 0.493e j 0.707
z1*, 2 0.375 j 0.320
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Design discrete lead compensator using RL – Example (cont’)
Im z
The deficiency angle
0.375+j0.320
+j
180 ( 1 2 ) 3
*
1 152.90
2 125.90
P
3 14.60
*
84
*
0
1
3
0 A
pc
2
1
B
zc
+1
Re z
j
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Design discrete lead compensator using RL – Example (cont’)
Determine the pole and the zero of the compensator
using the pole elimination method:
zC 0.607
zC 0.607
pC OA OB AB
OB 0.607
AB 0.578
pC 0.029
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Design discrete lead compensator using RL – Example (cont’)
C l l t the
Calculate
th gain
i KC: GC ( z)G( z) * 1
z z
( z 0.607) (0.21z 0.18)
KC
1
( z 0.029) ( z 1)( z 0.607) z 0.375 j 0.320
[0.21(0.375 j 0.320) 0.18]
1
KC
(0.375 j 0.320 0.029)(0.375 j 0.320 1)
0.267
1
KC
0.471 0.702
K C 1.24
Conclusion: The TF of the lead compensator is:
z 0.607
GC ( z ) 1.24
z 0.029
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Design discrete lead compensator using RL – Example (cont’)
Root locus of the
uncompensated
t d system
t
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Root locus of the
compensated
t d system
t
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Procedure for designing discrete lag compensator using the RL
z zC
( zC pC )
The discrete lag compensator: GC ( s ) KC
z pC
1 pC
Step 1: Denote
. Determine to meet the steady
steady1 zC
state error requirement:
KP
*
KP
or
KV
*
KV
or
Ka
*
Ka
Step 2: Chose the zero of the lag compensator:
Step 3: Calculate the pole of the compensator:
pC 1 (1 zC )
Step 4: Calculate KC satisfying the condition:
zC 1
GC ( z )GH ( z ) z z* 1
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Design discrete lag compensator using RL – Example
R(s)
+
T
G (s)
GC(z)
ZOH
50
s ( s 5)
T 0.1sec
G(s)
C(s)
Design the lag compensator GC(z) so that the compensated
system has the velocity constant KV* 100 and the closed
poles are nearly unchanged.
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