Exception Handling

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Chapter 7
Exception Handling



Exception handling is classified into reset and interrupts and the
interrupt function is indispensable for control using programs. It is almost
always used when a timer is used and is also required for effective data
input/output. To write the program you have made to the ROM for execution,
you also need to understand how reset works. The concepts of reset and
interrupts, however, are difficult to understand for beginners.
Since practical uses are not mentioned in this chapter, you may not get
a clear idea of them. The effects of interrupts are described in chapters relating
to timers and serial interface. Here, you should fully understand the following
key items: interrupt mask bit in the CCR, vector addresses and storage of the
PC and CCR values.

Note:
Some IC signal names have bars over them to indicate negative logic.
In the contents of the CD-ROM, however, no bar can be placed on them since
they are written in HTML format. Still, bars are added to negative logic signals
in figures included as images.
The following are negative logic signals:

7.1 What Is Exception Handling?

The CPU sometimes shows special operation called "exception
handling". Exception handling refers to the operation that moves execution not
to the next instruction but to another program after the current instruction is
completely executed if any exception handling source is generated while the
CPU is executing the main routine. The program to which execution is moved
by exception handling is referred to as an "exception handling routine".

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Figure 7.1: Exception Handling Operation Overview

The H8/3048 has 42 types of exception handling sources, which are
classified into one reset and 41 interrupts. Reset is mainly designed to start
execution from a particular program after turning the microcomputer on.
Interrupts are designed to move operation to an exception handling routine
when an interrupt source is generated during program execution and return
operation to the original program after the exception handling routine has been
executed completely.


Figure 7.2: Types of Exception Handling Sources

Although what generates an exception handling source depends on the
type, all types of exception handling routines employ the vector method. This
method is designed to notify the CPU of the start address of an exception
handling routine. The details are described in the following sections.

7.2 Reset

7.2.1 Reset Sources and Operation
Reset is generated for two purposes. One is to start execution from a
particular program after turning the microcomputer on. This program is called
the "main routine". The other is to stop any program being executed by the
CPU and resume processing from the same state when the power is turned on
again. Figure 7.3 shows reset sources:

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Figure 7.3: Reset Sources

The CPU shows the operation described in Figure 7.4 after reset is generated.
Figure 7.4: Reset Operation

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After reset is generated, the CPU stops any program being executed,
loads the reset vector to the PC and fetches an instruction from this address to
execute it. In other words, reset generation always causes the main routine
stored in the address indicated by the reset vector to be executed. After reset is
generated to start main routine execution, processing cannot be returned to the
original program to continue. Reset generation means that the microcomputer
starts processing from the initial state.
When the microcomputer starts operation, users are required to set the
program to be executed first, namely the start address of the main routine, as
the reset vector in the lower three addresses of the four-address area starting
from address 0. This area is referred to as the "reset vector address".

7.2.2 Power-on Reset

Although you can generate reset any time, there is one time that you
must generate it. That is, when the microcomputer is turned on.

Simply turning it on will not set all registers in the CPU to specific values and
even the value in the PC cannot be determined. This means that the CPU
cannot determine from which address the program should be executed when
the microcomputer is turned on.
Therefore, reset must be generated prior to any other processing after
power-on. This is called "power-on reset".


Figure 7.5: Overview of Reset Pin External Circuit and Voltage Waveform

For reset to be generated properly at power-on, the electrical
characteristics of the H8/3048 specify that the low-level voltage be kept at least
20ms before the high-level voltage applied to the reset pin. This allows the
internal clock oscillating circuit to stabilize after power-on.
On the contrary, to prevent reset generation in the microcomputer, you
must externally apply the high-level voltage to the reset pin beforehand. Note
that reset may be generated by a low-level noise only.
To satisfy these two conditions, it is recommended that a circuit using a
commercially available reset IC be designed around the reset pin.




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Precautions on storing the reset vector
For a program to operate properly after power-on reset, the reset vector
must be stored in the reset vector addresses before the microcomputer is turned
on. This means that the reset vector addresses must be in the ROM whose
contents remain even after power-off. You must store the reset vector in this
ROM.

As shown in Figure 7.6, use the DATA.L assembler control instruction
to store the reset vector. In this example, the main routine (symbol MAIN) is
placed starting from the H'001000 address and the value of H'001000 indicated
by the MAIN symbol is stored as the reset vector in the 4-address area between
the H'000000 and H'000003 addresses.


Figure 7.6: Description to Store the Reset Vector

7.3 Interrupts
7.3.1 Interrupt Overview

The H8/3048 has 41 types of interrupts, which are exception handling
routines with a variety of types.
Any microcomputer-applied system must timely respond to processing
requests which may be generated at any time such as signal inputs from many
sensors and outputs to specific equipment. Although it is possible for one
program to sequentially search for and respond to all processing requests, this
results in long search time and slow response speed. To solve this problem, a
mechanism is needed to allow a response program (interrupt handling routine)
to be executed only when a processing request is issued. The CPU is provided
with interrupts for this function.
Interrupts are designed to respond to a processing request with a higher
priority than the current program and move execution to it.



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Figure 7.7: Interrupt Operation

Let's take a microcomputer used in a beverage vending machine as an
example. The microcomputer is generally required simply to execute a
program to keep the product temperature at a certain level. Only when coins
are dropped in, should interrupt operation be started to execute programs as
interrupt handling routines to judge how many coins have been dropped in or
which button has been pressed. After execution is completed, the
microcomputer can return to the original temperature control program.

7.3.2 Interrupt Types

Two conditions must be satisfied to allow an interrupt to be generated:
one is that an interrupt request has been generated and the other is that an
interrupt is enabled.
Although the judgement of whether an interrupt request is generated or
not depends on the interrupt type, event occurrence in the microcomputer
hardware is generally regarded to be generation of an interrupt request.
Interrupts are roughly classified into 41 types, which are further divided
into external and internal interrupts based on the sources. For internal
interrupts, requests are generated by the internal peripheral functions, which
are described in the following chapters. In other words, interrupt requests are
generated when something happens on the internal peripheral function
hardware. Since internal interrupts are described in the following chapters,
external interrupts only are explained here.
Operation, however, is the same for both external and internal
interrupts, which you should fully understand here.

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Figure 7.8: External Interrupt Request Input Pins

The H8/3048 has seven pins to input external interrupt requests in all
and six of them are named "IRQ0" to "IRQ5". The remaining pin is named
"NMI".
In the case of external interrupts, a request is regarded to be generated
when the low-level voltage is applied to one of these interrupt request input
pins. To prevent an external interrupt request from being generated, apply the
high-level voltage to these pins.
For example, if the low-level voltage is applied to the IRQ3 input pin,
an external interrupt request of the "IRQ3" type is regarded to be generated. If
the interrupt is enabled at this time, the interrupt is generated to move
execution to the IRQ3 interrupt handling routine.
Accordingly, you can execute a program to handle requests only when
required by creating an external circuit to apply the low-level voltage to a
corresponding interrupt request input pin when a sensor has prepared data to be
read by the microcomputer.

Disabling/Enabling Interrupts
As indicated by the above description saying "If the interrupt is enabled
at this time", interrupt requests, irrespective of whether they are external or
internal, are not necessarily accepted by the microcomputer. The following
describes the interrupt mask bit in the CCR, which controls whether to accept
interrupt requests or not.


Figure 7.9: Interrupt Mask Bit