Lecture Computer organization and assembly language - Lecture 32: Intel x86 Instruction Encoding - TRƯỜNG CÁN BỘ QUẢN LÝ GIÁO DỤC THÀNH PHỐ HỒ CHÍ MINH

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<b>CSC 221</b>

<b>Computer Organization and Assembly </b>

<b>Language</b>

<b>Lecture 32: </b>

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<b>Lecture Outline</b>

• Encoding Real x86 Instructions

• x86 Instruction Format Reference
• x86 Opcode Sizes

• x86 ADD Instruction Opcode

• Encoding x86 Instruction Operands, MOD-REG-R/M Byte
• REG Field of the MOD-REG-R/M Byte

• MOD R/M Byte and Addressing Modes
• SIB (Scaled Index Byte)

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<b>Lecture Outline</b>

• Encoding ADD Instruction Example
• Encoding ADD CL, AL Instruction

• Encoding ADD ECX, EAX Instruction

• Encoding ADD EDX, DISPLACEMENT Instruction
• Encoding ADD EDI, [EBX] Instruction

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<b>Encoding Real x86 Instructions </b>

• It is time to take a look that the actual machine

instruction format of the x86 CPU family.

• They don't call the x86 CPU a Complex Instruction Set

Computer (CISC) for nothing!

• Although more complex instruction encodings exist, no

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<b>Encoding Real x86 Instructions </b>

<b>Prefix Bytes</b>

0 to 4 special
prefix values
that affect the
operation of
instruction.

One or Two byte
Instruction <i>opcode</i>

(two bytes if the
special <b>0Fh</b> <i>opcode</i>

expansion prefix is
present)

<b>“mod-reg-r/m” </b>byte that

spcifies the addressing
mode and Instruction
operand size.

This byte is only required if
the instruction supports
register or memory

operands.

Optional Scaled
Index Byte if the
instruction uses a
scaled index memory
addressing mode.

<b>Displacement. </b>This is

0,1, 2, or 4 byte value
that specifies a memory
address displacement
for the instruction.

Imm./Constant data.

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<b>Encoding Real x86 Instructions </b>

• Although the diagram seems to imply that instructions

can be up to 16 bytes long, in actuality the x86 will not
allow instructions greater than 15 bytes in length.

• The prefix bytes <b>are not</b> the <i>opcode expansion prefix</i>

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<b>x86 Instruction Format Reference </b>

• Another view of the x86 instruction format:

<b>Instruction </b>
<b>Prefix</b>
<b></b>
<b>Address-Size Prefix</b>
<b></b>
<b>Operand-Size Prefix</b>
<b>Segment </b>
<b>Override</b>
<b>Number 0 or 1 0 or 1 0 or 1 0 or 1</b>
<b>of Bytes </b>

<b>Number 0 or 1 0 or 1 0 or 1 0, 1, 2 or 4 0, 1, 2 or 4</b>
<b>of Bytes </b> <b>_OpCode</b> <b>_Mod-R/M</b> <b>_SIB</b> <b>_Displacement</b> <b>_Immediate</b>

Scale Index Base

<b> 7 6 5 4 3 2 1 0</b>

Mod Reg/OpCode R/M

<b> 7 6 5 4 3 2 1 0</b>

Bits

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<b>x86 Instruction Format Reference </b>

•

Instructions have some combination of the

following fields (but no instruction has all parts)

– <b>instruction prefix </b>– sets certain options
– <b>opcode </b>- specifies the operation to perform

– <b>Mod R/M </b>- specifies addressing mode/operands
– <b>SIB (scale index base) </b>- used for array index
– <b>address displacement </b>- used for addressing

memory

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<b>x86 Instruction Format Reference </b>

•

<b>Displacement </b>

•

We are really talking about an

<b>address offset </b>

within a segment (usually given as a named

variable or a label in code)

– it could be a <b>relative address</b> like the 8-bit value

used for jumping forward or backward from the
current location in the code segment

– or it could be the location of a <b>variable</b> in the data

segment

– or it could be a <b>FAR</b> reference to code or data in

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<b>x86 Instruction Format Reference </b>

•

<b>Displacement Examples </b>

•

<b>jmp next </b>

– where next is a label in the current

code segment

•

<b>add eax, var1 </b>

– where var1 is a 32-bit

variable in the current data segment

•

<b>sub bx, var2[ecx] </b>

– where var2 is a 16-bit

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