asus m50vm r1 0 schematics

5

4

3

2

1

M50Vm Montevina Block Diagram
Penryn

D

D

FAN + SENSOR

CPU VCORE

PAGE 50

PAGE 3,4,5

SYSTEM PWR

PAGE 80

PAGE 81

VGA Daughter BD
BAT & CHARGER

CLOCK GEN
ICS/9LPR363

FSB 1066MHz
VGA VCORE

PAGE 88
PAGE 29

Other PWR
PAGE 82, 83, 84, 85, 90, 91, 92, 93, 94

HDMI

Nvidia
NB9P-GE2
NB9M-GS2

PAGE 48

CRT & TV OUT
PAGE 45,47

LVDS & INV

DDR2 667/800MHz

(G)MCH
Cantiga

PCI-E x16

Dual Channel DDR2
SO-DIMM x2
PAGE 7,8,9
1394
PAGE 42

IEEE1394
RICOH R5C833

PAGE 10,11,12,13,14,15

PAGE 46
C

PAGE 67

C

PAGE 40,41

CARD READER

DMI Interface

PAGE 42

10/100/1000 LAN PHY
RealTek RTL8111C

PCI 33MHz

PAGE 33

LPC 33MHz

ICH9-M

Azalia

MINICARD
Robson

LCI/GLCI

DC Daughter BD
MINICARD
Shirley/ Echo Peak

PCI-E

INTERNAL
KEYBOARD

PAGE 20,21,22,23,24

EC
ITE/IT8512

PAGE 31

BIOS SPI ROM

PAGE 53

DC_IN, RJ11

PAGE 53

PAGE 60

PAGE 30,31

PAGE 31

ITPM

B

B

NewCard/DebugCard

MIC IN

Azalia Codec

Realtek/ALC663

PAGE 38

USB

PAGE 37

SATA

PAGE 43,44

HP_OUT

PAGE 36, 37, 38, 39

SPDIF _OUT

USB 2.0 CON x4

PAGE 37

PAGE 52

Azalia
MDC Header

TP Daughter BD
Fingerprint
PAGE 35

Camera USB

SATA ODD

Touchpad, Fingerprint

Touchpad

PAGE 46
PAGE 51

A

A

LED Board
PAGE 56

SATA HDD
PAGE 51

INSTANT KEY CON
PAGE 56

ESATA CON.

Touchpad
Daughter BD

PAGE 66

Title : Block Diagram

Fingerprint
ASUSTeK COMPUTER INC. NB4
PAGE 56

Bluetooth

Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Tuesday, April 15, 2008
5

4

3

2

Sheet
1

1

of

96


A

B

C

D

E

M50V Schematic Index
Page
1

2

3

4

01
02
03-05
07-09
10-15
20-24
25
29
30-31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
50
51
52

53
54
55
56
57
58
60
61
62
65
66
68
80
81
82
83
84
85
88
90
91
92
93
94

System page Ref.
Block Diagram
Schematic Information
CPU-Penryn
DDR II SO-DIMM

Cantiga
ICH9M
SPI ROM
CLK-ICS9LPR363CGLF-T
EC_IT8752
POWER-ON SEQUENCE
PCI-E LAN-RTL8111C
RJ45
MDC
CODEC-ALC663
AUDIO_AMP-G1431
FM2010 DSP
CARDBUS R5C833(PCI I/F)
CARDBUS R5C833(1394 & SD)
4 IN1 CON
NewCard PWR SW & CON
Debug
CRT
LVDS & INVERTER CONNECTOR
TV OUT CONN
THER SENSOR & FAN
HDD & CDROM
USB Port x 3
MINICARD(Ebron/Robson/3G)
PORT Docking
Super I/O & FIR
LED/TP/SW
DISCHARGE
UMB
DC power jack, Batter conn.

Blue Tooth
TPM
MDC NUT & Hinksink NUT
E-SATA
XDP
POWER_VCORE
POWER_SYSTEM
POWER_I/O_1.5V & 1.05VM
POWER_I/O_DDR & VTT
POWER_I/O_+3VM&+2.5VS&+1.25VM
NONE
POWER_CHARGER
POWER_DETECT
POWER_LOAD SWITCH
POWER_PROTECT
POWER_SIGNAL
POWER_FLOWCHART

5

ICH9-M GPIO
GPIO 00
GPIO 01
GPIO [2:5]
GPIO 06
GPIO 07
GPIO 08
GPIO 09
GPIO 10
GPIO 11

GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41

GPIO 42
GPIO 43
GPIO 44
GPIO 45
GPIO 46
GPIO 47
GPIO 48
GPIO 49
GPIO 50
GPIO 51
GPIO 52
GPIO 53
GPIO 54
GPIO 55
GPIO 56
GPIO 57
GPIO 58
GPIO 59
GPIO 60

Use As
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI

GPO
GPI
GPI
Native
Native
GPI
GPO
GPI
GPO
GPI
GPI
Native
GPO
Native
Native
GPO
GPO
Native
Native
Native
GPO
GPO
GPO
GPO
GPI
GPI
GPI
GPI
Native
Native

Native
Native
Native
Native
Native
Native
GPI
GPO
Native
Native
Native
Native
Native
Native
GPI
GPI
Native
Native

Signal Name
PM_SYNC#
PCI_INT[E:H]#
SIO_SMI#
WLAN_LED_ON
EXT_SMI#
LAN_WOL_EN
SUSPWR_ACK
EXT_SCI#

AC_PRESENT

STP_PCI#
PM_DPRSLPVR
WLAN_ON#
PD_RST#
LPC_DRQ1#
PD_EN
STP_CPU#
PM_S4_STATE#
BT_ON
CB_SD#
USB_OC#5
USB_OC#6
USB_OC#7
PM_CLKRUN#
EMAIL_LED#
PCB_ID0
PCB_ID1
PCB_ID2
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC8#
USB_OC9#
USB_OC10#
USB_OC11#
HDTV_EN#
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

SPI_CS#1
USB_OC0#

Power
+3VS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS

+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
N/A
N/A
N/A
N/A
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS

+3VSUS
+3VSUS
+3VSUS

EC GPIO

Use As

GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
GPB0
GPB1
GPB2
GPB3
GPB4
GPB5
GPB6
GPB7
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5

GPC6
GPC7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPE0
GPE1
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPF0
GPF1
GPF2
GPF3
GPF4
GPF5
GPF6
GPF7
GPG0
GPG1
GPG2
-

GPO
GPO
GPO
GPO
GPO
GPO
GPO
GPO
GPO
GPI
ALT
ALT
OD
OD
GPO
GPI
ALT
ALT
GPO
ALT
GPO
ALT
GPO
GPI
ALT
ALT
OD
OD
GPO

ALT
GPI
GPO
GPO
GPO
GPO
ALT
ALT
GPI
GPO
GPI
GPI
ALT
ALT
ALT
ALT
GPO
GPO
GPI
ALT
GPO
-

Signal Name

Power

PWR_LED_UP#
CHG_LED_UP#
BATSEL_3S#

LCD_BL_PWM
FAN0_PWM
BAT1_CNT1#
BAT2_CNT1#
CHG_EN#
PRECHG
DISTP#
SMB0_CLK
SMB0_DAT
A20GATE
RCIN#
PM_RSMRST#
MARATHON#
SMB1_CLK
SMB1_DAT
PM_PWRBTN#
AC_IN_OC#
OP_SD#
BAT1_IN_OC#
3G_ON#
PWRLIMIT#
PM_S4_STATE#
BUF_PLT_RST#
EXT_SCI#
EXT_SMI#
LCD_BACKOFF#
FAN0_TACH
COLOREN#
VSUS_ON
SUSC_EC#

SUSB_EC1#
CPU_VRON
PWR_SW#
BAT2_IN_OC#
LID_SW#
PM_THERM#
BLUETOOTH#
WIRELESS#
PS2_CLK_5S_PD
PS2_DATA_5S_PD
TP_CLK
TP_DAT
THRO_CPU
PS_SHDN#
INSTANT_ON#
PM_SUSB#
BAT1_CNT2#
-

EC GPIO

Use As

Signal Name

GPG6
GPH0
GPH1
GPH2
GPH3

GPH4
GPH5
GPH6
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPI7
GPJ0
GPJ1
GPJ2
GPJ3
GPJ4
GPJ5
GPK0
GPK1
GPK2
GPK3
GPK4
GPK5
GPL0
GPL1
GPL2
GPL3
GPL4
GPL5
GPL6

GPL7
GPK6
GPK7

GPO
OD
ALT
ALT
GPO
GPO
GPO
GPO
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPO
GPO
GPI
GPO
GPO
GPI
GPI
GPI
GPI
GPI

GPI
GPI
GPI
GPO
GPO
GPO
GPO
GPO
GPO
GPO
GPI

BAT2_CNT2#
PM_CLKRUN#
BAT_LEARN
NUM_LED
CAP_LED
SUS_PWRGD
ALL_SYSTEM_PWRGD
VRM_PWRGD
PWR_MON
PD_DET#
KB_ID0
KB_ID1
EC_CLK_EN
PM_PWROK
UNDOCK#_PD
BL_DA
FAN_DA
PM_SLP_M#

SUSPWR_ACK
PM_SUSC#
+3VM_PG

C

2

3

+1.05VM_+3VMCLK_PG

LAN_WOL_EN
AC_APR_UC#
LAN_RST#
CL_PWROK
EC_WLAN_PWR
SLP_M_ON
S4_STATE_ON
AC_PRESENT
PS_CPPE#

4

Title : Schematic Information
ASUSTeK COMPUTER INC. NB6
Size

Engineer: Raphael_Chen

Project Name

Rev

M50Vm

1.1

Date: Wednesday, February 13, 2008
B

1

5

Custom
A

Power

D

Sheet
E

2

of

96

5

4

10

H_A#[35:3]

10

H_REQ#[4:0]

2

1

H_D#[63:0]

H_D#[63:0]

10

3

H_A#[35:3]
H_REQ#[4:0]
T0318
T0319

D

1

D

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10

HIT#

HITM#

G6
E4

H_HIT#
H_HITM#

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

10
10
10

THERMTRIP#

H_PREQ#
H_TCK
H_TDI

H_TDO
H_TMS
H_TRST#
H_DBR#

2

+VCCP_CPU

R0315
1KOhm
1%

1
CPU_THRM_DA 50
CPU_THRM_DC 50

C7

H_THRMTRIP# 5,20,32
T0302

BCLK[0]
BCLK[1]

10
10
10

C0301

0.1UF/10V
@

H_DSTBN#1
H_DSTBP#1
H_DINV#1

A22
A21

R0316
2KOhm
1%

CLK_CPU_BCLK 29
CLK_CPU_BCLK# 29

29
29
29

T0313
T0314

1
1
GTL_REF2
H_TDO_M
H_TDI_M

+VCCP_CPU

2

SOCKET478B

R0335
1KOhm
1%

Pin T2 V3 change to
QC Thermal Diode
detect (THRMDA_2
THRMDC_2)

2
R0301
2KOhm
1%

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#

D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

AD26
C23
D25
C24
AF26
AF1
A26

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

B22
B23
C21

BSEL[0]
BSEL[1]
BSEL[2]

@

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#

AE24
AD24
AA21
AB22

AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61

H_D#62
H_D#63

MISC

COMP[0]
COMP[1]
COMP[2]
COMP[3]

R26
U26
AA1
Y1

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

C

Comp 0,2: Zo=27.4 Ohm, trace length < 0.5"
Comp 1,3: Z0=55 Ohm, trace length < 0.5"

H_DSTBN#3 10
H_DSTBP#3 10
H_DINV#3 10
H_COMP0
H_COMP1
H_COMP2
H_COMP3

R0311
R0312
R0313
R0314

1
1
1
1

2
2
2
2

27.4Ohm
54.9Ohm
27.4Ohm

54.9Ohm

1%
1%
1%
1%

H_DPRSTP# 11,20,80
H_DPSLP# 20
H_DPWR# 10
H_PWRGD 20
H_CPUSLP# 10
PM_PSI# 80

DC

Default Strapping When Not Used

BCLK

FSB

BSEL2

166

667

L

BSEL1

H

H

200

800

L

H

L

266

1067

L

L

L

B

BSEL0
+VCCP_CPU

1 200Ohm @

R0319 2

+VCCP_CPU
+VCCP_CPU
H_PREQ#
H_TDI
H_TDO
H_TMS

R0302
R0303
R0304
R0305

1
1
1@
1

2
2
2
2

54.9Ohm
54.9Ohm
54.9Ohm
54.9Ohm

1%
1%
1%
1%

H_DBR#

R0306

1@

2 1KOhm

H_TCK
H_TRST#

R0307
R0308

1
1

2 54.9Ohm 1%
2 54.9Ohm 1%

R0310
68Ohm

H_PROCHOT_S#

1%

@

+3VS
30,88 PWRLIMIT#

2
D0301

1
RB751V-40

D

3
Q0301
H2N7002
11

1

1
2

C0302
0.1UF/10V
@

1
1
1
1

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

H_DSTBN#2 10
H_DSTBP#2 10
H_DINV#2 10

SOCKET478B

Pin B2 M4 N5 left as NC for QC
design (BPM_2# [2] BPM_2#[1]
BPM_2[0])

1

@

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

Zo=55 Ohm, 0.5" max
for GTL_REF

T0303

RESERVED

B

GTL_REF
1% 1 1KOhm
1% 1 1KOhm
T0304
T0305
T0306
T0307

R0317 2 @
R0318 2 @

2

D21 H_PROCHOT_S#
A24
B25

H CLK

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

10
10

THERMAL
PROCHOT#
THRMDA
THRMDC

H_DSTBN#0
H_DSTBP#0
H_DINV#0

DATA GRP 2

H_CPURST# 10
H_RS#0
10
H_RS#1
10
H_RS#2
10
H_TRDY# 10

DATA GRP 3

CONTROL

C1
F3
F4
G3
G2

2

STPCLK#
LINT0
LINT1
SMI#

H_LOCK# 10

RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#

D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

1

D5
C6
B4
A3

1

H4

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

+VCCP_CPU

2 56Ohm
20

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#

D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26

U22

3

H_STPCLK#
H_INTR
H_NMI
H_SMI#

A20M#
FERR#
IGNNE#

H_INIT#

10

1

20
20
20
20

T0321

A6
A5
C4

H_BR0#
R0309 1

1

H_A20M#
H_FERR#
H_IGNNE#

1

F1
D20 H_IERR#
B3

LOCK#

ICH

20
20
20

T0320

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#

A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

H_DEFER# 10
H_DRDY# 10
H_DBSY# 10

1

H_ADSTB#1

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

IERR#
INIT#

H5
F21
E1

10
10
10

2

10

BR0#

H_ADS#
H_BNR#
H_BPRI#

E22
F24
E26
G22
F23
G25
E25
E23
K24

G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP 1

C

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4

W3
AA4
AB2
AA3
V1

DEFER#
DRDY#
DBSY#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34

H_A#35

K3
H2
K2
J3
L1

ADS#
BNR#
BPRI#

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

1

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

XDP/ITP SIGNALS

H_ADSTB#0

U0301B

H1

E2
G5

DATA GRP 0

10

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

ADDR GROUP 0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7

H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

1

U0301A

G

THRO_CPU 30

2

S 2

Place R0304 & R0306 for XDP function

A

A

QC

Default Strapping When Not Used
+VCCP_CPU

/QC only QC mount
/QC@ DC mount

Title : Penryn CPU (1)
ASUSTeK COMPUTER INC. NB4

H_TDO_M
H_TDI_M

R0330
R0331

1@
1@

2 54.9Ohm 1%
2 54.9Ohm 1%

Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Tuesday, March 04, 2008
5

4

3

2

Sheet
1

3

of

96


5

4

3

2

1

U0301D

+VCORE

+VCORE
U0301C

Pin AA7 left NC for
QC design (QC BR1#)

B

1 R0407
0Ohm

2
/QC@

VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9

VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA1
VCCA2

B26
C26

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VSSSENSE

AE7

1 R0403 2
0Ohm /QC@

Pin F8 left as
GTLREF_Control for QC

design

+VCCP_CPU

1 R0410 2GTLREF_CTRL_R
0Ohm /QC@

+VCCA_CPU
120 mA

+1.5VS

+VCCA_CPU

1

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14

AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

C0402
0.01UF/16V

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

1
3
5
7
1
3
5
7
R0401

0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm

1

2
4
6
8
2
4
6
8

2

RNX0401A
RNX0401B
RNX0401C
RNX0401D
RNX0402A
RNX0402B
RNX0402C
RNX0402D
100Ohm 1%

2

VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83

VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

1

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10

VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40

VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67

2

C

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12

D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18

AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

C0401
10UF/6.3V

VR_VID0
VR_VID1
VR_VID2
VR_VID3
VR_VID4
VR_VID5
VR_VID6

80
80
80
80
80
80
80

+VCORE

VCCSENSE 80
VSSSENSE 80

1

D

2

SOCKET478B

R0402
100Ohm
1%

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21

B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8

F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22

M25
N1
N4
N23
N26
P3

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23

VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53

VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81

VSS82

VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112

VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142

VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163

P6
P21
P24
R2
R5
R22
R25
T1

T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
1 R0404
AA8
0Ohm
AA11
AA14
AA16
AA19
AA22
AA25

AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8 1 R0405
0Ohm
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4

1 R0406
AE8
0Ohm
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

D

2
/QC@

Pin AA8 AC8 D8 left as
reserved for QC design

C

2
/QC@

2
/QC@

Pin AE8 left as NC for QC
design (BPM_2#[3])

B

SOCKET478B

A

A

Title : Penryn CPU (2)
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
5

4

3

2

Sheet
1

4

of

96


2

+VCCP Decoupling Capacitor
(Place near CPU)

38A for Penryn

C0537
0.1UF/16V

D

1

1

1
C0534
0.1UF/16V

2

C0535
0.1UF/16V

2

1

1
C0538
0.1UF/16V

2

C0514
0.1UF/16V

C0536

0.1UF/16V

C0533
10UF/6.3V

1
C0509
10UF/6.3V

Decoupling guide from Intel
VCORE 22uF/10V r 10uF
* 32pcs
330uF/2V
* 6pcs
VCCP 0.1uF
* 6pcs
150uF
* 1pcs ?
10uF
* 1pcs ?

1
C0526
10UF/6.3V

2

2

C0513

10UF/6.3V

2

1
C0510
10UF/6.3V

1

2

1
C0503
10UF/6.3V

1
C0506
10UF/6.3V

2

C0501
10UF/6.3V

2

1
C0520
10UF/6.3V

1

2

1
1
C0507
10UF/6.3V

2

2

C0504
10UF/6.3V

C0511
10UF/6.3V

2

2
1

C0522
10UF/6.3V

2

1

1
2

C0528
10UF/6.3V

1
C0516
10UF/6.3V

2

2

C0539
10UF/6.3V

2

2

C0524
10UF/6.3V

1

1

2

C0517
10UF/6.3V

150UF/4V

1

CE0501

C0529
10UF/6.3V

+VCORE Mid-Frequency Capacitor
Intel: 22UF *32
F3S: 10UF *16
A7S: 10UF *10 ....11/17
V1V: ?
+VCCP Decoupling Capacitor
Intel: 270UF *1, 0.1UF *6
F3S: 100UF *1, 0.1UF *4
V1V: ?

1
C0505
10UF/6.3V

2

2

1

1

1
C0512
10UF/6.3V

1

2

1

2

C0525
10UF/6.3V

+

1

1

C0527
10UF/6.3V

2

1
C0519
10UF/6.3V

+VCCP_CPU

JP0501
2MM_OPEN_5MIL
@
1 1 2 2

2

C0521
10UF/6.3V

2

1

1
C0530
10UF/6.3V

2

C0502
10UF/6.3V

2

1

1
C0523
10UF/6.3V

2

2

C0515
10UF/6.3V

2

1

1
C0518
10UF/6.3V

2

1
C0531
10UF/6.3V

2

C0508
10UF/6.3V

2

2

1

1

+VCCP

D

1

2

+VCORE

3

2

4

2

5

C0532
10UF/6.3V

C

C

? DEGREE C

THERMAL PROTECTION
PLACE UNDER CPU

1

+5VA

B

+VCCP
B

R0501
22.1KOhm
1%

D

Q0501
2N7002

3

+5VA

1

2
0.1UF/16V

Q0503
2N7002
81,92

1

2

FORCE_OFF#

1

11,21,30,33,38,43,50,53,58,62,64,70

FORCE_OFF#

G

@

3

3

2

Q0502
PMBS3904

FORCE_OFF#

D

S 2

4

3,11,20,32 H_THRMTRIP#

@

3
C

PST9013NR

100KOhm

5

E
2

NC
VCC
SUB
GND VOUT

1
C0542

R0502

@
U0601

1
2
3

S 2

330Ohm

PM_SUSC# 22,30

2

0.01UF/16V

R0505

56Ohm

1 B

C0540

1

2

11
G

R0504

2

2
100KOhm

@

2

1
RT0501

3

@

1

1

2

+VCCP

BUF_PLT_RST#

@

Thermal Trip signal (From CPU to ICH-9M and sequence)

A

A

Title : CPU CAPS
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
5

4

3

2

Sheet
1

5

of

96


5

4

3

2

1

D

D

C

C

B

B

A

A

Title :
ASUSTeK COMPUTER INC. NB6
Size

Engineer:

Project Name

Rev

A

1.0

Date: Wednesday, February 13, 2008
5

4

3

2

Sheet

6
1

of

96


5

4

3

2

1

D

D

9,12 M_A_A[0..14]

M_A_DQ[0..63] 12
J0701A

2
1

1

1

2

2

12 M_A_DM[0..7]

12 M_A_DQS[0..7]

B

12 M_A_DQS#[0..7]

SO-DIMM 0 is placed farther from the GMCH than SO-DIMM 1

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

10
26
52
67
130
147
170
185

DM0
DM1
DM2
DM3
DM4
DM5

DM6
DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

13
31
51
70
131
148
169
188
11
29

49
68
129
146
167
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

1
C0712
2.2UF/6.3V

C0713
0.1UF/10V

11

RX0702
2

PM_EXTTS#0

1

0Ohm @
M_VREF_MCH

C0715
2.2UF/6.3V

1

114
119

CN0703A
CN0703B
CN0703C
CN0703D

2
0.1UF/25V
4
0.1UF/25V

6
0.1UF/25V
8
0.1UF/25V

2

M_ODT0
M_ODT1

M_CLK_DDR#1

+3VS

1
3
5
7

1

9,11
9,11

C0702
10PF/50V
@

C0704
10UF/10V

2

SMB_CLK_S
SMB_DAT_S

M_CLK_DDR1

R0704
10KOhm

ODT0
ODT1

8,24,29,38,43,53
8,24,29,38,43,53

Place near SO-DIMM_0

R0703
10KOhm

BA0
BA1
S0#
S1#
CK0
CK0#
CK1
CK1#

CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195

9,12
M_A_BS0

9,12
M_A_BS1
9,11
M_CS#0
9,11
M_CS#1
11 M_CLK_DDR0
11 M_CLK_DDR#0
11 M_CLK_DDR1
11 M_CLK_DDR#1
9,11
M_CKE0
9,11
M_CKE1
9,12 M_A_CAS#
9,12 M_A_RAS#
9,12
M_A_WE#

M_CLK_DDR#0

C

M_A_BS2

J0701B

1

9,12

Layout Note: Place these caps near SO DIMM 0
+1.8V

2

C0701
10PF/50V
@

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19

DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49

DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ1
M_A_DQ6
M_A_DQ2
M_A_DQ4
M_A_DQ0
M_A_DQ5
M_A_DQ3
M_A_DQ7
M_A_DQ12
M_A_DQ9
M_A_DQ11
M_A_DQ10
M_A_DQ13
M_A_DQ8
M_A_DQ14

M_A_DQ15
M_A_DQ21
M_A_DQ17
M_A_DQ23
M_A_DQ22
M_A_DQ20
M_A_DQ16
M_A_DQ19
M_A_DQ18
M_A_DQ24
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ28
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ37
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ36
M_A_DQ35
M_A_DQ39
M_A_DQ38
M_A_DQ42
M_A_DQ47
M_A_DQ40
M_A_DQ46
M_A_DQ44

M_A_DQ45
M_A_DQ43
M_A_DQ41
M_A_DQ48
M_A_DQ53
M_A_DQ54
M_A_DQ52
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ55
M_A_DQ56
M_A_DQ61
M_A_DQ58
M_A_DQ59
M_A_DQ57
M_A_DQ60
M_A_DQ62
M_A_DQ63

2

1

2

M_CLK_DDR0

A0
A1

A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2

5
7
17
19
4
6
14
16
23
25
35
37
20
22

36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153

140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

1

SMBus Slave Address: A0H

102
101
100
99
98

97
94
92
93
91
105
90
89
116
86
84
85

2

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

C0714
0.1UF/10V

VREF -> 10/10 mils

112
111
117
96
95
118
81
82
87
103
88
104

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDD12

199

VDDSPD

83
120
50
69
163

NC1
NC2
NC3
NC4
NCTEST

1

VREF

201
202

GND0
GND1

203
204

NP_NC1
NP_NC2

47
133
183
77
12
48
184
78
71
72
121
122
196
193
8

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

VSS11
VSS12
VSS13
VSS14
VSS15

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39

VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57

18
24
41
53
42
54
59
65
60
66
127

139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150

162

C

B

DDR2_DIMM_200P

DDR2_DIMM_200P

A

A

Title : DDR2 SO-DIMM_0
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008

5

4

3

2

Sheet
1

7

of

96


5

4

3

2

1

D

D

M_B_DQ[0..63] 12
9,12 M_B_A[0..14]
J0801A

1

+3VS
R0803
10KOhm

R0804 1
7,24,29,38,43,53
7,24,29,38,43,53

2

9,11
9,11

114
119

ODT0
ODT1

12 M_B_DM[0..7]

M_B_DM0

M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

10
26
52
67
130
147
170
185

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

B

12 M_B_DQS[0..7]

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

13
31
51
70
131
148
169
188
11
29
49
68
129

146
167
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

12 M_B_DQS#[0..7]

1

M_ODT2
M_ODT3

2 10KOhm
SMB_CLK_S

SMB_DAT_S

1
3
5
7

C0807
10UF/10V

2
0.1UF/25V
4
0.1UF/25V
6
0.1UF/25V
8
0.1UF/25V

CN0808A
CN0808B
CN0808C
CN0808D

+3VS

C0811
2.2UF/6.3V

C0812

0.1UF/10V

11

RX0802 @
2
1
0Ohm

PM_EXTTS#1

112
111
117
96
95
118
81
82
87
103
88
104

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6

VDD7
VDD8
VDD9
VDD10
VDD11
VDD12

199

VDDSPD

83
120
50
69
163

NC1
NC2
NC3
NC4
NCTEST

1

VREF

201
202

GND0
GND1

203
204

NP_NC1
NP_NC2

47
133
183
77
12
48
184
78
71
72
121
122
196
193
8

VSS1
VSS2
VSS3
VSS4
VSS5

VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

M_VREF_MCH

C0818
2.2UF/6.3V

1

M_CLK_DDR#2

J0801B

2

C0802
10PF/50V
@

+1.8V

1

M_CLK_DDR2

2

BA0
BA1
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

Layout Note: Place these Caps near SO DIMM 1

2

Place near SO-DIMM_1

1

107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195

M_B_BS2

9,12
M_B_BS0
9,12
M_B_BS1
9,11
M_CS#2
9,11
M_CS#3

11 M_CLK_DDR2
11 M_CLK_DDR#2
11 M_CLK_DDR3
11 M_CLK_DDR#3
9,11
M_CKE2
9,11
M_CKE3
9,12 M_B_CAS#
9,12 M_B_RAS#
9,12
M_B_WE#

M_B_DQ4
M_B_DQ1
M_B_DQ6
M_B_DQ2
M_B_DQ5
M_B_DQ0
M_B_DQ7
M_B_DQ3
M_B_DQ13
M_B_DQ12
M_B_DQ15
M_B_DQ10
M_B_DQ8
M_B_DQ9
M_B_DQ11
M_B_DQ14
M_B_DQ17

M_B_DQ20
M_B_DQ22
M_B_DQ21
M_B_DQ16
M_B_DQ18
M_B_DQ23
M_B_DQ19
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ29
M_B_DQ28
M_B_DQ31
M_B_DQ30
M_B_DQ34
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ33
M_B_DQ32
M_B_DQ39
M_B_DQ35
M_B_DQ45
M_B_DQ41
M_B_DQ46
M_B_DQ40
M_B_DQ47
M_B_DQ44
M_B_DQ42

M_B_DQ43
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ54
M_B_DQ53
M_B_DQ52
M_B_DQ55
M_B_DQ51
M_B_DQ61
M_B_DQ60
M_B_DQ63
M_B_DQ58
M_B_DQ56
M_B_DQ57
M_B_DQ59
M_B_DQ62

2

9,12

M_CLK_DDR#3
C

5
7
17
19
4

6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135

137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

1

C0801
10PF/50V
@

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53

DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

2

1

2

M_CLK_DDR3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP

A11
A12
A13
A14
A15
A16_BA2

1

SMBus Slave Address:A4H

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

2

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

C0819
0.1UF/10V

Layout Note: Place these Caps near SO DIMM 1
VREF -> 10/10 mils

18
24
41
53
42
54
59

65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161

28
40
138
150
162

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39

VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57

C

B

DDR_DIMM_200P

DDR_DIMM_200P

A

A

Title : DDR2 SO-DIMM_1
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
5

4

3

2

Sheet
1

8

of

96


5

4

3

2

1

+0.9VS
L0901
120Ohm/100Mhz
1
2

D

83 0.9V_VTT_REF

by power

2
0.1UF/25V
4

0.1UF/25V
6
0.1UF/25V
8
0.1UF/25V

1
3
5
7

1
2
3
4
5
6
7
8

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

16

15
14
13
12
11
10
9

RN0901A
RN0901B
RN0901C
RN0901D
RN0901E
RN0901F
RN0901G
RN0901H

M_CS#1
M_A_A7
M_A_A13
M_ODT1
M_A_WE#
M_A_CAS#
M_A_A10
M_A_BS0

CN0905A
CN0905B
CN0905C
CN0905D

2
0.1UF/25V
4
0.1UF/25V
6
0.1UF/25V
8
0.1UF/25V

1
3
5
7

1
2
3
4
5
6
7
8

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm

16
15
14
13
12
11
10
9

RN0902A
RN0902B
RN0902C
RN0902D
RN0902E
RN0902F
RN0902G
RN0902H

M_A_A12
M_A_A11
M_A_A5
M_A_A8
M_A_A9
M_A_A1
M_A_A3

CN0906A

CN0906B
CN0906C
CN0906D

2
0.1UF/25V
4
0.1UF/25V
6
0.1UF/25V
8
0.1UF/25V

1
3
5
7

1
2
3
4
5
6
7
8

56Ohm
56Ohm
56Ohm

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

16
15
14
13
12
11
10
9

RN0903A
RN0903B
RN0903C
RN0903D
RN0903E
RN0903F
RN0903G
RN0903H

M_ODT0
M_CS#0
M_A_RAS#
M_A_BS1
M_A_A0
M_A_A2

M_A_A4
M_A_A6

CN0907A
CN0907B
CN0907C
CN0907D

2
0.1UF/25V
4
0.1UF/25V
6
0.1UF/25V
8
0.1UF/25V

1
3
5
7

1
2
3
4
5
6
7
8

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

16
15
14
13
12
11
10
9

RN0904A
RN0904B
RN0904C
RN0904D
RN0904E
RN0904F
RN0904G
RN0904H

M_ODT3
M_CS#3

M_ODT2
M_CS#2
M_B_RAS#
M_B_A13
M_B_A0
M_B_BS1

CN0908A
CN0908B
CN0908C
CN0908D

2
0.1UF/25V
4
0.1UF/25V
6
0.1UF/25V
8
0.1UF/25V

1
3
5
7

1
2
3
4

5
6
7
8

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

16
15
14
13
12
11
10
9

RN0905A
RN0905B
RN0905C
RN0905D
RN0905E
RN0905F
RN0905G

RN0905H

M_B_CAS#
M_B_WE#
M_B_BS0
M_B_A10
M_B_A2
M_B_A4
M_B_A1
M_B_A3

2

2

R0901
10KOhm
1% @

1

1

+1.8V

CN0904A
CN0904B
CN0904C
CN0904D

C0903
0.1UF/16V
@

M_VREF_MCH
L0902 N/A
120Ohm/100Mhz
1
2

2

C0902
0.1UF/16V
@

2

R0902
10KOhm
1% @

1

1

M_VREF

D

C

M_A_A14 7,12

C

M_A_A[0..13] 7,12
M_A_BS[0..2] 7,12
M_A_CAS# 7,12
M_A_RAS# 7,12
M_A_WE# 7,12

M_B_A[0..13] 8,12
M_B_BS[0..2] 8,12
B

B

M_B_CAS# 8,12
M_B_RAS# 8,12
M_B_WE# 8,12
CN0909A
CN0909B
CN0909C
CN0909D

2
0.1UF/25V
4
0.1UF/25V

6
0.1UF/25V
8
0.1UF/25V

1
2
3
4
5
6
7
8

1
3
5
7

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

16
15

14
13
12
11
10
9

RN0906A
RN0906B
RN0906C
RN0906D
RN0906E
RN0906F
RN0906G
RN0906H

M_B_A5
M_B_A8
M_B_A7
M_B_A6
M_B_A11
M_B_BS2
M_B_A12

M_B_A14 8,12

M_CS#[0..3] 7,8,11
M_ODT[0..3] 7,8,11
C0910

1
3
5
7

0.1UF/16V
2
1

M_CKE[0..3] 7,8,11

C0911

0.1UF/16V
2
1

2
4
6
8

56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm
56Ohm

56Ohm

2
4
6
8

1
3
5
7

RN0908A
RN0908B
RN0908C
RN0908D

RN0909A
RN0909B
RN0909C
RN0909D

M_B_A9
M_CKE2
M_CKE3

M_CKE1
M_A_BS2
M_CKE0

A

A

Title : DDR2 termination
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Tuesday, March 04, 2008
5

4

3

2

Sheet
1

9

of

96


5

4

3

2

1

U1001A

D

R1001
24.9Ohm
1%

1

H_RCOMP

2

C

2

+VCCP

1

R1002
221Ohm
1%

2

C1002
0.1UF/10V

1

R1003
100Ohm
1%

1

2

H_SWING

B

H_SWING
H_RCOMP

1

H_CPURST#
H_CPUSLP#

R1006

2

1 0Ohm

H_VREF

2
1

H_SWING
H_RCOMP

1

2

3

3

R1004
1KOhm
1%

R1005
2KOhm
1%

C12
E11

A11
B11

H_CPURST#
H_CPUSLP#

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13

H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9

H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

A14
C15
F16

H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9

H9
E12
H11
C9

H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BR0#
3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 29
CLK_MCH_BCLK# 29
H_DPWR# 3
H_DRDY# 3
H_HIT#
3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8

L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

3
3
3
3

H_DSTBP#_0

H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

3
3
3
3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

D

3

H_A#[35:3]

3

H_REQ#[4:0]

3

H_D#[63:0]

H_A#[35:3]
H_REQ#[4:0]
H_D#[63:0]
C

3
3

3
3
B

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2

3
3
3

H_AVREF
H_DVREF
CANTIGA_CHIPSET

1

2

C5
E3

H_D#_0
H_D#_1

H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31

H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61

H_D#_62
H_D#_63

T1001

+VCCP

C1001
0.1UF/10V
@

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2

N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12

AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6

HOST

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11

H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41

H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

A

A

Cap 0.1uF within 500 mils from GMCH

Title : Cantiga - CPU (1)

ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Michael_Wang

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
5

4

3

2

Sheet
1

10

of

96


4

2

2 RN1106A

CLK_DREF#

/PM 3

0OHM

4 RN1106B

CLK_DREF

/PM

1

0OHM

2 RN1107A

CLK_DREFSS#

/PM

3

0OHM

4 RN1107B

CLK_DREFSS

FOLLOW INTEL Design
C

M_CKE0
M_CKE1
M_CKE2
M_CKE3

7,9
7,9
8,9
8,9

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

BA17
AY16
AV16

AR13

M_CS#0
M_CS#1
M_CS#2
M_CS#3

7,9
7,9
8,9
8,9

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

BD17
AY17
BF15
AY13

M_ODT0
M_ODT1
M_ODT2
M_ODT3

7,9
7,9
8,9

8,9

SM_RCOMP
SM_RCOMP#

BG22
BH21

M_RCOMP 1 R1108
M_RCOMP#
1 R1110

SM_RCOMP_VOH
SM_RCOMP_VOL

BF28
BH28

SM_RCOMP_VOH
SM_RCOMP_VOL
M_VREF_MCH

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

AV42
AR36
BF17

BC36

499Ohm
1 R1121

2 1%

CLK_MCH_3GPLL 29
CLK_MCH_3GPLL# 29

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

AE41
AE37
AE47
AH39

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

21
21
21
21

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AE40
AE38
AE48
AH40

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

21
21
21
21

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AE35
AE43
AE46
AH42

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

21
21
21
21

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

AD35
AE44
AF46
AH43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

21
21
21
21

C1105
0.01UF/16V
@

A

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

70 LVDS_U0P_GM
70 LVDS_U1P_GM
70 LVDS_U2P_GM

B42
G38
F37
K37

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TV_CVBS_J
TV_Y_J
TV_C_J

B33

B32
G33
F33
E33

1
1
1
1
1

T1110
T1111
T1112
T1113
T1114

GFX_VR_EN

C34

1

T1106

TVA_DAC
TVB_DAC
TVC_DAC

H24

TV_RTN

C31
E32

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE_J

E28

CRT_BLUE

CRT_GREEN_J

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

CRT_RED_J

45 CRT_DDC_CLK
45 CRT_DDC_DATA

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

F25
H25
K25

change CRT
part-number to 0
Ohm
10G212000004010
R1112

T1117

1 R1117
1 R1112
1 R1118

T1119

H32
J32

2 33Ohm /GM J29
2 1.02KOhm 1% E29
33Ohm
/GM
L29
2

+VCCP

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47

AD39

PCIENB_RXN0
PCIENB_RXN1
PCIENB_RXN2
PCIENB_RXN3
PCIENB_RXN4
PCIENB_RXN5
PCIENB_RXN6
PCIENB_RXN7
PCIENB_RXN8
PCIENB_RXN9
PCIENB_RXN10
PCIENB_RXN11
PCIENB_RXN12
PCIENB_RXN13
PCIENB_RXN14
PCIENB_RXN15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10

PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PCIENB_RXP0
PCIENB_RXP1
PCIENB_RXP2
PCIENB_RXP3
PCIENB_RXP4
PCIENB_RXP5
PCIENB_RXP6

PCIENB_RXP7
PCIENB_RXP8
PCIENB_RXP9
PCIENB_RXP10
PCIENB_RXP11
PCIENB_RXP12
PCIENB_RXP13
PCIENB_RXP14
PCIENB_RXP15

PCIENB_RXN[15:0]

70

PCIENB_RXP[15:0]

70

C

70

PCIEG_RXP[15:0]

70

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3

PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

J41 PCIENB_TXN0
M46 PCIENB_TXN1
M47 PCIENB_TXN2
M40 PCIENB_TXN3
M42 PCIENB_TXN4
R48 PCIENB_TXN5
N38 PCIENB_TXN6
T40 PCIENB_TXN7
U37 PCIENB_TXN8
U40 PCIENB_TXN9
Y40 PCIENB_TXN10
AA46 PCIENB_TXN11
AA37 PCIENB_TXN12
AA40 PCIENB_TXN13
AD43 PCIENB_TXN14
AC46 PCIENB_TXN15

C1138
C1121
C1148
C1134
C1147
C1143
C1133
C1144
C1137
C1117
C1118
C1120
C1122
C1146
C1140
C1119

1
1
1
1
1
1
1
1
1
1
1
1
1

1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V

0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V

/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM

PCIEG_RXN0
PCIEG_RXN1
PCIEG_RXN2
PCIEG_RXN3
PCIEG_RXN4

PCIEG_RXN5
PCIEG_RXN6
PCIEG_RXN7
PCIEG_RXN8
PCIEG_RXN9
PCIEG_RXN10
PCIEG_RXN11
PCIEG_RXN12
PCIEG_RXN13
PCIEG_RXN14
PCIEG_RXN15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

J42 PCIENB_TXP0

L46 PCIENB_TXP1
M48 PCIENB_TXP2
M39 PCIENB_TXP3
M43 PCIENB_TXP4
R47 PCIENB_TXP5
N37 PCIENB_TXP6
T39 PCIENB_TXP7
U36 PCIENB_TXP8
U39 PCIENB_TXP9
Y39 PCIENB_TXP10
Y46 PCIENB_TXP11
AA36 PCIENB_TXP12
AA39 PCIENB_TXP13
AD42 PCIENB_TXP14
AD46 PCIENB_TXP15

C1127
C1145
C1128
C1142
C1139
C1125
C1123
C1124
C1135
C1126
C1141
C1131
C1129
C1130

C1136
C1132

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2

2
2
2
2
2
2

0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V

/PM
/PM
/PM
/PM
/PM
/PM

/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM
/PM

PCIEG_RXP0
PCIEG_RXP1
PCIEG_RXP2
PCIEG_RXP3
PCIEG_RXP4
PCIEG_RXP5
PCIEG_RXP6
PCIEG_RXP7
PCIEG_RXP8
PCIEG_RXP9
PCIEG_RXP10
PCIEG_RXP11
PCIEG_RXP12
PCIEG_RXP13
PCIEG_RXP14
PCIEG_RXP15

AH37
AH36

AN36
AJ35
AH34

B

CRT_BLUE_J

CL_CLK0 22
CL_DATA0 22
PM_PWROK 22,30
CL_RST#0 22

CL_VREF

N28
M28
G36
E36
K36
H36

TSATN#

B12

1
1

T1116

T1118

C1106
0.1UF/10V

CRT_GREEN_J

R1102
499Ohm 511 Ohm CRB P7
1%

SDVO_CTRLCLK 48
SDVO_CTRLDATA 48
MCH_ICH_SYNC#

change CRT part-number to
0 Ohm 10G212000004010
R1109 R1120 R1111

CRT_RED_J

2

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

R1106
1KOhm
1%

R1111
PM: 0Ohm
150Ohm
GM disable: 0Ohm
GM: 150Ohm

22

R1122 1 56OHM 2

+VCCP

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

B28
B30
B29
C29
A28

ACZ_BCLK_HDMI 20
ACZ_RST#_HDMI 20

1
ACZ_SDOUT_HDMI 20 R1119
ACZ_SYNC_HDMI 20

2
33Ohm

ACZ_SDIN2_HDMI

A

Title : Cantiga-DDR2/PEG(2)

20
ASUSTeK COMPUTER INC. NB4
Size

PM NC AUD side

Custom

Engineer:

2

Michael_Wang

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
3

R1109
150Ohm

R1120
150Ohm

To EC(THERM.)

4

PCIEG_RXN[15:0]

CANTIGA_CHIPSET

CANTIGA_CHIPSET
5

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3

PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

2
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

1

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25

A41
H38
G37

J37

R1112: 0 ohm for PM

NC

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1

F1

70 LVDS_U0N_GM
70 LVDS_U1N_GM
70 LVDS_U2N_GM

2

2 0Ohm R29
B7
PM_EXTTS#0
N33
PM_EXTTS#1
P32
0Ohm
AT40
2
AT11
2
100Ohm
T20
R32
2
0Ohm

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

T37
T36

1

1
1

H48
D45
F40
B40

1

T1104
T1109

70 LVDS_L0P_GM
70 LVDS_L1P_GM
70 LVDS_L2P_GM

LVDS_LCLKN_GM
LVDS_LCLKP_GM
LVDS_UCLKN_GM
LVDS_UCLKP_GM

R1.1 SWAP LVDS Chanel A B

2

1
1

DMI

T1103
T1108

PM

R1115 1
22 PM_SYNC#
3,20,80 H_DPRSTP#
7 PM_EXTTS#0
8 PM_EXTTS#1
R1114 1
22,30 PM_PWROK
1
5,21,30,33,58 BUF_PLT_RST#
R1113
5,20,32 H_THRMTRIP#
1
22,80 PM_DPRSLPVR
R1116

1

GRAPHICS VID

15 MCH_CFG_19
15 MCH_CFG_20

T1107

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

1

VGA

15 MCH_CFG_16
B

1

H47
E46
G40
A40

70
70
70
70

+1.8V

2 80.6Ohm 1%
2 80.6Ohm 1%

F43
E43

ME

15 MCH_CFG_12
15 MCH_CFG_13

T1115

CFG

15 MCH_CFG_9
15 MCH_CFG_10

1
1

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8

CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

70 LVDS_L0N_GM
70 LVDS_L1N_GM
70 LVDS_L2N_GM

L_VDDEN
LVDS_IBG
2
2.37KOHM 1% /GM
1
2 LVDS_VREF
R1123
0Ohm
/GM

PEG_CLK
PEG_CLK#

MISC

15 MCH_CFG_5
15 MCH_CFG_6
15 MCH_CFG_7

T1102
T1101

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

70

PEG_COMP 1 49.9Ohm 2 1%

PEG_COMPI
PEG_COMPO

D

TV

29 MCH_BSEL0
29 MCH_BSEL1
29 MCH_BSEL2

M29
C44
B43
E37

E38
C41
C40
B37
A37

EDID_CLK
EDID_DAT

R1107

CLK_DREF 29
CLK_DREF# 29
CLK_DREFSS 29
CLK_DREFSS# 29

PM_EXTTS#0
PM_EXTTS#1

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

70
70

B38
A38
E41
F41

HDA

10KOHM 2 RN1108A
10KOHM 4 RN1108B

M33
K33
J33

SSC

+3VS

1
3

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

70 L_BKLTEN

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

CLK

0OHM

DDR

1
/PM 1

BC28
AY28
AY36
BB36

+VCC_PEG
R1101
L32
G32
M32

2

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

U1001C

7
7
8
8

2

A47
BG23
BF23
BH18
BF18

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

1

RSVD20

AR24
AR21
AU24
AV20

1

1
1
2

1
2

C1104
0.01UF/16V

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

7
7
8
8

1

1
2

C1103
2.2UF/6.3V

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

1

CRT signals
PM:GND
OTH Hsync and Vsync NC

GRAPHICS

AY21
0Ohm

R1143
R1105
1KOhm
1%

AP24
AT21
AV24
AU20

1

RSVD15
RSVD16

RSVD17

SM_RCOMP_VOL

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

2

B31
AJ6
M1

C1102
0.01UF/16V

2

1
2

2

C1101
2.2UF/6.3V

R1104
3.01KOHM

1

2

LVDS signals
PM:NC

LVDS

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

R1103
1KOhm
1%

RSVD

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24

CONTROL/COMPENSATION

2
1

0.1% CRB P7

SM_RCOMP_VOH

D

3

U1001B

PCI-EXPRESS

5

+1.8V

Sheet
1

11

of

96


5

4

3

2

1

D

D

8 M_B_DQ[0:63]

B

M_A_BS0 7,9
M_A_BS1 7,9
M_A_BS2 7,9

SA_RAS#
SA_CAS#
SA_WE#

BB20
BD20
AY20

M_A_RAS# 7,9
M_A_CAS# 7,9
M_A_WE# 7,9

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3

SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25

BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

U1001E
M_B_DQ0
M_B_DQ1

M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61

M_B_DQ62
M_B_DQ63

M_A_DM[0..7] 7

M_A_DQS[0:7] 7

M_A_DQS#[0:7] 7

M_A_A[0:14] 7,9

CANTIGA_CHIPSET

AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46

BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1

BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11

SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41

SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

B

BD21
BG18
AT25

MEMORY

SA_BS_0
SA_BS_1
SA_BS_2

SYSTEM

MEMORY
SYSTEM
DDR

C

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16

SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46

SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

A

U1001D
M_A_DQ0 AJ38
M_A_DQ1 AJ41
M_A_DQ2 AN38
M_A_DQ3 AM38
M_A_DQ4 AJ36
M_A_DQ5 AJ40
M_A_DQ6 AM44
M_A_DQ7 AM42
M_A_DQ8 AN43

M_A_DQ9 AN44
M_A_DQ10 AU40
M_A_DQ11 AT38
M_A_DQ12 AN41
M_A_DQ13 AN39
M_A_DQ14 AU44
M_A_DQ15 AU42
M_A_DQ16 AV39
M_A_DQ17 AY44
M_A_DQ18 BA40
M_A_DQ19 BD43
M_A_DQ20 AV41
M_A_DQ21 AY43
M_A_DQ22 BB41
M_A_DQ23 BC40
M_A_DQ24 AY37
M_A_DQ25 BD38
M_A_DQ26 AV37
M_A_DQ27 AT36
M_A_DQ28 AY38
M_A_DQ29 BB38
M_A_DQ30 AV36
M_A_DQ31AW36
M_A_DQ32 BD13
M_A_DQ33 AU11
M_A_DQ34 BC11
M_A_DQ35 BA12
M_A_DQ36 AU13
M_A_DQ37 AV13
M_A_DQ38 BD12

M_A_DQ39 BC12
M_A_DQ40 BB9
M_A_DQ41 BA9
M_A_DQ42 AU10
M_A_DQ43 AV9
M_A_DQ44 BA11
M_A_DQ45 BD9
M_A_DQ46 AY8
M_A_DQ47 BA6
M_A_DQ48 AV5
M_A_DQ49 AV7
M_A_DQ50 AT9
M_A_DQ51 AN8
M_A_DQ52 AU5
M_A_DQ53 AU6
M_A_DQ54 AT5
M_A_DQ55 AN10
M_A_DQ56 AM11
M_A_DQ57 AM5
M_A_DQ58 AJ9
M_A_DQ59 AJ8
M_A_DQ60 AN12
M_A_DQ61 AM13
M_A_DQ62 AJ11
M_A_DQ63 AJ12

DDR

7 M_A_DQ[0:63]

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11

BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4

M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33

BB16
AW33
AY33
BH15
AU33

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_BS0 8,9
M_B_BS1 8,9
M_B_BS2 8,9
M_B_RAS# 8,9
M_B_CAS# 8,9
M_B_WE# 8,9

M_B_DM[0:7] 8

M_B_DQS[0:7] 8

C

M_B_DQS#[0:7] 8

M_B_A[0:14] 8,9

B

CANTIGA_CHIPSET

A

A

Title : Cantiga-DDR2 bus (3)
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Michael_Wang

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
5

4

3

2

Sheet
1

12

of

96


5

4

DDR2: 3000mA
DDR3: 4140mA

1
C1319

C1317
0.1UF/10V 0.1UF/10V

2

1

C1318
22UF/6.3V

2

1

/GM

2

1

1

2

2

2

2MM_OPEN_5MIL
1

2
JP1305 1 2 @

+1.8V

T1303

/GM
/GM
CE1303 /GM
C1320
C1315
C1316
1UF/6.3V 0.47UF/10V 10UF/10V

CE1304 220UF/4V
220UF/4V

2

1

+

/GM

1

+

/GM

2

1

1

PM: OPEN JP1301, JP1302
0 OHM FOR C1317, C1319

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

AE33
AC33
AA33
Y33
W33
V33

U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25

VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34

T32

D

C

VCC_35

+1.8V_GMCH

1

1
C1307
22UF/6.3V

C1308
0.1UF/10V

VCC NCTF

C1306
22UF/6.3V

2

2

CE1302
220UF/4V

2

+

1

1

2MM_OPEN_5MIL
1 1 2 2
JP1304@

+VCC_GMCH

POWER

C1305
0.1UF/10V

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

VCC CORE

1
2

1
C1304
0.22UF/6.3V

2

1
C1302
C1303
22UF/6.3V 0.22UF/6.3V

2

1
2

1
2

2MM_OPEN_5MIL
1
2
JP1302 1 2 @
2MM_OPEN_5MIL
1
2
JP1301 1 2 @

Max: 6327mA

AV44
BA37
AM40
AV21
AY5
AM10
BB13

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4

VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34

VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30

AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

1
C1314
1UF/6.3V

2

1
C1313
0.47UF/6.3V

2

C1312
0.22UF/6.3V

1

C1310
C1311
0.1UF/10V 0.22UF/6.3V

2

C1309
0.1UF/10V

C1301
1UF/6.3V

A

Route VCC_AGX_SENSE and
VSS_AGX_SENSE differentially.

Title : Cantiga-POWER (4)
ASUSTeK COMPUTER INC. NB4

CANTIGA_CHIPSET

Size
Custom

Engineer: Michael_Wang

Project Name

Rev

M50Vm

1.0

Date: Thursday, April 17, 2008
5

B

CANTIGA_CHIPSET

1

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3

VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

2

VCC_AXG_SENSE
VSS_AXG_SENSE

+

+VGFX_CORE

1

1 AJ14
1 AH14

+VCCP

2

T1301
T1302

@

CE1301
220UF/4V

1

A

JP1303

2

B

VCC GFX

6326mA

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15

VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

+VCC_GMCH

2MM_OPEN_5MIL
1 1 2 2

2

+VGFX_CORE

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20

AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

1

U1001F

Discrete VGA: 1210mA
UMA
: 1930mA

+VCCP

1

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20

VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50

VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20

U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16

AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

2

BA36
BB24
BD16
BB21
AW16
AW13
AT13

POWER

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6

VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

2

+VGFX_CORE

VCC SM LF

C

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29

BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

VCC GFX NCTF

D

U1001G

VCC SM

+1.8V_GMCH

3

4

3

2

Sheet
1

13

of

96


4

L1412 120Ohm/100Mhz
1
2
+VCCA_CRTDAC
0Ohm /GM +3VS_DAC_BG
C1462
0.01UF/16V

+VCCP_GMCH

C

+VCCA_PEG_GMCH

2

1

1

2
1

R1402
10Ohm
1%
R1401
0Ohm

K47

VCC_HV_1
VCC_HV_2
VCC_HV_3

C35
B35
A35

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

V48

U48
V47
U47
U46

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

AH48
AF48
AH47
AG47

1

VCC_TX_LVDS

1

+3VS
B

2

C1417
0.1UF/10V

119mA

+VCCP

+VCC_PEG

C1441
0.1UF/10V

1

R1419

2

VCCD_PEG_PLL

M38
L37

VCCD_LVDS_1
VCCD_LVDS_2

61mA
1

+1.8VS

VCCD_HPLL

2

/GM

C1420
1UF/6.3V

CANTIGA_CHIPSET

1

1

1

C1444
22UF/6.3V

VTTLF1
VTTLF2
VTTLF3

+

JP1401

R1405
0Ohm

456mA
+VCC_DMI

1

+VCC_PEG

2

A8
L1
AB2

C1433
0.47UF/6.3V

C1421
0.1UF/10V

Title : Cantiga-POWER(5)

C1435
ASUSTeK COMPUTER INC. NB6
Size
Custom

2

A

0.47UF/6.3V

C1434
0.47UF/6.3V

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
3

@

CE1406
220UF/4V

2

2

C1447
4.7UF/6.3V

1

VCCD_QDAC

1782mA

2

VCCD_TVDAC

L28

2MM_OPEN_5MIL
1 1 2 2

1

M25

AA47

0Ohm

4

D1401
BAT54C

C1451
22UF/6.3V
/GM

+3VS_HV

2

BF21
BH20
BG20
BF20

PM: 0 OHM FOR C1420
5

2

1
2

2

2
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

HV

VCC_HDA

AF1

C1440
0.1UF/10V

C1452
0.01UF/16V
+1.25VS_1.05VM_PEGPLL

50mA

C1455
1000PF/50V

106mA

1

1

change C1420 to 0 Ohm
10G213000003010

+1.8VS
L1410 80Ohm/100Mhz
1
2
/GM

PM: 0 OHM FOR C1455

2

158mA

2

C1443
0.1UF/10V

B22
B21
A21

1

2

A32

PM: 0 OHM FOR C1439

1
2

1

1
C1461
10UF/6.3V

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

2

2

C1449
0.01UF/16V

VCCA_TV_DAC_1
VCCA_TV_DAC_2

C1439
0.1UF/10V

+1.25VS_1.05VM

+VCCD_QDAC

2

A

C1442
0.1UF/10V

VCCA_SM_CK_1
VCCA_SM_CK_2

VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

B24
A24

49mA

2

change C1453 C1439 to
0 Ohm 10G212000004010

C1464
10UF/6.3V

2

+VCCD_TVDAC

2

120Ohm/100Mhz

1

1

1

2

VCC_HDA

59mA

1

L1408
+1.5VS

/GM

C1453
0.01UF/16V

1

/GM 0Ohm

C1432

0.1UF/10V

1

2

+VCCA_TV_DAC

2

1

PM: 0 OHM FOR C1453

2

+1.5VS

88mA

VCC_HDA

/GM

2

C1418
10UF/6.3V

2

R1420

1

1

+3VS_TV_CRT_BG

50mA

R1411
0Ohm

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

AXF

C1437
0.1UF/10V

C1426
0.1UF/10V

1

2

C1427
22UF/6.3V

+1.8VS_TXLVDS

SM CK

2

1
2

C1438
22UF/6.3V

1

1
2

C1448
4.7UF/6.3V

DDR2: 26mA
DDR3: 38mA

1

2

+VCCA_SM_CK

2

2

1

C1416
0.1UF/10V

+VCCP

R1410
0Ohm

+1.25VS_1.05VM

B

POWER

1

10G213000003010
C1446
4.7UF/6.3V

1

1
2

2

C1419
0.1UF/10V

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

2 3

1
2

1

1

1

2

C1415
1UF/6.3V

+1.25VS_1.05VM_HPLL

+1.25VS_1.05VM_MPLL

Delete 0 Ohm

C1445
4.7UF/6.3V

2

2

C1436
22UF/6.3V

1

L1405
120Ohm/100Mhz

CE1407
100UF/6.3V

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

DDR2: 124mA
DDR3: 150mA

Delete 0 Ohm

PEG

120Ohm/100Mhz
2

+

1

1

+1.25VS_1.05VM

+VCCASM_GMCH

2

VCCA_PEG_PLL

VTTLF

1
2

change C1407 C1408 C1454 to
0 Ohm 10G212000004010
L1404

50mA

AA48
+1.25VS_1.05VM_PEGPLL

1

C

L1409
+1.8V_GMCH
120Ohm/100Mhz
1
2

+VCC_SM_CK
C1411
0.1UF/10V

R1408
0Ohm

+1.25VS_1.05VM

DDR2: 720mA
DDR3: 748mA

VCCA_PEG_BG

2

C1412
0.1UF/10V

CE1404
10UF/6.3V

AD48

C1405
10UF/6.3V
@

2

0Ohm

2

2

1
R1406

+1.5VS

1

0.414mA

1

Delete 0 Ohm

C1406
1UF/6.3V

2

VSSA_LVDS

PM: 0 OHM FOR C1454

DMI

+1.25VS_1.05VM_PEGPLL

1

VCCA_LVDS

J47

2

1

J48

+1.25VS_1.05VM

1

2

VCC_TX_VCCA_LVDS

+VCCP

CE1401
220UF/4V

R1404
0Ohm

322mA

1

1
C1454
1000PF/50V

C1404
0.47UF/6.3V

+VCCAXF_GMCH

1

0Ohm /GM

2

C1463
4.7UF/6.3V

2

+

change C1457 C1462 to
0 Ohm 10G212000004010

2

VCCA_MPLL

VTT

AE1

PLL

+1.25VS_1.05VM_MPLL

C1450
4.7UF/6.3V

2

+1.8VS_TXLVDS
R1412

VCCA_HPLL

140mA

A CK

CE1403
100UF/4V
/GM

VCC_DPLLB

AD1

D TV/CRT

+

L48

+1.25VS_1.05VM_HPLL

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7

T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

A PEG

13.2mA

+1.25VS_1.05VM_DPLLB

24mA

A LVDS

VCC_DPLLA

TV

1
1
2

1

F47

2

L1403
120Ohm/100Mhz

+1.25VS_1.05VM_DPLLA

64.8mA

+1.25VS_1.05VM_DPLLB

C1408
0.1UF/10V

VCCA_DAC_BG
VSSA_DAC_BG

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

A SM

/GM

L1402
80Ohm/100Mhz
2
/GM

A25
B25

CE1402
100UF/4V

2

1

C1407
0.1UF/10V

+3VS_DAC_BG

2.68mA

+

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

HDA

1
2

1

/GM

2

JP1403
/Cantiga

+1.25VS_1.05VM_DPLLA

LVDS

L1401
2MM_OPEN_5MIL
80Ohm/100Mhz
+1.25VS_1.05VM 1
2
1 1 2 2

B27
A26

CRT

73mA
+VCCA_CRTDAC

PM: 0 OHM FOR C1407, 1408

D

1

1

U1001H

+1.05VM=>+VCCP NON IAMT
+VCCP

R1403
0Ohm

852mA

PM: 0 OHM FOR C1462

1

/GM

PM: 0 OHM FOR C1457

D

/GM

1

2
2

C1458
0.1UF/10V

C1457
0.01UF/16V

1

1

C1456
0.1UF/10V

1

2

2

100uF/6.3V

2

R1417

1

2

+
CE1408

C1459

10UF/6.3V

2

change C1457 C1462 to
0 Ohm 10G212000004010

/GM

1

1

1

+3VS_TV_CRT_BG

2

1
2

C1460
0.1UF/10V

3

2

5

120Ohm/100Mhz
+3VS
L1411
1
2

Sheet
1

14

of

96


1

2

1

2

1

1

2

1

2

R1510
2.21KOhm

5

@

11 MCH_CFG_7
R1507
2.21KOhm
@

11 MCH_CFG_9

R1508
2.21KOhm
@

11 MCH_CFG_16
R1503
2.21KOhm
@

4

1

2

CFG6 : Integrated TPM Host Interface
HIGH = iTPM disable (Default)
LOW = iTPM enable

CFG7 : Intel ME Crypto Strap Transport
Layer Security cipher suite
HIGH = With confidentiality (Default)
LOW = Without confidentiality
11 MCH_CFG_10
R1504
2.21KOhm
@

R1509
2.21KOhm
@

11 MCH_CFG_13
R1506
2.21KOhm
@

3

CFG [13:12] : XOR/ALL-Z
00 = Reserved

01= XOR Mode Enabled
10= All-Z Mode Enabled
11= Normal Operation (Default)

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

VSS_255
VSS_256
VSS_257

VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249

VSS_250
VSS_251
VSS_252

VSS_235

VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222

VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233

VSS

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41

NC_42

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS_SCB_6

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS_351
VSS_352
VSS_353
VSS_354

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_297
VSS_298
VSS_299
VSS_300

VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

E1
D2
C3
B4

A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

BH48
BH1
A48
C1
B2
A3

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23

AL20
V20
AC19
AL17
AJ17
AA17
U17

U24
U28
U25
U29

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2

Y2
M2
K2
AM1
AA1
P1
H1

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5

AD5
Y5
L5
J5
H5
F5
BE4

2

CFG10 : PCIe Loopback
HIGH = Disable (Default)
LOW = Enable
2

Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9

AD9
G9
B9
BH8
BB8
AV8
AT8

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11

AU16
AN16

N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

BA16

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21

BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

AU48
AR48
AL48
BB47
AW47
AN47
AJ47

AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43

AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40

AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36

AK15
AU36
R1511

2

11 MCH_CFG_6

CFG5 : DMI STRAP
HIGH = DMI X 4 (Default)
LOW = DMI X 2

2

1
R1505
2.21KOhm
@

1

1

2

11 MCH_CFG_5

2

1

C

VSS NCTF

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25

VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55

VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85

VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

VSS

D

VSS SCB

B

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106

VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136

VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166

VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196

VSS_197
VSS_198

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33

AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28

F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24

R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23

4

NC

5
3
2

CFG16 : FSB Dynamic ODT
HIGH = Ensable (Default)
LOW = Disable

2

1

U1001I

CANTIGA_CHIPSET

D

0Ohm 1

U1001J
CANTIGA_CHIPSET

C

+3VS

R1501
4.02KOHM
@

+3VS

R1502
4.02KOHM
@

CFG19 : DMI Lane Reversal
LOW = NORMAL (default)
HIGH = Reverse Lanes

11 MCH_CFG_12
11 MCH_CFG_19
B

CFG20 : SDVO/PCIE CONCURRENT MODE
LOW = ONLY SDVO or PCIE is
Operational (Default)
HIGH = SDVO and PCIE are operating
simultaneously via the PEG port

11 MCH_CFG_20

CFG9 : PCIE GRAPHIC LANE
HIGH = Normal Operation (Default)
LOW = Reverse Lanes

A
A

ASUSTeK COMPUTER INC. NB4
Custom

Size

Engineer: Michael_Wang

Title : Cantiga-GND

Date: Tuesday, March 04, 2008

Project Name

M50Vm

Sheet

1

15
of
96

1.0

Rev


5

4

3

2

1

D

D

C

C

B

B

A

A

Title :
Engineer:
Size

Project Name

Rev

A

1.0

Date: Wednesday, February 13, 2008
5

4

3

2

Sheet

16
1

of

96


5

4

3

2

1

D

D

C

C

B

B

A

A

Title :
Engineer:
Size

Project Name

Rev

A

1.0

Date: Wednesday, February 13, 2008
5

4

3

2

Sheet

17

1

of

96


5

4

3

2

1

D

D

C

C

B

B

A

A

Title :
Engineer:
Size

Project Name

Rev

A

1.0

Date: Wednesday, February 13, 2008
5

4

3

2

Sheet

18
1

of

96


5

4

3

2

1

D

D

C

C

B

B

A

A

Title :
Engineer:
Size

Project Name

Rev

A

1.0

Date: Wednesday, February 13, 2008
5

4

3

2

Sheet

19
1

of

96

5

4

R2023

2 51KOhm

1

2

1

RTCRST#

JRST1
1MM_OPEN_5MIL
@

2
1

ICH_INTVRMEN
LAN_SLP

2

C2005

1UF/10V

U2002E
VCC

LCI/GLCI disable guidelines
Design guide 4.11.19

10

SN74LVC07APWR

12

C

SN74LVC07APWR

1

+1.5VS

14

+3VS

R2018
4.7KOhm
/GM

U2002A

2

VCC

ACZ_BCLK_HDMI_LS 1

ACZ_SDOUT_HDMI_LS

RX2015 2
RX2016 2
RX2025 2

1 33Ohm
1 33Ohm
1 33Ohm

RX2020 2

1 33Ohm
56

11

51
51
51

GND

7

SN74LVC07APWR
+1.5VS

14

R2019
4.7KOhm
/GM

U2002B

2

VCC

ACZ_SYNC_HDMI_LS 3

NMI
SMI#

AF23
AF24

STPCLK#

AH27

THRMTRIP#
check MDC series 33 Ohm close
to MDC connector
AF4

AG26

11

7

SN74LVC07APWR

output 24MHz AF6

ACZ_SYNC
ACZ_RST#
36 ACZ_SDIN0_AUD
35 ACZ_SDIN1_MDC

C2002
ACZ_SDOUT_HDMI

6

HDA_RST#

AG5

HDA_SDOUT

AG7
AE8

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

AG8

SATALED#

1 0.01UF/16V
1 0.01UF/16V

AJ16
AH16
SATA_TXN0_ICHAF17
SATA_TXP0_ICHAG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

1 0.01UF/16V
1 0.01UF/16V

AH13
AJ13
SATA_TXN1_ICHAG14

SATA_TXP1_ICHAF14

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

T2013
T2014

1

1 GPIO33
1 GPIO34
2 10KOhm

SATA_LED#

Delete

2

1

2

VccLAN1_05 & VccCL1_05
Internal VR

11

2

X2001

3

32.768Khz

1

C2003

2

+3VA

+VCC_RTC

+RTCBAT

D2001

1

SN74LVC07APWR

3
1

1

1

2

2

R2001
1KOhm
BAT2001
BATT_HOLDER

6
5
4

RX2005

1
1

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

AH9
AJ9
AE10 ESATA_TXN_ICH
AF10 ESATA_TXP_ICH

AJ7
AH7

R2012
56Ohm

H_STPCLK# 3

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATARBIAS#
SATARBIAS

3
3

PM_THRMTRIP#

AG27

AH18
AJ18

H_NMI
H_SMI#

+VCCP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

1
1
1
1

T2003

@

2

/GM
ACZ_SDIN2_HDMI_LS_R
2

C

100PF/50V

T2011
T2010
T2015
T2016

CX2001 2
CX2002 2

ESATA_RXN
ESATA_RXP
ESATA_TXN
ESATA_TXP

1 0.01UF/16V
1 0.01UF/16V

66
66
66
66

CLK_PCIE_SATA# 29
CLK_PCIE_SATA 29
SATARBIAS#

R2015
1

2

VccSus1_05, VccSus1_5, &
VccCL1_5 Internal VR
R2005
330KOhm
1%

B

High = Enable ( Default )
Low = Disable

ICH_INTVRMEN

R2006
0Ohm
@

11

T2002

1UF/10V

A

+VCCHDA_ICH

ACZ_SDOUT

33Ohm

2
ACZ_SDIN2_HDMI

1

C2001

Change Battery Holder to N1S

1ACZ_SDIN2_HDMI_LS
RX2022 33Ohm

TXB0101DCKR
/GM

R2016

1

2 1KOhm

Title : SB-ICH9M(1)

@
ASUSTeK COMPUTER INC. NB4

1

ACZ_SDIN2_VGA

70

Size

RX2026 /PM

Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Thursday, April 17, 2008
5

H_THRMTRIP# 3,5,11,32

1%

1 54.9OHM
C2007

2

[ICH_TP3, ACZ_SDOUT] : XOR Chain Entrance Strap
00 = Reserved
01= Enter XOR Chain
10= Normal Operation (Default)
11= Set PCIe Port Config Bit 1

2

VCCB
OE
B

BAT54C

1

T2001

U2003

VCCA
GND
A

T2009

R2011
0Ohm

@

2

2

ACZ_RST#_HDMI 11

+3VS

1
2
3

1

3
3
30

RTC_X2

1
12PF/50V

GND

+1.5VS

T2008

LAN_SLP

2
14

U2002D

7
A

1

H_INIT#
H_INTR
RCIN#

R2021
4.7KOhm
/GM

8

/GM

T2007

R2010
330KOhm
1%

R2002
10MOhm

4

+1.5VS

VCC

H_IGNNE# 3

1

SATA_CLKN
SATA_CLKP

H_FERR# 3
H_PWRGD 3

+VCC_RTC

RTC_X1

1
12PF/50V

SN74LVC07APWR

ACZ_RST#_HDMI_LS 9

1

R2007
56Ohm

H_DPRSTP# 3,11,80
H_DPSLP# 3

24.9Ohm 1%

High = Enable ( Default )

GND

+3VS

A20GATE 30
H_A20M# 3

PECI

+VCC_RTC

GPIO33

1

1
2

VCC

ACZ_SDOUT_HDMI_LS 5

AE7

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

R2013

CX2005 2
CX2006 2

AH4

HDA_BIT_CLK
HDA_SYNC

AG4
AH3
AE5

ACZ_SDOUT

CX2003 2
CX2004 2

GLAN_COMPI
GLAN_COMPO

Low = Disable

R2020
4.7KOhm
/GM

U2002C

ICH_GLAN_COMPB28
B27

1

14

+3VS

7

2
24.9Ohm 1%

1MM_OPEN_5MIL
@

+1.5VS

/GM

ACZ_BCLK

JP2001

2

GND

B

1
R2009

10KOhm
GPIO56
2

+VCCP

ICH9M
ACZ_SYNC_HDMI

4

/GM

GLAN_DOCK#/GPIO56

2 56Ohm

AE22
AG25
L3

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

51
51

1

+3VS

B10

AJ26 R2014

FERR#

AF25

SATA_RXN0
SATA_RXP0
SATA_TXN0

SATA_TXP0

SATA AC coupling Capacitors51
should be placed at connector
51
side. Design Guide 4.1.5
51

LAN_TXD0
LAN_TXD1
LAN_TXD2

2 0Ohm

INIT#
INTR
RCIN#

1

+3VSUS

+3VS
ACZ_BCLK_HDMI

2

/GM

36 ACZ_SDOUT_AUD

35 ACZ_SDOUT_MDC
70 ACZ_SDOUT#_VGA

D13
D12
E13

DPRSTP#
DPSLP#

AJ25 RX2008 1
AE23

1

7

GND

LAN_RXD0
LAN_RXD1
LAN_RXD2

T2005
T2006

1
1

A20GATE

A20M#

D

LPC_FRAME# 30,44,62

ICH_LDRQ0#
ICH_LDRQ1#

N7
AJ27

2

13

F14
G13
D14

INT PU
INT PU

1

U2002F
VCC

LAN_RSTSYNC

J3
J1

2 0Ohm

1

14

+3VS

1
1
1
1
1
1
1
1
1
1
1
1

GLAN_CLK

C13

LDRQ0#
LDRQ1#/GPIO23

IGNNE#

R2017

2
2
2
2
2
2
2
2
2
2
2
2

E25

RX2007 1

AD22

check memory ID 0

33Ohm
33Ohm
33Ohm
33Ohm

33Ohm
33Ohm
33Ohm
33Ohm
33Ohm
33Ohm
33Ohm
33Ohm

INTVRMEN
LAN100_SLP

K3

CPUPWRGD

+1.5VS_PCIE_ICH
RX2017
70 ACZ_BCLK_VGA
RX2009
35 ACZ_BCLK_MDC
RX2010
36 ACZ_BCLK_AUD
ACZ_BCLK_HDMI_LS
RX2021
RX2023
70 ACZ_SYNC_VGA
RX2011
36 ACZ_SYNC_AUD
RX2012

35 ACZ_SYNC_MDC
ACZ_SYNC_HDMI_LS
RX2018
RX2013
36,37 ACZ_RST#_AUD
RX2014
35 ACZ_RST#_MDC
RX2024
70 ACZ_RST#_VGA
ACZ_RST#_HDMI_LS
RX2019
ACZ_SDIN2_HDMI_LS

B22
A22

FWH4/LFRAME#

2

7

GND

RTCRST#
SRTCRST#
INTRUDER#

30,44,62
30,44,62

30,44,62
30,44,62

1

11
/GM

A25
F20
C22

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

2

14

+3VS

2 1MOhm

1

0Ohm
0Ohm
0Ohm

0Ohm

2
2
2
2

1

R2004

+VCC_RTC

1
1
1
1

2

1

SRTCRST#

RX2001
RX2002
RX2003
RX2004

1

2 30KOhm

1

K5
K4
L6
K2

1

R2008

+VCC_RTC

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

2

D

RTCX1
RTCX2

2

T2004

C23
C24

LAN / GLAN
CPU

RTC_X1
RTC_X2

RTC
LPC

U2001A

Place Near the Open Door

IHDA

2

Time delay 18~25 ms

SATA

1

C2004
1UF/10V

2

1

1

+VCC_RTC

3

4

3

2

Sheet
1

20

of

96


5

3

2

C

J5
E1
J6
C4

PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14

AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

U2001D

PCI

F1
G4
B6 PU
A7
F13 PU
F12
E6 PU
F6

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

T2102

T2103

D8
B4
D6
A5

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#

SERR#
STOP#
TRDY#
FRAME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

PCI_IRDY# 22,40
PCI_PAR 40
PCI_RST#_ICH

PLTRST#
PCICLK
PME#

C14
D4
R2

40
40

40
40

PCI_DEVSEL# 22,40
PCI_PERR# 22,40
PCI_LOCK# 22
PCI_SERR# 22,40
PCI_STOP# 22,40
PCI_TRDY# 22,40
PCI_FRAME# 22,40
PLT_RST#
CLK_ICHPCI

53 PCIE_RXN1_ROBSON
53 PCIE_RXP1_ROBSON
53 PCIE_TXN1_C
53 PCIE_TXP1_C

T2101

C/BE0#
C/BE1#
C/BE2#
C/BE3#

CX2101 1
CX2102 1

H4
K6

F2
G2

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

PU
PU
PU
PU

PCI_INTE#
PCI_INTF#
PCI_INTG#
PCI_INTH#

2 0.1UF/10V
2 0.1UF/10V

L29
L28
PCIE_TXN2_MIMICARD M27
PCIE_TXP2_MINICARD M26

PERn2
PERp2
PETn2
PETp2

43 PCIE_RXN3_NEWCARD
43 PCIE_RXP3_NEWCARD
43 PCIE_TXN3_C
43 PCIE_TXP3_C

CX2105 1
CX2106 1

2 0.1UF/10V
2 0.1UF/10V

J29
J28
PCIE_TXN3_NEWCARD K27
PCIE_TXP3_NEWCARD K26

PERn3
PERp3
PETn3
PETp3

CX2110 1
CX2109 1

2 0.1UF/10V
2 0.1UF/10V

PCIE_TXN4_TUN
PCIE_TXP4_TUN

G29
G28
H27
H26

PERn4
PERp4
PETn4
PETp4

E29
E28
F27
F26

PERn5
PERp5
PETn5
PETp5

64 PCIE_RXN4_TUN
64 PCIE_RXP4_TUN
64 PCIE_TXN4_C
64 PCIE_TXP4_C

R1.1

33 PCIE_RXN6_LAN
33 PCIE_RXP6_LAN

33 PCIE_TXN6_LAN
33 PCIE_TXP6_LAN
25
25

SPI_CLK
SPI_CS#0

25

SPI_SI

CX2111 1
CX2112 1

R2112
R2113

2
2

R2115

2
25

@
+3VS

R2106

PERn1
PERp1
PETn1
PETp1

CX2103 1
CX2104 1

29

22
22
22
22

2 0.1UF/10V PCIE_TXN1_ROBSON
2 0.1UF/10V PCIE_TXP1_RONSON

N29
N28
P27
P26

53 PCIE_RXN2_MINICARD
53 PCIE_RXP2_MINICARD
53 PCIE_TXN2_C
53 PCIE_TXP2_C

2 1KOhm

1

ICH9M

SPI_MOSI
iTPM Enable

1%

C29
C28
PCIE_TXN6_GLAN D27
PCIE_TXP6_GLAN D26

2 0.1UF/10V
2 0.1UF/10V

1 15Ohm
1 15Ohm
1

1%
1%

SB_SPICLK
SB_SPICS0#
SB_SPICS1#

D23

D24
F23

1 15Ohm
SPI_SO

1%

SB_SPISI

D25
E23

T2107

Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#

PCI_REQ#0 22,40
PCI_GNT#0 40
PCI_REQ#1 22
1
PCI_REQ#2 22
1
PCI_REQ#3 22
1

65 USB_CON01_OC#

USB_OC0&1#

46 USB_CON24_OC#
52 USB_CON3_OC#

USB_OC2&4#
USB_OC3#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC8#
USB_OC9#
WLAN_ON
USB_OC11#

High = Enable
Low = Disable(Default)
53

WLAN_ON
R2105

2

1

USBRBIAS_PN

PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3
AG2
AG1

Place within 500 mils of ICH

5

WLAN_ON

2 B

PLT_RST#

3 GND

4
Y
NC7SZ08P5X_NL

BUF_PLT_RST# 5,11,30,33,38,43,50,53,58,62,64,70
22

R2110

1

10KOhm

3

10KOhm 4 RN2101B

5

10KOhm 6 RN2101C

7

10KOhm 8 RN2101D

USB_OC7#

1

RN2102A
10KOhm 2

USB_OC8#

3

USB_OC0&1#

5

USB_OC6#

7

RN2102D
10KOhm 8

USB_OC9#

1

10KOhm 2 RN2103A

USB_OC5#

3

10KOhm 4 RN2103B

USB_OC11#

5

10KOhm 6 RN2103C

7

10KOhm 8 RN2103D

USB_OC3#

@

PM_RI#

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

11
11
11
11

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB27
AB26
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

11
11
11
11

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

11
11
11
11

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P

OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

USB

T26
T25

U2102
1 A
VCC

CLK_PCIE_ICH# 29
CLK_PCIE_ICH 29

AF29 DMI_COMP
AF28
AC5
AC4

AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

R2103

2 24.9Ohm 1%

1

+1.5VS_PCIE_ICH

L<500mils

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4

65
65
65
65
46
46
52
52
46
46

Place within 500 mils of ICH
C

USB_PN6 58
USB_PP6 58

USB_PN7 53
USB_PP7 53
USB_PN8 43
USB_PP8 43
USB_PN9 64
USB_PP9 64
USB_PN10 61
USB_PP10 61
USB_PN11 63
USB_PP11 63

USB 0

USB Conn.

USB 1

USB Conn.

USB 2

USB Conn.

USB 3

USB Conn.

USB 4

Camera

USB 5
USB 6

UWB

USB 7

WiMAX

USB 8

NewCard

USB 9

TV Tuner

USB 10 Bluetooth
+3VSUS

ICH9 Boot BIOS select
GNT#0

USB 11 Fingerprint

B

CS#1

LPC

11

1

1

PCI

10

1

0

SPI

01

0

1

(default)

5

10KOhm 4 RN2102B
10KOhm

PCI_GNT#0

R2101

1

2 1KOhm

@

SB_SPICS1#

R2102

1

2 1KOhm

@

6 RN2102C

2 B

PCI_RST#_ICH

3 GND
@
R2111

4
Y
NC7SZ08P5X_NL

1

PCI_RST# 33,40
A

2 0Ohm

Title : SB-ICH9M(2)
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
5

D

2 0Ohm

+3V

A

11
11
11
11

2 RN2101A

1

USB_OC2&4#

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

PERn6/GLAN_RXN
PERp6/GLAN_RXP
PETn6/GLAN_TXN
PETp6/GLAN_TXP

B

U2101
1 A
VCC

V27
V26
U29
U28

ICH9M

22.6Ohm
1%

+3V

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

Direct Media Interface

D11
C8
D9
E12
E9
C9

E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

SPI

PCI_AD0

PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30

PCI_AD31

1

PCI-Express

U2001B

40 PCI_AD[31:0]
D

22,40
22,40
22
22

4

4

3

2

Sheet
1

21

of

96


5

4

3

2

1

2

+3VSUS

+3VS
R2205
10KOhm

F19

PM_RI#

RI#

1

21
@

62 PM_SUS_STAT#

2
0Ohm

11

+3VS

STP_PCI#
STP_CPU#

PM_SYNC#

30

@

1 10KOHM 2 RN2203A
3 10KOHM 4 RN2203B

EXT_SCI#

EXT_SCI#

PU

A17

STP_PCI#
STP_CPU#

A14
E19

30,40,62 PM_CLKRUN#

L4

29
29

@

M6

E20
M5
AJ23

33,43,53 PCIE_WAKE#
30,40,62 INT_SERIRQ
50

PM_THERM#

PM_THERM#

30

+3VS
R2249
C

1

EXT_SMI#

40
CB_SD#
2 10KOhm 56 WLAN_LED_ON

R1.1

BT_DET#
+3VSUS

61
56

PM_THERM#_SB
VR_PWRGD_CLKEN

2
0Ohm

56,58

T2201

1

T2202
T2206
T2213

1
1
1

T2217

1

T2204

1

R2252
10KOhm

GPIO35
PCB_ID1
PCB_ID2
EMAIL_LED
GPU_RST#

56 EMAIL_LED
70 GPU_RST#

R2209
100KOhm

PU
PU

PD
PD
PD

PU

21

@

DOCKING_DET# PU
UNDOCKING_BTN#PU
PU
IDE_BAY_IN#
PU
EXT_SMI#
HDTV_DET# PU
INT PU
CB_SD#
WLAN_LED PD
PU

BT_ON
BT_LED_ON

D21
A20

UWB_ON

2

61

1
RX2234

1

For UMA Design

T2207
T2209
T2210
T2211

CLKRUN#
WAKE#
SERIRQ
THRM#
VRMPWRGD

SST

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

M7
AJ24
B21
AH20
AJ20
AJ21

SPKR
MCH_SYNC#

TP3
PWM0
PWM1
PWM2

1
1
1
1

check memory ID1

PU
PU
PU
PU

T2214
T2215
T2216

1
1
1

21

PD

SUSCLK

SUS_CLK 62

SLP_S3#
SLP_S4#
SLP_S5#

C16
E16
G17

PM_SUSB# 30,36
PM_SUSC# 5,30

S4_STATE#/GPIO26

C10

PWROK

G20

DPRSLPVR/GPIO16
BATLOW#

B13

PWRBTN#

R3

LAN_RST#

D20

RSMRST#

D22

CK_PWRGD

R5

CLPWROK

R6

SLP_M#
CL_CLK0
CL_CLK1

GPO

1

T2208

1

T2212

21,40 PCI_SERR#
21,40 PCI_TRDY#
21,40 PCI_FRAME#
21

BAT_LL#
RX2225 1

PM_DPRSLPVR 11,80
T2223

1
2 0Ohm
R2262

+3VSUS

1

2 0Ohm

1

RX2223 1

21,40 PCI_REQ#0

B16
F24

B19 1

CL_CLK0

T2219

11

F22
C19 1

T2220

CL_VREF0
CL_VREF1

C25
A19 1

T2221

CL_DATA0 11
CL_VREF0

T2222

GPIO24/MEM_LED
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
GPIO9/WOL_EN

A16 1
C18
C11
C20

T2224
RTLAN_DSM#
GPIO14
GPIO9

PU
PD
PD

PCI_LOCK#

21

PCI_INTD#

21
RTLAN_DSM# 33
R2263 1
2 10KOhm
R2208 1
2 100KOhm

PCI_REQ#3

21,40 PCI_IRDY#

PM_PWROK 11,30

1
R2231
10KOhm

R2232
10KOhm

@

1
+3VS

C

10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10

10KOhm5
10
10KOhm5
10

R2256

1

2 10KOhm

INT_SERIRQ

R2255

1

2 10KOhm

GPIO21

R2257

1

2 10KOhm

GPIO19

R2258

1

2 10KOhm

GPIO35

R2261

1

2 10KOhm

PM_THERM#_SB

R2250

1

2 10KOhm

UNDOCKING_BTN#

R2253

1

2 10KOhm

DOCKING_DET#

R2254

1

2 10KOhm

EMAIL_LED

R2260

1

2 10KOhm

B

3

S 2

2 0Ohm

Q2201
2N7002
@
11

CLK_EN# 80

G

EC_CLK_EN 30

2

check

2

R2210
3.24KOhm

1

+3VS
+3VS

CL_VREF0

@

CL_VREF0/1 ~= 0.405 V

3

Q2203
2N7002
@
11

G

D

3

SB_SPKR

R2211

2 1KOhm

1

D
A

G

2 S

Title : SB-ICH9M(3)

2 S

2

30 PM_THERM#_EC

3

1

2

R2226
453Ohm

@
R2233
10KOhm Q2204
2N7002
@
11

3

C2202
0.1UF/10V

2

2

1

PM_THERM#

1
2

2
R2218
10KOhm

1

10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10

2

100KOhm

CL_VREF [0:1] routing rules
Width = 12 mils min

Spacing = 12 mils min
Break-out: 5 mils on 5 mils for 300 mils max

ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Thursday, April 17, 2008
5

D

2
3

RX2233 1
D
R2224

CB_SD# (GPIO13) 10K

pull-up check CRB P.23

R2217
10KOhm
@

R2216
10KOhm

10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10

IDE_BAY_IN#

+3VSUS

2
1

2 10KOhm

PCI_REQ#1

21

21,40 PCI_DEVSEL#

check

2 0Ohm

21

CL_RST#0 11

VR_PWRGD_CLKEN

1

1
R2215
10KOhm

1

/PM

1

A

2

2

PCB_ID0
PCB_ID1
PCB_ID2

R2259

RP2204A
1
RP2204B
2
RP2204C
3
RP2204D
4
RP2204E
6
RP2204F
7
RP2204G
8
RP2204H

9

21,40 PCI_INTB#
21,40 PCI_STOP#

F21
D18 1

+3VS

R2214
10KOhm
@

R2213
10KOhm

1

/GM

2

+3VS

2

+3VS

2

4
6
8
2
2
2
1
1
1
1
1

WLAN_LED

PCI_INTG#

CLK_PWRGD 29

2

1 10KOhm
3 10KOhm
5 10KOhm
7 10KOhm
SCL_3A
R2220 1
SDA_3A
R2221 1
BAT_LL#
R2204 1

PCIE_WAKE# R2247 2
HDTV_DET# R2248 2
RTLAN_DSM#
R2251 2
SMB_LINK0
R2265 2
SMB_LINK1
R2264 2

RN2201A
RN2201B
RN2201C
RN2201D
2.2KOhm
2.2KOhm
8.2KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm

PCI_INTE#

21

2 0Ohm
PM_PWROK

1

EXT_SMI#
EXT_SCI#

PCI_INTH#

21,40 PCI_PERR#

CL_RST0#
CL_RST1#

SR1.0-S06
B

21
21

PM_PWRBTN# 30

PM_RSMRST# 30

CL_DATA0
CL_DATA1

PM_PWROK_R RX2230 1

RP2203A
1
RP2203B
2

RP2203C
3
RP2203D
4
RP2203E
6
RP2203F
7
RP2203G
8
RP2203H
9

GPIO36

2 0Ohm

Mount/unmount as same R2236
2 10KOhm

PCI_REQ#2

PM_PWROK_R
RX2235 1

ICH9M

PM_RSMRST# R2219

PCI_INTC#

21,40 PCI_INTA#
CLK_ICH14 29
CLK_USB48 29

M2

PCI_INTF#
PM_CLKRUN#

H1
AF3

SMBALERT#/GPIO11
STP_PCI#
STP_CPU#

GPIO21
GPIO19
GPIO36
PCB_ID0

AH23
AF19
AE21
AD20

P1

CLK14

CLK48

PMSYNC#/GPIO0

AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8

SB_SPKR

36
SB_SPKR
11 MCH_ICH_SYNC#

SUS_STAT#/LPCPD

SYS_RESET#

SYS GPIO
Power MGT

1
R2236

MISC
GPIO
Controller Link

PM_RSMRST#

R4
G19

SATA
GPIO

SMB

SMB_LINK0
SMB_LINK1

21

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36

SATA5GP/GPIO37

Clocks

2

24
SCL_3A
24
SDA_3A
33 RTLAN_DSM_EN

R2201
10KOhm

D

U2001C
G16 SMBCLK
A13 SMBDATA
E17 LINKALERT#/GPIO60/CLGPIO4
C17 SMLINK0
B18 SMLINK1

1

+3VSUS

RP2202A
1

RP2202B
2
RP2202C
3
RP2202D
4
RP2202E
6
RP2202F
7
RP2202G
8
RP2202H
9

4

3

2

Sheet
1

22

of

96

4

3

1UF/6.3V

+VCC1_5_ICH
C2324
1UF/6.3V

+1.5VS

1
R2311

2
0Ohm

+VCCUSBPLL_ICH

1
R2312

2
0Ohm

2

1UF/6.3V

C2333
0.1UF/10V

C2309
0.1UF/10V
T2301
T2302

C2335
0.1UF/16V

80mA

2+VCCGLAN1_5_ICH
0Ohm +
CE2303
@
C2338
220UF/4V
4.7UF/10V
1

1
R2301

AC9

Vcc1_5_A_17

AC18
AC19

Vcc1_5_A_18
Vcc1_5_A_19

AC21

Vcc1_5_A_20

G10
G9

Vcc1_5_A_21
Vcc1_5_A_22

AC12
AC13
AC14

Vcc1_5_A_23
Vcc1_5_A_24
Vcc1_5_A_25

AJ5

VccUSBPLL

AA7
AB6

AB7
AC6
AC7

Vcc1_5_A_26
Vcc1_5_A_27
Vcc1_5_A_28
Vcc1_5_A_29
Vcc1_5_A_30

1 A10
1 A11
A12
B12

VccLAN3_3_1
VccLAN3_3_2

A27

VccGLANPLL

D28
D29
E26
E27

VccGLAN1_5_1
VccGLAN1_5_2
VccGLAN1_5_3

VccGLAN1_5_4

A26
+3VS

1
R2304

2
0Ohm

VccLAN1_05_1
VccLAN1_05_2

2

+1.5VS

2.2UF/6.3V

1

C2337

2

10UF/6.3V

2

C2336

1

+VCCGLANPLL_ICH

+VCCGLAN3_3_ICH

1
1

2

2

1
2

1
2

1
2

1
2
0.1UF/16V

1
2

1
R2316
C2318
0.1UF/16V

4.7UF/10V

1
R2318
C2315
4.7UF/10V

2
0Ohm

1

1
R2306
C2320
0.1UF/16V

0.1UF/16V

C2325
0.1UF/16V
@

2

+VCC3_3_PCI
C2323

C2326
0.1UF/16V
@

2
0Ohm

2mA

2 0Ohm

AJ4

+VCCHDA_ICH

AJ3

+VCCSUSHDA_ICH

VccSus1_05_1
VccSus1_05_2

AC8
F17

1

1

T2304
T2306

VccSus1_5_1

AD8

1

T2305

VccSus1_5_2

F18

VccSus3_3_1
VccSus3_3_2
VccSus3_3_3
VccSus3_3_4

A18
D16
D17
E22

VccSus3_3_5

AF1

VccSus3_3_6
VccSus3_3_7
VccSus3_3_8
VccSus3_3_9
VccSus3_3_10
VccSus3_3_11
VccSus3_3_12
VccSus3_3_13
VccSus3_3_14
VccSus3_3_15
VccSus3_3_16
VccSus3_3_17
VccSus3_3_18
VccSus3_3_19
VccSus3_3_20

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6

Y7
T7

R2309 1

2 0Ohm +3VSUS

C2330

1

VccHDA
VccSusHDA

+3VS

0Ohm R2308
1
2

+3VS

11mA

C2329

11mA

0.1UF/16V

+3VS

308mA

R2314 1

+VCCHDA_ICH

C2340 1

+VCCP_ICH

2
0Ohm

+VCC3_3_ICH

B9
F9
G3
G6
J2
J7
K7

48mA

C2322

1

1
2

1
2

Vcc1_5_A_9
Vcc1_5_A_10
Vcc1_5_A_11
Vcc1_5_A_12
Vcc1_5_A_13
Vcc1_5_A_14
Vcc1_5_A_15
Vcc1_5_A_16

Vcc3_3_8
Vcc3_3_9
Vcc3_3_10
Vcc3_3_11
Vcc3_3_12
Vcc3_3_13
Vcc3_3_14

L2305
80Ohm/100Mhz
1
2
+VCCP_ICH

0.1UF/16V

2 0.1UF/10V

+3VSUS_ICH_1

R2317

1

2 0Ohm

Check

VccCL1_05

G22

VccCL1_5

G23

VccCL3_3_1
VccCL3_3_2

A24
B24

+3VSUS_ICH

C2343 1

C2332
0.01UF/16V

R2310
C2334
0.01UF/16V

2 0.1UF/10V

1

2 0Ohm

+3VSUS

212mA

C2331
0.1UF/16V

C2308

1

@
2 1UF/6.3V

C2339

1

2 0.1UF/16V

R2313
+3VM_ICH_CL 1

2 0Ohm

73mA
+3VS

refer to page 403.

GLAN POWER

23mA

1

+1.5VS

L2302
120Ohm/100Mhz
1
2

2

A

2

78mA

+3VM_VCCPAUX
1

+3VS

C2328

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

USB CORE

1

2

1.342A*1/6+0.011=0.24A

1

2

1

B

Vcc1_5_A_1
Vcc1_5_A_2
Vcc1_5_A_3
Vcc1_5_A_4
Vcc1_5_A_5
Vcc1_5_A_6
Vcc1_5_A_7
Vcc1_5_A_8

ATX

2

1.342*5/6=1.12A

AC16
AD15
AD16
AE15
AF15
AG15
AH15

AJ15

AD19
AF20
AG24
AC20

0.01UF/16V

2

1

C2327

VccSATAPLL

Vcc3_3_4
Vcc3_3_5
Vcc3_3_6
Vcc3_3_7

C2316

23mA

C2319
0.1UF/16V

1

2
0Ohm

10UF/6.3V

1

1
R2307

+1.5VS

C2321

AJ19

ARX

2

1

+VCCSATAPLL_ICH

Vcc3_3_3

AC10

10UF/6.3V

+1.5VS

C2313

2
0Ohm

2

L2301
80Ohm/100Mhz
1
2

+1.5VS

2.2UF/6.3V

AJ6

1
R2315

1

22UF/6.3V

2

2

22UF/6.3V

2

47mA

220UF/4V

2

2

ESR=40mOhm/Ir=1.9A

Vcc3_3_2

0.1UF/16V

2

C2307

AG29

C2317

1

C2306

Vcc3_3_1

C2312

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29

AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18

AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11

E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

JP2301
2MM_OPEN_5MIL
@
1 1 2 2
+VCCP_ICH

CE2302

100UF/6.3V
+VCCP

L2303
80Ohm/100Mhz
1
2

2

C2305

1

CE2301

1

1

+1.5VS_PCIE_ICH
+

1

+1.5VS

C

AB23

AC23

1

L2304
80Ohm/100Mhz
1
2

646mA

VCCA3GP

+1.5VS_PCIE_ICH

VccDMI_1
VccDMI_2
V_CPU_IO_1
V_CPU_IO_2

2

0.1UF/16V

R29
W23
Y23

1

C2302

VccDMIPLL

2

2

1

+5VSUS

R2320 10Ohm
1
2 +5VREFSUS

1

2mA

2

3

D2302
BAT54A

0.1UF/16V

+VCCP_ICH

+

C2304

+VCCDMI_ICH

1

+3VSUS

0.1UF/16V

2

1

1

0.1UF/16V

1

U2001E

+VCCDMIPLL_ICH

2

C2301

Vcc1_5_B_1
Vcc1_5_B_2
Vcc1_5_B_3
Vcc1_5_B_4
Vcc1_5_B_5
Vcc1_5_B_6
Vcc1_5_B_7
Vcc1_5_B_8
Vcc1_5_B_9
Vcc1_5_B_10
Vcc1_5_B_11
Vcc1_5_B_12
Vcc1_5_B_13
Vcc1_5_B_14
Vcc1_5_B_15
Vcc1_5_B_16
Vcc1_5_B_17
Vcc1_5_B_18
Vcc1_5_B_19
Vcc1_5_B_20
Vcc1_5_B_21
Vcc1_5_B_22
Vcc1_5_B_23
Vcc1_5_B_24
Vcc1_5_B_25
Vcc1_5_B_26
Vcc1_5_B_27
Vcc1_5_B_28
Vcc1_5_B_29

Vcc1_5_B_30
Vcc1_5_B_31
Vcc1_5_B_32
Vcc1_5_B_33
Vcc1_5_B_34
Vcc1_5_B_35
Vcc1_5_B_36
Vcc1_5_B_37
Vcc1_5_B_38
Vcc1_5_B_39
Vcc1_5_B_40
Vcc1_5_B_41
Vcc1_5_B_42
Vcc1_5_B_43
Vcc1_5_B_44
Vcc1_5_B_45
Vcc1_5_B_46
Vcc1_5_B_47
Vcc1_5_B_48
Vcc1_5_B_49

C2303

1

3

+3VS

2

2
D2301
BAT54A

D

V5REF_Sus

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25

L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

A15

B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

2

1

+V5REF_ICH

AE1

Vcc1_05_1
Vcc1_05_2
Vcc1_05_3
Vcc1_05_4
Vcc1_05_5
Vcc1_05_6
Vcc1_05_7
Vcc1_05_8
Vcc1_05_9
Vcc1_05_10
Vcc1_05_11
Vcc1_05_12
Vcc1_05_13
Vcc1_05_14
Vcc1_05_15
Vcc1_05_16
Vcc1_05_17
Vcc1_05_18
Vcc1_05_19
Vcc1_05_20
Vcc1_05_21
Vcc1_05_22
Vcc1_05_23
Vcc1_05_24
Vcc1_05_25
Vcc1_05_26

CORE

2mA

10Ohm
2

V5REF

VCCP_CORE

+5VREFSUS

VccRTC

A6

PCI

R2319
1

0.1UF/16V

A23

VCCPSUS

0.1UF/16V

C2311

VCCPUSB

1

C2310

2

2

1

+VCC_RTC

+5VS

2

1.634A

U2001F

2

5

6uA in G3

Vss1
Vss2
Vss3
Vss4
Vss5
Vss6
Vss7
Vss8
Vss9
Vss10
Vss11
Vss12
Vss13
Vss14
Vss15
Vss16
Vss17
Vss18
Vss19
Vss20
Vss21
Vss22
Vss23
Vss24
Vss25
Vss26
Vss27
Vss28
Vss29

Vss30
Vss31
Vss32
Vss33
Vss34
Vss35
Vss36
Vss37
Vss38
Vss39
Vss40
Vss41
Vss42
Vss43
Vss44
Vss45
Vss46
Vss47
Vss48
Vss49
Vss50
Vss51
Vss52
Vss53
Vss54
Vss55
Vss56
Vss57
Vss58
Vss59

Vss60
Vss61
Vss62
Vss63
Vss64
Vss65
Vss66
Vss67
Vss68
Vss69
Vss70
Vss71
Vss72
Vss73
Vss74
Vss75
Vss76
Vss77
Vss78
Vss79
Vss80
Vss81
Vss82
Vss83
Vss84
Vss85
Vss86
Vss87
Vss88
Vss89

Vss90
Vss91
Vss92
Vss93
Vss94
Vss95
Vss96
Vss97
Vss98
Vss99
Vss100
Vss101
Vss102
Vss103
Vss104
Vss105
Vss106

Vss107
Vss108
Vss109
Vss110
Vss111
Vss112
Vss113
Vss114
Vss115
Vss116
Vss117
Vss118

Vss119
Vss120
Vss121
Vss122
Vss123
Vss124
Vss125
Vss126
Vss127
Vss128
Vss129
Vss130
Vss131
Vss132
Vss133
Vss134
Vss135
Vss136
Vss137
Vss138
Vss139
Vss140
Vss141
Vss142
Vss143
Vss144
Vss145
Vss146
Vss147
Vss148

Vss149
Vss150
Vss151
Vss152
Vss153
Vss154
Vss155
Vss156
Vss157
Vss158
Vss159
Vss160
Vss161
Vss162
Vss163
Vss164
Vss165
Vss166
Vss167
Vss168
Vss169
Vss170
Vss171
Vss172
Vss173
Vss174
Vss175
Vss176
Vss177
Vss178

Vss179
Vss180
Vss181
Vss182
Vss183
Vss184
Vss185
Vss186
Vss187
Vss188
Vss189
Vss190
Vss191
Vss192
Vss193
Vss194
Vss195
Vss196
Vss197
Vss198

H5
J23
J26
J27
AC22
K28
K29
L13
L15

L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17

P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23

U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

Vss199
Vss200
Vss201
Vss202
Vss203
Vss204

Vss205
Vss206
Vss207
Vss208
Vss209
Vss210

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

B

A

ICH9M

GND

Title : SB-ICH9M(PWR)

VccGLAN3_3
ASUSTeK COMPUTER INC. NB4

ICH9M

Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
4

C

GND

1mA
5

D

3

2

Sheet
1

23

of

96


5

4

3

2

1

ICH9-M
+3VS

+12VS

1

D

1

D

R2405
4.7KOhm

22

6

SCL_3A

1

SMB_CLK_S 7,8,29,38,43,53

5

Q2401A
UM6K1N

22

2

2

2

R2406
4.7KOhm

3

SDA_3A

4

SMB_DAT_S 7,8,29,38,43,53

Q2401B
UM6K1N

7 SO-DIMM0
8 SO-DIMM1
29 CLK-GEN
39 AUD-DSP
43 NEWCARD
53 WLAN

C

C

EC-IT8752
Master

B

Slave
A.

SMB_CLK_S
SMB_DAT_S

B.

SMB_CLK_M
SMB_DAT_M

SCL_3A
SDA_3A
(ICH9M)

SMB0_CLK
SMB0_DAT
(EC)
SMB1_CLK
SMB1_DAT
(EC)

A

B

SO-DIMM0; SO-DIMM1;

Debug; WLAN Card

CLK Generator

BATTERY

Thermal Sensor
A

Title : ICH9M-Other
ASUSTeK COMPUTER INC. NB4
Size
Custom

Engineer: Jace_Kuo

Project Name

Rev

M50Vm

1.0

Date: Friday, March 07, 2008
5

4

3

2

Sheet
1

24

of

96


5

4

3

2

1

D

D

+3VS_SPI

+3VS_SPI

1

2 0Ohm

+3VS

R2515
3.3KOhm

C2501
0.1UF/16V

21
21

SPI_CS#0
SPI_SO

R2504

1

2 15Ohm

C

1

1

2

R2513
3.3KOhm

1

2

2

R2501

U2501
SPISO_ROM
+3VS_SPI_0

1
2
3
4

CE# VDD
SO HOLD#
WP# SCK
VSS
SI

8
7

6
5

+3VS_SPI_00
R2505

1

2 47Ohm

SPI_CLK
SPI_SI

21
21

C

SST25VF016B

(16Mb)

FOR iTPM

B

B

A

A

Title : SPI ROM
ASUSTeK COMPUTER INC. NB4
Size

Project Name

Date: Friday, March 07, 2008
4

3

Rev

M50Vm

A
5

Engineer: Jace_Kuo

2

1.0
Sheet

25
1

of

96