Tài liệu Design Technologies docx

Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
Design Technologies
Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
Views / Abstractions / Hierarchies
D.Gajski, Silicon Compilation, Addison Wesley, 1988
Architectural
Logic
Circuit
Behavioral
Structural
Physical

device
Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
N-Channel Enhancement
mode MOS FET
–
Four Terminal Device - substrate bias
–
The “self aligned gate” - key to CMOS
The MOS Transistor
n+n+
p-substrate
Field-Oxyde
(SiO

2
)
p+ stopper
Polysilicon
Gate Oxyde
Drain
Source
Gate
Bulk Contact
CROSS-SECTION of NMOS Transistor
Digital Integrated Circuits © Prentice Hall 1995
Introduction
Introduction
MOS transistors
Types and Symbols
D
S
G
D
S
G
G
S
D D
S
G
NMOS
Enhancement
NMOS
PMOS

Depletion
Enhancement
B
NMOS with
Bulk Contact
Digital Integrated Circuits © Prentice Hall 1995
Introduction
Introduction
Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
The Basic Idea…
»
Voltage on the Gate controls the current
through the source/drain path
»
N-Channel - N-Switches are ON when the
Gate is HIGH and OFF when the Gate is LOW
»
P-Channel - P-Switches are OFF when the
Gate is HIGH and ON when the Gate is LOW
»
(ON == Circuit between Source and Drain)
Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
Transistors as Switches
G
S
D

G
S
D
N Switch
P Switch
0
1
1
0
Passes “good zeros”
Passes “good ones”
Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
….The Rest of the Story...
»
Put them in series - both must be on to
complete the circuit
»
Put them in parallel - either can be on to
complete the circuit
»
Generate all sorts of Switching Functions
»
NOT the same as Boolean Functions.... Its
RELAY logic - pin ball machines
Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
Series Parallel Structures

N Channel: on=closed when gate is high
1
1
1 1
G
G
G G
S
S
S S
D
D
D
D
NMOS Transistors in Series/Parallel
Connection
Transistors can be thought as a switch controlled by its gate signal
NMOS switch closes when switch control input is high
X Y
A B
Y = X if A and B
X
Y
A
B
Y = X if A OR B
NMOS Transistors pass a “strong” 0 but a “weak” 1
Digital Integrated Circuits © Prentice Hall 1995
Introduction
Introduction

Introduction to VLSI Design © Steven P. Levitan 1998
Introduction
Introduction
Series Parallel Structures(2)
P Channel: on=closed when gate is low
0
0
0 0
G
G
G G
S
S
S S
D
D
D
D
PMOS Transistors in Series/Parallel
Connection
X
Y
A B
Y = X if A AND B = A + B
X
Y
A
B
Y = X if A OR B = AB
PMOS Transistors pass a “strong” 1 but a “weak” 0

PMOS switch closes when switch control input is low
Digital Integrated Circuits © Prentice Hall 1995
Introduction
Introduction