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5
SuperconductorMicroelectronics:
A Digital RF Technology for
Software Radios
Darren K. Brock
HYPRES, Inc.
When the concepts of ‘pure’ software radio
1
were first introduced they were immediately
recognizable to those who had worked on military systems at very low frequencies – at a
carrier frequency of 16 kHz, A/D conversion of the RF carrier directly at the antenna was
becoming feasible in the 1970s. However, only 10 years ago the prospect of ‘pure’ software
radio implementations for commercial wireless systems, operating at carrier frequencies of 2
GHz and beyond, was seen as being decades away. Recent progress in the field of super-
conductor microelectronics has, however, been both remarkably rapid and significant, such
that superconducting data conversion and DSP devices capable of operation at such frequen-
cies have now been successfully demonstrated. The commercialization of this technology
promises to be a key enabler of ‘pure’ software radio architectures for both commercial and
military wireless systems. This chapter provides a description of the underlying technology and
its potential in both commercial and defense wireless systems. The fundamentals of the tech-
nology have now been proven; the pace of commercialization will depend upon investment.
5.1 Introduction
The speed and flexibility enabled by superconductor microelectronics seems well matched to
the goals of proposed software radio architectures. For the purposes of this work, we will only
1
‘Pure’ software radio, as distinct from ‘pragmatic’ software radio, incorporates the concept of signal digitization
at the antenna. Such concepts are introduced in Chapter 1 by Walter Tuttlebee in Software Defined Radio: Origins,
Drivers and International Perspectives, Tuttlebee, W. (Ed.), John Wiley & Sons, Chichester, 2002. Chapter 2 by
Wayne Bonser in that volume also provides excellent background on the defense motivations, systems, and experi-
ence of software radio alluded to later in this chapter.
Software Defined Radio

Edited by Walter Tuttlebee
Copyright q 2002 John Wiley & Sons, Ltd
ISBNs: 0-470-84318-7 (Hardback); 0-470-84600-3 (Electronic)
examine the field of low temperature superconductors – specifically niobium (Nb), which
has a critical temperature (T
c
) of 9.23 K. Digital niobium circuits are operated between 4.2
and 5 K and generally employ an IC fabrication process for implementing the rapid single
flux quantum (RSFQ) logic family [1]. The kinds of circuits we assume can be made in this
technology are data converters and digital signal processing (DSP) type circuits. This
assumption is based on the fact that there have been many groups, in both industry and
academia, which have successfully demonstrated these types of circuit. However, for current
purposes, we will take the liberty to assume that such chips can be made with greater
complexity than yet achieved and can be manufactured with a reasonable yield. Fabrication
techniques, discussed later, are not dissimilar from those used today for silicon ICs, so this is
not an unreasonable assumption, although timescales for such a scenario will be investment
dependent. Given these caveats, we can begin a discussion of the application of such super-
conductor circuits to both commercial wireless and defense communications.
The title of this chapter refers to an approach called ‘digital RF’. By this we mean that the
superconductor logic gates will directly process digital signals at RF or multi-GHz frequen-
cies. This might be Mbps digital data modulated on an RF carrier, or it might be a digital
Gigabit data stream of samples from an analog-to-digital converter (ADC). In the following
sections, we show examples, on both the receive and transmit sides, of how such RSFQ
circuits can benefit: (1) a CDMA-type base station for commercial wireless; and (2) military
systems with their varied and disparate requirements of frequency, bandwidth, and protocol.
It is the performance characteristics of RSFQ that can enable the kind of flexible, high data
rate applications that are being talked about as third and fourth generation, 3G and 4G,
wireless services. The need to embrace legacy systems, while building in flexibility, in
defense applications is an even more formidable task. However, such ideal ‘software radios’
may only be possible if implemented using a digital RF architecture with superconductors.

5.1.1 Superconductivity and the Josephson Effect
We begin by briefly reviewing the phenomenon of superconductivity [2]. Although most
readers will be familiar with the trait that superconductors exhibit zero resistance when
cooled below a critical transition temperature (T
c
), fewer may recall the second (and perhaps
even more remarkable) feature – superconductors can contain magnetic flux only in certain
discrete quantities. Called ‘flux quantization’, and illustrated in Figure 5.1, this behavior can
be exploited to construct a variety of circuits that have no dual in the semiconductor realm.
If a closed section of superconductor material is subjected to a magnetic field, screening
currents will orient themselves such that the flux threading the closed section is quantized.
This amount of magnetic flux F threading the loop is given by integrating the normal
component of the incident field B over the area A of the closed section F ¼
R
BdA ¼ nF
0
where n is an integer and F
0
¼ h=2e ø 2:07 £ 10
215
Webers (We) is called the ‘flux quan-
tum’ or ‘fluxon’.
In order to create digital circuits, an active superconductor component is needed – the
Josephson junction (JJ). As shown in Figure 5.2, a JJ consists of two Nb electrodes separated
by a thin insulator (typically Al
2
O
3
). Denoted in a circuit diagram by a cross, the JJ’s principal
parameter is its critical current I

c
. When a bias current I , I
c
is applied from base to counter
electrode, the device exhibits no resistance. However, when I . I
c
is applied, the JJ becomes
briefly resistive. The time scale of this event is dictated by the capacitance of the thin
Software Defined Radio: Enabling Technologies128
insulator. For a junction of 3 £ 3 mm, this is about 1 ps. For a junction of 0.3 £ 0.3 mm, this is
about 0.1 ps.
A design consideration for Josephson junctions in RSFQ circuits is that they be sufficiently
damped to prevent hysteresis upon exceeding the critical current, so that the junction quickly
Superconductor Microelectronics: A Digital RF Technology for Software Radios 129
Figure 5.2 Josephson junction and SQUID configurations
Figure 5.1 The phenomena of superconductivity: zero resistance and magnetic flux quantization
returns to the zero voltage state. As we show below, this rapid voltage pulse corresponds to a
single flux quantum F
0
, and forms the basis for RSFQ logic. As illustrated in Figure 5.3, this
is generally analyzed in terms of a shunted junction model, in which the ideal Josephson
junction of capacitance C is shunted with a linear resistance R [3]. The junction itself can be
characterized as a nonlinear inductor of magnitude given by the Josephson inductance L
J
¼
F
0
/2
p
I

c
. Such a parallel network has two characteristic times, RC and L
J
/R. If the former time
is larger, the junction is underdamped; in the other limit, it is overdamped.
If we embed the resistively shunted junction of Figure 5.3 into the closed superconductor
loop of Figure 5.1, we obtain a superconducting quantum interference device (SQUID),
illustrated in Figure 5.2. The inductive loop provides the quantization of magnetic flux,
and the junctions provide a switching mechanism for loading and unloading flux into and
out of the loop. This SQUID configuration, known for many years now, is the basis of all
superconductor electronics.
5.1.2 Established Applications of Superconductors
In the past few years, superconductor microelectronics has started to emerge into the commer-
cial arena from university and industry R&D laboratories, providing unsurpassed performance
characteristics [4]. Superconductor magnetoencephalography (MEG) systems for imaging the
human brain are commercially manufactured by several companies and over a hundred of these
systems are in use today. The extreme sensitivity of these instruments allows diagnostic
medical data to be gleaned from neuron dipole moments down to a few nA-m
2
.
Software Defined Radio: Enabling Technologies130
Figure 5.3 Hysteretic and nonhysteretic Josephson junction behaviors
Even the Systeme Internationale (SI) unit of the Volt is defined by a superconductor
integrated circuit. HYPRES, Inc. (Elmsford, NY) currently offers commercial products
based on superconductor integrated circuits, packaged with a small mechanical refrigerator
to provide temperature regulation, allowing this standard volt to be reproduced anywhere in
the world with quantum mechanical accuracy. Simply put, these are applications that cannot
be performed with any other technology; therefore the motivation to accept the unique
character of cryogenic operation is strong. As a consequence, these applications have driven
the state of the art in cryopackaging to the point where all cryogenics have become invisible

to users of such products.
5.1.3 Emerging Applications – Software Defined Radio
As the ‘cryophobia’ associated with superconductor microelectronics is overcome, the range
of possible applications continues to widen. In communications, dispersion-free, ultra-high
Q superconductor microwave filters for cellular base stations are today offered from several
companies in the United States, Europe, and Japan. Close to a thousand such units have
been purchased and installed around the United States, with orders pending from major
carriers in Europe. The use of superconductor material allows the very high Qstobe
maintained, while microminiaturizing the overall filter size. The ultra-sharp filter ‘skirts’
that result enable increased channel selectivity and, with a cooled LNA, yield increased
sensitivity as well.
Recently, wireless telephony has been shifting from voice/narrowband data to wideband
data, along with demands for significant increases in capacity. These have become the
industry’s major drivers, with the major obstacles becoming air interface compatibility
and bandwidth allocation. An increasingly embraced solution to surmount these obstacles
lies in the concepts of software radio [5]. However, realization of software radio systems
Superconductor Microelectronics: A Digital RF Technology for Software Radios 131
Table 5.1 Demonstrated RSFQ digital circuit performance
Circuit type Circuit metric(s) Circuit type Circuit metric(s)
Toggle flip-flop 144 GHz 2-bit counter 120 GHz
4-bit shift register 66 GHz l-kbit shift register 19 GHz
6-bit flash ADC 3 ENOB
a
at 20 GHz 6-bit transient digitizer
with 6 £ 32 bit on-chip
memory buffer
16 GS/s
14-bit high-resolution
ADC (2 MHz)
14 ENOB and 2100

dBc SFDR
b
18-bit DAC Fully functional at
low speed
1:8 demultiplexor
(synchronous)
20 Gb/s 1:2 demultiplexor
(asynchronous)
95 Gb/s
1-bit half-adder 23 GHz 2-bit full-adder 13 GHz
8 £ N bit serial
multiplier
16 GHz 14-bit digital comb filter 20 GHz
128-bit autocorrelator 16 GHz Time-to-digital
converter
31 GHz
a
ENOB, effective number of bits.
presents a host of challenges – chief among them the unprecedented requirement on analog-
to-digital converter (ADC) performance [6]. This is the area where superconductor micro-
electronics represents an emerging solution. With demonstrated ADC, DAC, and DSP
components, this technology may well become a key enabling technology for software
radio [7]. Table 5.1 summarizes the performance already achieved with such superconduct-
ing devices to date. Unlike commercial systems, which are primarily cost/performance-
driven, defense applications tend to be primarily performance driven, with cost as a close
second. In addition, military radio requirements are far more demanding than those for
commercial systems.
5.2 Rapid Single Flux Quantum Digital Logic
By now the reader may be wondering why a digital superconductor IC technology has not
already been established. In fact, there were two large digital superconductor programs – one

that ran at IBM from 1969 to 1983 and another in Japan from 1981 to 1990. Rather than
relying directly on quantized bundles of magnetic flux as bits, those efforts (and others at the
time) attempted to use the voltage state of the JJ as a ‘1’ and the superconducting state as a
‘0’. Many fully functional circuits were demonstrated, culminating with a 1 GHz 4-bit micro-
processor by NEC [8]. However, it was this choice of logic convention which ultimately led
to the conclusion of the program. A reset effect called ‘punchthrough’ limited the speed of
operation to just a few GHz. In contrast, very large scale integration (VLSI) RSFQ circuits
should operate up to 250 GHz. Power consumption was another issue. A typical latching gate
dissipated about 3 pW. Although this sounds small, RSFQ technology dissipates only one
tenth of this, at 0.3 pW/gate. The need to distribute an AC power supply was also a problem
and made timing issues extremely complex.
5.2.1 Circuit Characteristics
5.2.1.1 Circuit Structures
In RSFQ circuits, it is not a static voltage level, but the presence or absence of quantized
magnetic flux (fluxons) that represents information bits. The basic RSFQ structure is a super-
conducting ring that contains one Josephson junction plus a resistive shunt outside it (see
Figure 5.4).
Suppose a current is already a circulating around the loop, supporting one fluxon. At a certain
critical current level (about 100 mA for typical designs), additional DC current across the loop
causes the fluxon to be ejected, with the Josephson junction acting as a briefly opened exit.
Rather than use the escaping flux directly, RSFQ relies on the fact that the movement of a
fluxon into or out of this loop induces a very short voltage pulse (known as an ‘SFQ pulse’, for
single flux quantum) across the junction. If the Josephson junction were a square, 1 mmona
side, this SFQ pulse would be <1 ps long and 2 mV in amplitude. The SFQ pulses become
narrower and greater in amplitude as the junctions decrease in area but, because their
magnetic flux is quantized, the voltage–time product of the pulse always remains the
same: 2 mV-ps, i.e. 2 £ 10
215
Wb. The energy consumed each time an SFQ pulse passes
through a junction is just the circulating current of about 100 mA times the amount of flux F

0
,
or only ~2 £ 10
219
J.
These SFQ pulses are used to form RSFQ digital logic gates composed of only a few basic
Software Defined Radio: Enabling Technologies132
circuit structures. These building blocks allow the generation, transfer, storage, and condi-
tional routing, or ‘switching’, of SFQ pulses. Shown in Figure 5.5, the three basic structures
include an active transmission stage (JTL or Josephson transmission line), the storage loop,
and the decision making pair (or comparator).
5.2.1.2 Fabrication and Packaging
RSFQ integrated circuits are made with standard semiconductor manufacturing equip-
ment; however, there are many fewer mask layers (typically about ten) and the actual
processing involves much less complex depositions [9,10]. Because RSFQ logic is an all-
Superconductor Microelectronics: A Digital RF Technology for Software Radios 133
Figure 5.4 Physical realization of a resistively shunted Josephson junction
Figure 5.5 The three basic structures of RSFQ logic
thin-film technology, there are no doping profiles to calculate, no high temperature drive-
ins, no epitaxial growths, or chemical vapor depositions. These differences are expected
to translate directly into reduced costs in the large scale manufacture of RSFQ electro-
nics.
Architectures containing both front end analog circuitry, as well as digital processing
blocks, are fundamental SDR requirements. This configuration presents extraordinary diffi-
culties for semiconductors, due to ‘crosstalk’–problems of interference between the analog
and digital sections of the same chip. Because of the unique reliance on single quanta of
magnetic flux to convey information, RSFQ are inherently more immune to this sort of
crosstalk.
The RSFQ technology also has a clear path to extend performance. Unlike semiconductor
devices, the speed of RSFQ ICs comes from inherent physical phenomena, not ultra-small

scaling. This means that existing lithography techniques can be employed and, more impor-
tantly, existing equipment can fabricate circuitry that surpasses conventional limits of perfor-
mance. Because RSFQ logic uses the lossless ballistic transmission of digital data fluxons on
microstriplines near the speed of light, the wire up nightmare that silicon designers face is
substantially reduced. This scenario also allows the full speed potential of individual gates to
be realized.
Other features of this technology that make it suitable for growth into the traditional market
include its compatibility with existing IC packaging techniques. These include compatibility
with optical (fiber) signal input and output, a maturing multichip module (MCM) technology
with multi-Gb/s digital data transfer between chips, and simple interface circuits to convert to
and from both ECL logic and CMOS logic levels.
5.2.2 Example RSFQ Logic Gate – RS Flip Flop
To transfer SFQ pulses as information bits, a clock may be used to provide a steady stream of
timing pulses (one per clock cycle), such that the presence of a data pulse within the clock
cycle denotes a logic (1), while the absence of one denotes a logic (0). Combinations of
Josephson junctions can then be interconnected to achieve SFQ pulse fan-in and fan-out and
create a variety of logic structures. Although all common binary logic primitives (like AND,
Software Defined Radio: Enabling Technologies134
Figure 5.6 Basic building blocks of an RSFQ gate
OR, or XOR) can be fashioned, it is often more convenient to create gate macros directly
rather than from lower logic primitives. This technique maximizes speed and minimizes
junction count. The operation of an RSFQ reset–set flipflop gate provides a simple example
(see Figure 5.6).
If a set pulse arrives, J1 transmits it into the quantizing inductance loop, where it becomes
trapped as a circulating current – the 1 state. This current biases J3, so that when a clock/reset
pulse arrives at the gate, it causes J3 to transmit the stored fluxon to the output, thus resetting
the flipflop to the 0 state. Alternatively, if no set pulse input has occurred during the clock
period and a clock/reset pulse arrives, the unbiased J3 cannot transmit the pulse and J2 is
forced to let the fluxon escape the circuit, so no pulse appears at the output.
5.2.3 RSFQ Data Converters

5.2.3.1 Analog to Digital Converters
The quantum precise periodic transfer function of the superconducting quantum interfer-
ence device (SQUID) makes superconductor circuits an excellent choice for data conversion
from a continuous time to a discrete time format [11]. Figure 5.7 shows a block diagram and a
chip photo of an RSFQ ‘high resolution’ ADC based on a phase modulation/demodulation
architecture [12].
This superconductor ADC design is especially linear, because the quantization thresholds
are set by a ratio of fundamental physical constants (h/2e) in the SQUID in the front end. This
leads to an enhanced spurious free dynamic range (SFDR) in comparison to semiconductor
ADCs, whose thresholds are set by the matching of device characteristics. Common perfor-
mance metrics for ADCs are the SINAD and the SFDR.
2
SINAD is a signal-to-noise and
Superconductor Microelectronics: A Digital RF Technology for Software Radios 135
Figure 5.7 Phase modulation/demodulation ADC: block diagram and chip photograph
2
These metrics are described generally in Chapter 2, and, in the context of ADCs, in Chapter 4.
distortion measurement, and represents the dynamic range of the signal with respect to all
digitization artefacts. SFDR is the spurious free dynamic range, reflecting the linearity of the
ADC process by indicating the ratio of signal to the highest spurious signal in the Nyquist
band.
Demonstrated performance for the first HYPRES RSFQ ADC (shown in Table 5.2) is a
SINAD of 58.2 dB (9.4 effective bits) and an SFDR of 278.7 dBc at 100 MS/s Nyquist rate
sampling. The same chip also provides 14.5 effective bits (a SINAD of 89.1 dB) with an
SFDR of 2100 dBc for a DC to 2.3 MHz band at 5.5 MS/s.
The circuit consists of two major parts: a differential code, front end quantizer and a digital
decimation low pass filter. The front end is composed of an analog phase modulator and a
digital phase demodulator. The phase modulator consists of a single-junction SQUID, biased
by a DC voltage from a special voltage source, which is stabilized by an internal clock
frequency. The phase demodulator consists of a time-interleaved bank of race arbiters

(SYNC) followed by a thermometer to binary encoder (DEC).
In order to obtain a binary differential code from the thermometer code outputs of the
synchronizer bank, the encoder block adds up these outputs and subtracts N/2 each clock
period. The differential code from the output of the front end is passed to a digital decimation
low pass filter (DSP), which uses a standard cascaded integrator comb (CIC) architecture with
two integration stages. The first integration stage restores the signal from the differential
code, and the second one provides first-order low pass filtering.
The dynamic resolution, or effective number of bits (ENOB), of this ADC is determined by
the input signal bandwidth (BW), the internal clock frequency f
clk
, and the number of synchro-
nizer channels N and is given [13] by
ENOB ¼ log
2
ðNf
clk
=
p
BWÞ 1 1=2 log
2
ðf
clk
=2BWÞð1Þ
The first term in this formula accounts for a slew rate limit (i.e. limited by the signal
derivative), while the second one comes from standard oversampling gain. Here, the BW
is assumed to be half the output sampling rate (i.e. at the Nyquist limit). Therefore, (1) gives a
bandwidth-to-resolution trade-off ratio of 1.5 bits per octave, as expected for a first-order
oversampling ADC.
5.2.3.2 Digital-to-Analog Converters
A number of different so-called ‘programmable Josephson voltage standards’ have been

proposed [14,15]. Each of these designs consists of a superconductor digital-to-analog
converter (DAC) based on the properties of flux quantization. When a quantized SFQ
Software Defined Radio: Enabling Technologies136
Table 5.2 Demonstrated RSFQ ADC performance
Sample rate MS/s ENOB bits SINAD dB SFDR dBc Input MHz
100 9.4 58.2 278.7 DC to 50
25 12.6 77.8 291.0 DC to 10
5.5 14.5 89.1 2100 DC to 2.3
pulse is used to represent digital data, the AC Josephson effect
3
(i.e. frequency-to-voltage
relationship) gives access to a method for directly transferring back into the analog domain.
The fact that a SFQ DAC uses the same fundamental physics that define the unit of the Volt
has some profound consequences [16]. For instance, any instantaneous voltage generated by
the DAC will be precise to the accuracy of the definition of the Volt. Further, every waveform
cycle generated will be exactly the same, with quantum precision. The small time constants
associated with Josephson junctions may make it possible to extend such performance to
many GHz, although very large arrays of JJs may be necessary to achieve useful levels of
output voltages suitable to drive high power amplifiers (HPAs).
An RSFQ DAC design based around a voltage multiplier (VM) block was first shown by
Semenov [17]. This DAC (seen in Figure 5.8) uses each bit of an N-bit RSFQ digital word to
drive an RSFQ digital to frequency converter (DFC) (sometimes noted as ‘SD’).
A DFC is designed to output a stream of SFQ pulses at a frequency that is proportional to
its reference clock frequency, only when the bit value at its input is ‘1’. By arranging a series
of N DFCs with reference frequencies f
N
that decrease as 2
2N
, one can effectively create a
binary weighted set. By switching different DFCs in and out of the series with the digital input

word, any of 2
N
combinations can be chosen. The VM is an inductively coupled SQUID chain
used to transform the DFC streams offlux quanta into time-averaged voltages, then sum them,
creating a corresponding output voltage with N-bit resolution. By updating the N-bit input
word periodically, at a rate slower than the slowest DFC reference frequency, one creates a
DAC. The voltage at the output of the DAC during a single sampling period is given by V
out
¼
MF
0
f
0
, where f
0
is a readout or sampling clock frequency, and M is the total number of SFQ
pulses driven through the VM by all the DFCs. The LSB of the output voltage is nF
0
f
0
, where
Superconductor Microelectronics: A Digital RF Technology for Software Radios 137
3
When using fluxons, F
0
, as data bits, a time-averaged voltage measurement serves as a direct measurement of the
bit rate according to the relation kVl ¼ F
0
/s, where the measurement accuracy is determined by the uncertainty limit
on the voltage measurement apparatus.

Figure 5.8 RSFQ DAC: block siagram and chip photograph
n is the number of stages in the smallest stage of the VM. The output dynamic range is
2
N
LSB, where N is the resolution of the DAC in bits.
Many bits of dynamic range are possible, because the initial reference clock can be very
high. The chip in this figure is a 22-bit DAC. Experimental results of an 8-bit design have
been shown. The differential nonlinearity (DNL) of the DAC is ,0.1 LSB. With the proper
microwave engineering of the VMs, a multi-GHz output rate (effective bandwidth) could be
achieved, while maintaining significant dynamic range. The update clock and output clock
are synchronized to prevent spikes during code transitions.
5.2.4 RSFQ Scaling Theory
The basic scaling laws for Josephson junctions in RSFQ circuits are well known [18]. The
junction fabrication process defines the thickness of the tunneling barrier d ~1–2 nm, which
in turn determines the critical current density J
c
, which is exponentially dependent on d. Once
J
c
is fixed, the primary constraint on the junction scale a is that the junction be large enough to
avoid thermal fluctuations, typically with I
c
. 100 mA for Nb circuits. For a large scale digital
integrated circuit, this constraint assures that the bit error rate is sufficiently small.
For RSFQ circuits, the high frequency performance is determined primarily by the width of
the SFQ pulse generated by a nonhysteretic Josephson junction (RC , L
J
/R). Because the
time-integral of the SFQ voltage pulse is F
0

¼ 2 mV-ps, the pulse height is roughly V
c
<
2I
c
R, and the pulsewidth is t < F
0
/2I
c
R [1]. By decreasing the scale of a Nb junction, the pulse
can be made narrower until around a < 0.3 mm, where V
c
< 4.8 mV and
t
< 0.4 ps. For
junction sizes a, above this limit, external shunt resistors are employed to ensure that (RC ,
L
J
/R).
Although JJs are the central elements of RSFQ circuits, they are not the only elements.
Equally important are inductors and resistors. These can also be scaled down in size in a
consistent way [19]. In this case, the speed of complex RSFQ circuits should scale with the
reciprocal pulse width 1/
t
. In particular, it is a rough rule of thumb that the maximum clock
frequency of a synchronous RSFQ circuit is approximately
Software Defined Radio: Enabling Technologies138
Table 5.3 RSFQ scaling theory
a
Quantity Transformation

Current I ! I
Voltage V ! V
a
Flux F ! F
Distance on chip Dx ! Dx/
a
Time delays Dt ! Dt/
a
Resistance R ! R
a
Capacitance C ! C/
a
2
Inductance L ! L
Junctions/area N ! N
a
2
Power/area P ! P
a
2
a
Scaling down by a factor of
a
, in regime where shunt
resistance is still needed
f
c
<
1
10

t
<
75 GHz
a½mm
; ð2Þ
where again this scaling relation should continue only down to a scale of 0.3 mm, for a
maximum limiting VLSI clock speed of about 250 GHz.
These scaling factors are summarized in Table 5.3. If all on-chip patterns are shrunk by
a factor
a
, then all times will be reduced by the same factor. This includes time delays
due to junctions, as well as time delays due to pulse propagation on transmission lines. So
even as the pulses become narrower, their relative timing in the circuit will remain
consistent.
5.3 Cryogenic Aspects
Naturally, superconductor RSFQ circuitry must be cooled for operation. The temperature of
operation is normally selected to be at about half the material’s superconducting transition
‘critical temperature’ (T
c
). For operating temperatures below about one-half T
c
, supercon-
ducting parameters are not strongly sensitive to small variations in temperature. For Nb
(T
c
¼ 9.23 K), operating at the boiling point of liquid helium (LHe) at one atmosphere
(4.2 K), meets this requirement. However, a closed cycle refrigerator (CCR or cryocooler)
with a 4.2–5Kfinal stage temperature is a more suitable platform for a commercial product
[20].
Cryocoolers are refrigerators in which mechanical work is performed on helium gas by first

compressing the gas under constant temperature conditions, and then allowing it to expand.
This action reduces the temperature of the gas, and can be repeated many times to achieve the
desired temperature. The efficiency of this thermodynamic process is called the ‘Carnot
efficiency’,
h
. For an ideal machine this relates the work done, W, to move a quantity of
heat, Q, from a low temperature to a warmer temperature and is defined as
h
;
Q
W
¼
T
cold
ðT
warm
2 T
cold
Þ
ð3Þ
In a real machine, there are actually some losses so
h
actually only defines a limit that can be
approached, and what is generally quoted is the fraction of the ideal case. The reciprocal of
this fraction is called the coefficient of performance (COP). At the present time, the COP for
4–5 K cryocoolers is about 4000 W/W. If the efficiencies of these cryocoolers could be
improved to about 5% of Carnot efficiency, then cryocoolers providing 0.25 W of cooling
capacity (as required by an RSFQ digital system),operating at temperatures of 4–5 K, would
consume 75 W (and have a mass of 30–40 kg). Figure 5.9 gives examples of current,
developing, and forecasted cryocooler profiles.

A cost-reliability goal for commercial cryocoolers has been suggested at US$1000–
10000 for a unit with a 2–10 year lifetime. Interestingly, the refrigeration power required
for an RSFQ system is only a fraction of a Watt, with the dominant heat load contributed
by heat leaks via radiation and conduction from the surrounding interface electronics,
rather than the heat from RSFQ chips themselves. The input power requirements of today’s
off the shelf CCRs are about 600–2000 W for 4.2 K, yielding 500 mW of refrigeration
power. For a typical RSFQ ADC system, a refrigerator might be needed that can cool a
minimum of 250 mW at 5 K. This cooling budget consists of 10 mW for the RSFQ chips
Superconductor Microelectronics: A Digital RF Technology for Software Radios 139
and 100 mW for the I/O heat load from a ~40 K stage to the ~5 K stage, with appropriate
design margins.
One of the main concerns frequently raised by potential users of cryogenic equipment is
that of reliability. When cryogenic refrigerators were initially introduced to the military and
commercial markets, they frequently failed after only several hundreds of hours of operation;
however, much progress has been made in this area. One approach to improve system lifetime
was the use of oil lubricated air-conditioning compressors. This is the type of CCR currently
used for HYPRES voltage standard products. A typical maintenance cycle is once per 3 years
to replace an oil absorber, or ‘scrubber’, that removes any contaminants in the oil that would
freeze out at low temperatures.
The other advance in reliability is the use of noncontacting suspension methods for the
piston in the cylinder. This approach has yielded mean time between failures (MTBF) of
several hundred thousand hours and is used in most higher temperature commercial cryo-
coolers (e.g. in military and civilian products for cooling infrared (IR) imaging systems). This
is the most likely candidate to be adapted for a low temperature superconductor SDR product
platform.
5.4 Superconductor SDR for Commercial Applications
5.4.1 Superconductors in Wireless Communications
In recent years, commercial wireless communication technology has been a growth area for
both voice and data transfer. Already, most wireless systems are implemented digitally, and
Software Defined Radio: Enabling Technologies140

Figure 5.9 Representative generations of closed-cycle refrigerators
there has been growing prediction that the industry is evolving towards a ‘software radio’
implementation.
4
This involves moving the point of digitization (the point where the transi-
tion from a modulated analog carrier is transformed into a data bitstream) closer to the
antenna itself. One reason for this trend comes from the simple fact of spectrum regulation.
In the United States, this is done by the Federal Communications Commission (FCC). In
other parts of the world, similar government organizations have jurisdiction. Governments
auction off chunks of the electromagnetic spectrum to wireless service providers. In return
they enforce laws that forbid emissions at these frequencies so the providers can do business
without interference. However, since they are restricted to a fixed bandwidth, the only way
to fit in more callers or higher rate data transfer or both is to increase their ‘spectral
efficiency’ (here defined in bits/Hz/s/sector/cell). As one may imagine, after paying out
billions in auction, service providers are anxious to squeeze as much out of their bandwidth
as possible.
In short, these are motivated customers. The competition of many providers, coupled with
the dropping rates for services, has made the cost/performance ratio very important. Since
cryocooled high temperature superconductor (HTS) filters are now being installed in cell base
station receivers with good success, the incentive has increased to see where low temperature
superconductors (LTSs) can offer an advantage as well. In fact, cryocooled LTS mixed signal
electronics is probably the only technology with the speed, linearity, and sensitivity to allow
direct RF digitization and subsequent fast digital signal processing. Just like the selectivity
and sensitivity of HTS passive filters, LTS digital electronics represents the ultimate in speed
and fidelity.
Besides that, there are now reliable 5 K cryocoolers that are commercially available and
have been integrated with LTS, so it is well acknowledged that there are no technical show-
stoppers. The real question now turns to cost efficiency. With an appropriate market, further
improvements in efficiency, size, and costs are expected.
5.4.2 Advantages of Superconductor Receivers

So, just how does using low temperature superconductors help? Let us consider more closely
this idea of ‘digital RF’. What are the advantages of direct broadband digitization at RF? If
the system is digitized directly behind the antenna, we can replace many of the frequency
specific, noisy, nonlinear analog components with general purpose flexible and noise resistant
digital components. By eliminating all stages of analog mixers for down-conversion, one
introduces far less distortion into the received signal. A single receiver front end can digitize a
wider band of the spectrum, which contains not one, but multiple channels, so the appropriate
channelization can be done digitally, without the addition of noise.
Another advantage is the high sensitivity of superconductor SQUID-based front ends.
These superconducting quantum interference devices are the most sensitive detectors
known. Similar to their uses in magneto-encephalography (MEG) and magneto-cardiography
(MCG), they can eliminate the need for preamplifiers completely. In other situations, where
extremely weak signals should be detected, one can still lower the preamplifier noise by using
a stage of the cooling platform.
Superconductor Microelectronics: A Digital RF Technology for Software Radios 141
4
John Ralston, for example, persuasively argues such a case in Chapter 4 of Software Defined Radio: Origins,
Drivers and International Perspectives, Tuttlebee, W. (Ed.), John Wiley & Sons, Chichester, 2002.
5.4.2.1 Receiver Noise Temperature Calculation
5
When examined at the system level of the complete receiver chain, the overall noise tempera-
ture of the receiver can be reduced from ~1000–2000 K (typical for a conventional receiver)
to ~250 K for a superconducting receiver.
Figure 5.10 shows a model of the noise temperature (T
S
) calculation of a conventional
receiver. It features contributions from the antenna itself (T
A
), followed by some cable losses
(T

C
), and finally the noise associated with the rest of the analog receiver (T
RX
) where
T
S
¼ T
A
1 T
C
1 L
C
T
RX
¼ T
A
1 L
C
2 1
ÀÁ
T
0
1 L
C
F
RX
2 1
ÀÁ
T
0

ð4Þ
Consider two cases – one with the conventional receiver in a shelter on the ground, and the
other with it mounted atop the antenna tower. The shelter-mounted configuration is very
common and the tower-mounted is becoming more fashionable. Typical noise figures for a
traditional receiver are in the range of 3–5.5 dB. So, if we sum up the contributions, we see an
overall noise temperature of about 1000–2000 K for the ground case (T
0
¼ 290 K, T
A
¼ 200
K, L
C
¼ 2 (3 dB), F
RX
¼ 3–5.5 dB gives T
S
¼ 200 1 290 1 580 ¼ 1070 K (if F
RX
¼ 3 dB) or
T
S
¼ 200 1 290 1 1480 ¼ 1970 K (if F
RX
¼ 5.5 dB)).
If we can eliminate the cables losses by mounting on the tower, this can be reduced to
between 500 and 1000 K (T
0
¼ 290 K, T
A
¼ 200 K L

C
¼ 1.047 (0.2 dB), F
RX
¼ 325.5 dB
gives T
S
¼ 200 1 14 1 302 ¼ 516 K (if F
RX
¼ 3 dB) or T
S
¼ 200 1 14 1 774 ¼ 988 K (if
F
RX
¼ 5.5 dB)).
Now examine the case where a digital RF superconductor receiver is used, directly digitiz-
Software Defined Radio: Enabling Technologies142
5
For a detailed explanation of noise figure and temperature calculations, see Chapter 2.
Figure 5.10 Conventional vs. superconductor receiver noise temperatures
ing the signal carrier. Assume that we can use commercial HTS filters to band limit the signal,
and include an RF diplexer as well. For the superconductor case
T
S
¼ T
A
1 T
C
1 L
C
T

D
1 L
D
L
C
T
F
1 L
F
L
D
L
C
T
ADC
¼ T
A
1 L
C
2 1
ÀÁ
T
0
1 L
C
L
D
2 1
ÀÁ
T

1
1 L
D
L
C
L
F
2 1
ÀÁ
T
1
1 L
F
L
D
L
C
T
ADC
ð5Þ
Consider again the same two scenarios – tower mounted and shelter mounted. The noise
contributions from the antenna and lossy cable are the same. For the diplexer and filter they
are very small, so we can just examine the ‘noise temperature’ of the superconductor ADC. In
fact, the ADC does not contribute ‘noise’ in the standard sense. Rather it does add a ‘quanti-
zation error’, as all digitizers do. We can model this as an ‘effective noise temperature’
(T
ADC
), which depends on bandwidth. Here we assume a wide bandwidth of 200 MHz,
contributing 20 K of effective noise temperature. When we sum it up, we find that the ground
based SCE receiver has a noise temperature of about 534 K (T

0
¼ 290 K, T
1
¼ 60 K, T
A
¼ 200
K, T
ADC
¼ 20 K, L
C
¼ 2 (3 dB), L
D
¼ 1.023 (0.1 dB), L
F
¼ 1.148 (0.6 dB) gives T
S
¼ 200 1
290 1 3 1 18 1 23 ¼ 534 K).
Take away the cable losses and the noise temperature drops to 237 K (T
0
¼ 290 K, T
1
¼ 60
K, T
ADC
¼ 20 K, L
C
¼ 1.047 (0.2 dB), L
D
¼ 1.023 (0.1 dB), L

F
¼ 1.148 (0.6 dB) give T
S
¼ 200
1 14 1 1.5 1 9.5 1 12 ¼ 237 K).
Note that the noise temperature of the antenna itself is 200 K. This represents the absolute
best any system can achieve, because it is limited solely by the world around the tower itself.
We conclude that by employing a digital RF approach with a superconductor ADC, we move
from a system limited by the noise figure of its components to one limited by its environment.
5.4.3 Trends in Spread Spectrum Communications
The time division multiple access (TDMA) protocol ‘GSM’ has achieved global dominance.
It is an open standard that has become pervasive almost everywhere in the world (even the
United States). TDMA systems require one radio per frequency channel, so, in order to
support a large number of simultaneous callers, one requires an equally large number of
radios. Because of the wideband ADCs possible with superconductors, one can use an
approach which requires only a single radio, directly at the RF carrier frequency, to digitize
all the calls at once. All these digital bits can them be processed and sorted out to get them
directed to the right place. Code division multiple access (CDMA) systems were developed to
solve this very same problem. However, instead of relying on a very wideband ADC with
GHz sampling, a new standard was created to use spread spectrum techniques that allow lots
of channels to occupy the same bandwidth, each with digital orthogonal codes. The CDMA
scheme allows multiple simultaneous users to share the same channel bandwidth (W
ss
), which
typically is much greater than the information bandwidth or data rate (R
b
) for individual users.
However, CDMA systems are now facing the same issues of multiple redundant transceivers
as more simultaneous users are desired.
5.4.3.1 Interference Limited Systems – the Myth and the Reality

The Myth: low noise receivers are not useful in interference limited systems, because thermal
noise is small compared to interference from other users.
Superconductor Microelectronics: A Digital RF Technology for Software Radios 143
The Reality: low noise receivers are useful in interference limited systems, because they
allow a reduction in power for all users, permitting higher information capacity (i.e. spectral
efficiency).
Consider the analogy of a noisy cocktail party representing the spectrum in use by a
wireless service provider in some big city. As everyone knows, it is difficult to communicate
effectively in a crowded party with lots of background noise. Music is playing, and there are
lots of voices within earshot. Now consider these as simply multiple ‘orthogonal’ conversa-
tions, perhaps about different subjects or in different languages. If you can lower the back-
ground noise, you can improve communications: (1) for instance, you’ll find you don’t have
to yell as loud and you can save your voice – i.e. conserve terminal battery power; (2) you’ll
also notice that with lower background noise, everyone else lowers their voice as well,
decreasing their interference with you; (3) now, as more people arrive at the party, they
too can join into conversations – i.e. more simultaneous users are allowed; (4) finally, you
also benefit from not having to repeat everything you say, because your new found friends can
hear you plainly – i.e. a higher data rate and better quality of service.
5.4.3.2 Benefits from Lower Receiver Noise
We can put the cocktail party analogy into somewhat more quantitative terms by considering
the receiver noise power density N
0
¼ k
B
T
s
and the base station receiver power for (M 1 1)
users/cell. From Viterbi we have
P
r

MðÞ¼
R
*
R
b
N
0
hi
1 2 M=M
max
ÂÃ
ð6Þ
where P
r
is total received power, M is the number of simultaneous users, R
b
is the bit rate, R
*
is the ratio of energy per bit, E
b
, to thermal noise and interference (N
0
1 I
0
), and finally, M
max
is the maximum number of simultaneous users [21].
By reexamining the benefits of the analogy, one sees that: (1) the lower P
r
must be, the

lower our transmitted power, leading to less drain on our battery; (2) callers can use a higher
required E
b
/N
0
to meet a lower bit error rate requirement or support higher symbol constella-
tions; and (3) thus the number of simultaneous users (M 1 1) increases with (4) them all using
a higher data rate (R
b
).
Given a fixed P
r
, any one feature can be traded off for the benefits of another, depending
on the situation. Take the case of base station range and number of simultaneous users,
assuming 9600 bps channels. In a conventional receiver (normalized to unity in Figure
5.11), one can support six simultaneous channels – the point where this drops to five is
the range limit for that capacity. With a low temperature superconductor receiver, however,
we can extend this limit by about 66%. This may not sound like much at first, but because
of the radial coverage for this case, this amounts to the elimination of 16 out of every 25
base stations, resulting in an enormous reduction in capital expenditure. Not only is the cell
area enlarged in the superconductor case, but the extended overlapping areas of lower rate
coverage for handoff are also enlarged. There are network optimization algorithms that
greatly benefit from the ability to perform more complicated handoffs in densely covered
sectors.
Software Defined Radio: Enabling Technologies144
5.4.4 High Power Amplifier Linearization
The high power amplifiers (HPAs) of any base station transmitter system consume a signifi-
cant part of the cost and power budget. The ability to overcome inherent nonlinearities in the
HPA transfer function not only extends the bandwidth of operation, but also allows for fewer
total HPAs, or HPAs of lower quality (lower cost), to enable the system to still function

correctly. While this approach is universally true, superconductor ICs may have the ability to
allow real time digital adaptive linearization at RF, by exploiting the high dynamic range and
bandwidth for RSFQ-based ADCs and DACs.
5.4.5 Digital RF Transceiver
After considering the capabilities described in the previous sections, one can begin to imagine
how almost all the functions required by a digital RF transceiver could be integrated mono-
lithically into a ‘radio on a chip’– specifically, a radio that performs all the functions in the
process of converting voice or data information to and from a modulated RF signal (see
Figure 5.12).
Nominally, such functions include: processing the analog RF signal (e.g. amplification/
attenuation), converting to/from intermediate frequencies (IF), filtering, etc.; waveform
modulation/demodulation (including error correction, interleaving, etc.); and processing of
the baseband signal (e.g. adding networking protocols, routing to output devices, etc.).
As a ‘pure’ software radio, the notional transceiver in Figure 5.12 has its modulation/
demodulation functions defined in software. The receiver chain employs a wideband RSFQ
ADC that captures all of the channels of the node. This receiver uses a digital mixer to down-
convert the data stream, and then demodulates the waveform digitally using back end RSFQ
DSP components. On the transmit side, waveforms are generated as sampled digital signals,
digitally upconverted to RF, and then sent to a wideband RSFQ DAC to synthesize the output
Superconductor Microelectronics: A Digital RF Technology for Software Radios 145
Figure 5.11 Coverage range of conventional vs. superconductor receivers
signal. A feedback channel to a digital predistorter is also included to implement various
algorithms to overcome nonlinearities in the HPA transfer function by digitally predistorting
the samples directly at RF. Such functionality could exceed current ASIC capability, while
maintaining the general purpose flexibility of an FPGA architecture.
The analog designer of a bandpass ADC circuit faces two large problems. Number one is
linearity of the down-conversion over a wide frequency and dynamic range. The other is the
matching of the anti-alias low pass filters and digitizers. They must be perfectly matched, or
otherwise digitally compensated, to present a digital I/Q stream that is not subject to ampli-
tude and phase imbalance. The digital RF bandpass receiver does not suffer from these

problems, since a single digitizer is used at RF and down-conversion is accomplished digi-
tally in the complex frequency domain. The band of interest can be effectively segmented into
a variety of formats, providing compatibility with the largest number of traditional baseband
processors.
5.5 Superconductor SDR for Military Applications
5.5.1 Co-Site Interference
Co-site interference (CSI) stems from the simultaneous use of multiple radio protocols/
frequencies/systems in close proximity. Artefacts from one waveform have the tendency to
interfere with the information encoded on another waveform. With the proliferation of radar,
electronic warfare (EW) and communications systems grouped together for deployment, CSI
has become a major issue.
CSI has three main manifestations. First are small signals of interest in the presence of large
interfering signals, e.g. trying to receive a weak spread spectrum signal while transmitting a
strong one. This often blocks the military’s use of CDMA. Another issue is when a small signal
of interest is in the presence of a large number of equal strength signals where multipath
confusion is possible. To counter this, wide guard bands are employed, resulting in fewer
usable channels. There is also an impulsive interference from hopping signals, completely
Software Defined Radio: Enabling Technologies146
Figure 5.12 Notional ‘digital RF’ transceiver implemented in superconductor RSFQ components
preventing support of multiple hoppers on small platforms. The complexity and expense of
analog solutions has meant that CSI must generally be addressed ‘operationally’, with tremen-
dous effort going into the coordination of which systems may be used by whom and when.
Superconductor electronics and the high dynamic range, wideband ADCs and DACs can
overcome these problems by employing brute force fidelity and speed to resolve the issues.
Specifically, one might consider an ultra-linear front end ADC used in concert with an
ultra-fast correlation-based receiver (see Figure 5.13). The effect is to create a matched digital
filter convolving the waveform samples with a known pseudorandom sequence of the desired
signal. Use of many simultaneous protocols is enabled by simply updating the pseudorandom
template in real time. The ability to digitally process signals at .20 GHz allows this simple
yet effective approach.

5.5.2 Digitally Dehopping Spread Spectrum Signals
For low probability of intercept (LPI) communications, military users employ fast frequency
hopping, spread spectrum waveforms.
6
The security of such schemes is demonstrated by the
complexity of the dedicated analog systems needed to access such signals. For example,
systems employing joint tactical information distribution system (JTIDS) terminals for
complex ‘fast hoppers’, such as the Link 16 waveform, have historically been difficult to
integrate with transceivers supporting many other waveforms. For Link 16, hopping occurs
between 51 separate bands, each 3 MHz wide. Present systems use a ‘mode selectable’
hardware approach. The JTIDS bands overlap TACAN bands (at 1030 and 1090 MHz), so
interference with large TACAN signals is often severe. Because TACAN is used for naviga-
tion, it is indispensable, so the use of waveforms such as Link 16 is often sacrificed.
Given a high SFDR receiver, however, the problem can be approached in a radically new
manner. One can use software to ‘digitally dehop’ the Link 16 signal with potentially less
expense and complexity. The Link 16 bandwidth of 255 MHz can be broken up into three
sub-bands, with sharp skirt HTS analog filters of 960–1017.5 MHz (14 subbands of 3 MHz
each), 1042.5–1077.5 MHz (five subbands of 3 MHz each), and 1102.5–1215 MHz (32
subbands of 3 MHz each). Using superconductor electronics, one can directly digitize each
Superconductor Microelectronics: A Digital RF Technology for Software Radios 147
Figure 5.13 Correlation-based digital receiver architecture
6
For information on JTIDS and LINK 16, see Chapter 2 by Bonser in Software Defined Radio: Origins, Drivers
and International Perspectives, Tuttlebee, W. (Ed.), John Wiley & Sons, Chichester, 2002.
band at RF – i.e. no analog mixing. This produces digital I and Q outputs of each of the three
bands or any set of sub-bands, e.g. 16 (4 1 2 1 10) subbands of ~12 MHz each that can be
further processed in software.
5.5.3 Satellite Communications
Currently, narrowband (5 kHz) demand assigned multiple access (DAMA) systems suffer
from poor link margin – about 51 dB of loss. This loss arises from the nonlinearities of the

transponder channel and the other legacy implementations of the shaped offset quadrature
phase shift keyed (SOQPSK) demodulator. The sensitivity of conventional state-of-the-art
technology is about 2125 dBm for a 5 kHz DAMA channel. Using a low noise cryogenic
SQUID-based front end, this sensitivity, and even better, can be achieved with a much wider
5 MHz band.
Many techniques for increasing throughput on all the unused 5 kHz transponders have been
considered; however, none have overcome the problem of TDMA synchronization. The same
is true for 25 kHz channels. A digital RF approach allows the digitization of all the trans-
ponder channels at once, allowing one to sort out the relevant channels after the fact. This can
include multiple channels slaved to a single digital RF uplink, allowing synchronized TDMA
across dedicated channels, without causing interference to legacy terminals on interspersed
channels. The benefit comes from being able to support simultaneous high-fidelity channels,
while preserving the vast majority of the UHF spectrum for the pool of general users. Because
of the possible sensitivity of RSFQ circuits, one can actually reduce the noise floor to its
fundamental limit.
5.5.4 Accommodating New Waveforms
One of the hallmarks of the SDR approach is to exploit the flexibility of a digital system to
build in compatibility for future waveforms. The so-called wideband network waveform
(WNW) of the US Department of Defense is an excellent example of this. A digital RF
transceiver transmitting to another digital RF transceiver would be able to access hop rates
that are not physically attainable with conventional RF up/down converters. Complete denial
of access to the waveform, either to jam or to eavesdrop, is (to all intents and purposes)
impossible without some kind of digital RF technology. While traditional spatial domain
technologies are good for receivers, they are not good for transmitters. Even though algo-
rithms exist to do space-time processing, conjugate aperture, and near real time calibration,
they are extremely computationally expensive. However, RSFQ circuits have the computa-
tional speed to capture the true benefit of such concepts and to exploit the power of adaptive
antenna approaches.
With the fundamental accuracy of RSFQ DACs, the same type of performance can be
employed on the transmit side. Further, because it is digital, this approach also allows the

flexibility to add new algorithms later, as necessary. The potential high fidelity and bandwidth
of RSFQ DACs, along with the sensitivity of RSFQ ADCs, allows one to spread signals over
wide bandwidths and to hide emissions under other signals, but still reconstruct them back at
the receiver. The precision in cycle-to-cycle reproducibility allows a dithering of the spec-
trum to eliminate any indication of periodicity. Although RF fingerprinting is also minimized,
Software Defined Radio: Enabling Technologies148
because of the spectral purity, the spectral control allows for ‘spoofing’ by deliberately
ditching certain waveform characteristics.
5.5.5 Massive Time Multiplexing
Although these previous sections have focused on data converter strengths, it should also be
noted that speed of RSFQ circuits can produce independent multi-TeraOPS back end digital
signal processor products for conventional transceivers. This technique, called massively
time-multiplexed processing, replaces slower, parallel hardware, such as banks of correla-
tors, with fast serial hardware. The hardware re-use in the massively time-multiplexed
processing scheme reduces both capitalization and operational costs. While these super-
conductor back end processor circuits may be used with any front end technology, they offer
even better utilization of resources when used in conjunction with a superconductor front
end.
As mentioned, exotic algorithms, such as adaptive antennas, require a level of computa-
tional horsepower not feasible in traditional semiconductor technologies. Meanwhile, tasks
normally requiring massively parallel processors can be done serially, in real time, using
superconductors.
5.6 Conclusions
The relatively recent transition in thinking, from using the voltage state of a Josephson
junction to using quanta of magnetic flux to represent information bits, has radically trans-
formed the capability limits of superconducting technology. The ability to fabricate practical
devices using existing semiconductor lithographic approaches has already allowed demon-
stration devices to be produced, demonstrating A/D conversion and other functionalities at
multi-GHz frequencies. The advances in reliability of cryocoolers has further meant that
superconducting devices (HTS filters) have begun to be deployed in commercial wireless

networks.
Until recently digital RF devices – A/D conversion and processing at multi-GHz frequen-
cies – were seen as being decades away; suddenly they look possible on a much shorter
timescale. The evolution of this technology, coming as it does at the same time as the
emerging commercial acceptance of the concepts software radio, promises to revolutionize
wireless systems in the coming decades, with initial applications anticipated in the relatively
near future for base station and defense applications.
Acknowledgements
Special thanks to my colleagues who contributed text, figures, and/or assisted with proof-
reading, including Dr. Deepnaryan Gupta, Dr. Oleg A. Mukhanov, Dr. Alan M. Kadin, and
Jack Rosa.
Superconductor Microelectronics: A Digital RF Technology for Software Radios 149
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