Advanced Computer Architecture - Lecture 24: Instruction level parallelism

CS 704
Advanced Computer Architecture

Lecture 24
Instruction Level Parallelism
(Concluding Instruction Level Parallelism)

Prof. Dr. M. Ashraf Chughtai


Today’s Topics
Recap
Compile Time H/W Support:
– To Preserve Exceptions - Typical Examples
– For memory Reference Speculation
Speculation Mechanism: H/W Vs.
S/W
Summary
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

2


Recap: Compile Time H/W Support
Last time we discussed the methods
to provide H/W support for exposing
more parallelism at the compile time

We introduced the concept of
extension in the Instruction set by
including Conditional or predicated
instructions

MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

3


Recap …… Cont’d
We found that such instructions
can be used to eliminate branches
and to convert control
dependence to data dependence
which is relatively simple to
handle
Thus, it improves the processing
performance
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

4

Recap …… Cont’d
We also introduced the hardwareand software-based abilities
required to:
move the speculated instructions
before the branch condition
evaluation while preserving the
exception behavior
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

5


Recap …… Cont’d
We further introduced four methods
to support speculation; and,
move of instruction such that the
mispredicted speculated sequence is
not used in the final execution;
But, the exception behavior is
preserved to take care of the
exceptions that may be used later
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

6


Recap …… Cont’d
However, in order to study these
methods we distinguish between
the exceptions that indicate
program error and:
normally cause termination; or

handle the error to resume
normally
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

7


Recap …… Cont’d
Typical example of the behaviorexception that indicate the
program error and terminates is

memory protection violation
The result of a program that gets

such an exception is not well
defined , therefore …..
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

8


Recap …… Cont’d
….. if such an exception arise

in speculated instructions,
we cannot take the exception,
hence need not preserve such
an instruction

MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

9


Recap …… Cont’d
The example of the behaviorexception that indicates the

program error, which could be
handled and
program normally resumes is
Page Fault in virtual memory
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

10


Recap …… Cont’d
Such exceptions are preserved
and are

processed for speculative
instruction as if they were
normal instructions when the
instruction is no longer
speculative
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

11

Methods to preserve exception behavior
Let us study in details, the methods to
preserve exceptions.
The four methods which we
introduced last time are:
1: Fast mode approach
2: Speculative-instructions method
3: Poison-bit Register method
4: Hardware (Re-order) buffering
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

12


Methods 1: Fast Mode

The simplest approach to preserve
exceptions is one where hardware
works cooperatively with the
operating system and:
handle presumable exceptions
under the program control
This approach is referred to as the
“fast mode” to preserve exceptions
MAC/VU-Advanced

Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

13


Methods 1: Fast Mode

Here, the H/w and S/w preserves
the exception behavior for the
correct program,
but ignores the exception behavior
for the incorrect programs
Before we proceed further, let us
define a correct and an incorrect
program

MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

14


Correct Program

A program may be correct if the
instruction generating the
terminating exception is
speculative; and the speculative
result is simply unused
i.e., the speculative instruction
returns a value that is not harmful
to the program
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

15


Incorrect Program

A incorrect program is one which
previously have received a
terminating exception, and
will get an incorrect result in the
present instruction
Thus, the exception behavior is
mispredicted
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level

Parallelism-Static (5)

16


Fast Mode to preserve exception

Hence, the exception behavior as
a result of speculated instruction
will not be used in the final
computation if mispredicted;
Now let us consider a typical
correct code fragment for the ifthen-else statement of the form:
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

17


Example Code fragment for Fast Mode

If (A==0) A = B;
Else A = A + 4;
And see how this code can be
modified to preserve behavior
exceptions

MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

18


Example Code fragment
Assuming that A is at 0(R3) and B
is at 0(R2); the code based on the
speculation that
the THEN clause is almost always
executed, can be written as
follows:
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

19


Example Code fragment
LD

R1,0(R3)

;load A

BNEZ

R1,L1

;test A

LD

R1,0(R2)

;then clause

J

L2

;skip else

L1: DADDUI

R1,R1,#4

;else clause

L2: SD

R1,0(R3)

;store A

MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

20


Example Code fragment
LD

R1,0(R3)

;load A

BNEZ

R1,L1

;test A

LD

R1,0(R2)

;then clause

J

L2

;skip else

L1: DADDUI R1,R1,#4

;else clause

L2: SD

;store A

MAC/VU-Advanced
Computer Architecture

R1,0(R3)

Lecture 24 – Instruction Level
Parallelism-Static (5)

speculate
that THEN
clause is
almost
always
executed
i.e., program
will rarely

branch to
else clause
21


Example Code fragment
LD

R1,0(R3)

;load A

BNEZ

R1,L1

;test A

LD

R1,0(R2)

;then clause

J

L2

;skip else

L1: DADDUI R1,R1,#4

;else clause

L2: SD

;store A

MAC/VU-Advanced
Computer Architecture

R1,0(R3)

Lecture 24 – Instruction Level
Parallelism-Static (5)

therefore
the value B
at 0(R2)
must be
preserved

22


Revised Code fragment with
Exceptions preserved
Now in order to preserve the
speculation we use a temporary
register – say R14, to avoid

destroying R1 when B is being
loaded as in initial code
MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

23


Revised Code fragment with
Exceptions preserved
LD

R1,0(R3)

;load A

LD

R14,0(R2)

;speculative load B

BEQZ

R1,L3

;other branch of if

DADDUI

R14,R1,#4

;else clause

L3:

SD

R14,0(R3)

;non-speculative
store

L2:

SD

R1,0(R3)

;store A

MAC/VU-Advanced
Computer Architecture

Lecture 24 – Instruction Level
Parallelism-Static (5)

24


Example Code fragment
Here, is a new code that
preserve the speculation in
a temporary register R14, to
avoid destroying R1 when B
is loaded

The speculative
value B at 0(R2) is
preserved in
temporary register
R14 to be used in
THEN clause

LD

R1,0(R3)

;load A

LD

R14,0(R2)

;speculative load B

BEQZ R1,L3

;other branch of IF

DADDUI R14, R1,#4 ;else clause
L3: SD

R14,0(R3)

MAC/VU-Advanced
Computer Architecture

;THEN clause: non-speculative store A
Lecture 24 – Instruction Level
Parallelism-Static (5)

25