Điện tử cơ bản - Công thức tính phân cực tranzitor P1

Chapter 4
BJT BIASING CIRCUIT
Introduction – Biasing
The analysis or design of a transistor amplifier requires knowledge of both the
dc and ac response of the system. In fact, the amplifier increases the strength
of a weak signal by transferring the energy from the applied DC source to the
weak input ac signal The analysis or design of any electronic amplifier therefore
has two components:
•The dc portion and
•The ac portion
During the design stage, the choice of parameters for the required dc levels
will affect the ac response.
What is biasing circuit?
Biasing: Application of dc voltages to establish a fixed level of current and
voltage.
Purpose of the DC biasing circuit
• To turn the device “ON”
• To place it in operation in the region of its characteristic where the device
operates most linearly .
•Proper biasing circuit which it operate in linear region and circuit
have centered Q-point or midpoint biased
•Improper biasing cause Improper biasing cause
•Distortion in the output signal
•Produce limited or clipped at output signal
Important basic relationship
ECB
III= +
C
B
I
I

β
=
( 1)
E BC
I II
β
=+≅
CB CE BE
VVV= −
Operating Point
•Active or Linear Region Operation
Base – Emitter junction is forward biased
Base – Collector junction is reverse biased
Good operating point
•Saturation Region Operation
Base – Emitter junction is forward biased
Base – Collector junction is forward
biased
•Cutoff Region Operation
Base – Emitter junction is reverse biased
BJT
Analysis
DC
analysis
Calculate the DC Q-point
solving input and
output loops
Graphical
Method
AC

analysis
Calculate gains of the
amplifier
DC Biasing Circuits
•Fixed-bias circuit
•Emitter-stabilized bias circuit
•Collector-emitter loop
•Voltage divider bias circuit
•DC bias with voltage feedback
FIXED BIAS CIRCUIT
 This is common emitter (CE)
configuration
 1
st
step: Locate capacitors and
replace them with an open
circuit
 2
nd
step: Locate 2 main loops
which;
 BE loop (input loop)
 CE loop(output loop)
FIXED BIAS CIRCUIT
 1
st
step: Locate capacitors and replace them with an open
circuit
FIXED BIAS CIRCUIT
 2

nd
step: Locate 2 main loops.
1
2
1
2
BE Loop CE Loop
FIXED BIAS CIRCUIT
 BE Loop Analysis
1
■ From KVL;
IB
0
CC B B B
CC BE
B
B
E
VV
I
V
R
V IR−
−
∴=
+ +=
A
FIXED BIAS CIRCUIT
 CE Loop Analysis
■ From KVL;

■ As we known;
■ Substituting with
BC
II
β
=
2
IC
0
CC C C CE
CE CC C C
V IR V
V V IR
−+ + =
∴=−
B
A
B








−
=
B
BECC

DCC
R
VV
I
β
Note that does not affect the value of Ic
C
R
FIXED BIAS CIRCUIT
 DISADVANTAGE
 Unstable – because it is too dependent on β and produce
width change of Q-point
 For improved bias stability , add emitter resistor to dc bias.
Load line analysis
 A fixed bias circuit with given
values of V
CC,RC and RB can be
analyzed ( means,
determining the values of I
BQ,
I
CQ and VCEQ) using the concept
of load line also.
 Here the input loop KVL
equation is not used for the
purpose of analysis, instead,
the output characteristics of
the transistor used in the
given circuit and output loop
KVL equation are made use

of.
DC Load Line
Cutoff Region
Saturation Region
Q-Point
Plot load line equation
IC(sat) occurs when transistor operating in
saturation region
VCE(off) occurs when transistor operating
in cut-off region
CE CC C C
V V IR= −
0=
=
CE
sat
V
C
CC
C
R
V
I
0)( =
−=
C
off I
CCCCCE
RIVV
Circuit Values Affect the Q-Point

Decreasing Vcc
Increasing Rc
Varying
Ib
EMITTER-STABILIZED BIAS CIRCUIT
 An emitter resistor, R
E
is
added to improve stability
 1
st
step: Locate capacitors and
replace them with an open
circuit
 2
nd
step: Locate 2 main loops
which;
 BE loop
 CE loop
Resistor, RE added
EMITTER-STABILIZED BIAS CIRCUIT
 1
st
step: Locate capacitors and replace them with an open
circuit
EMITTER-STABILIZED BIAS CIRCUIT
 2
nd
step: Locate 2 main loops.

1
2
2
BE Loop
CE Loop
1
EMITTER-STABILIZED BIAS CIRCUIT
 BE Loop Analysis
■ From kvl;
Recall;
Substitute for I
E
0
CC B B BE E E
V IR V IR−+ + + =
( 1) 0
( 1)
CC BB BE BE
CC BE
B
BE
V IR V IR
VV
I
RR
β
β
− + + ++ =
−
∴=

++
BE
II )1( +=
β
1
EMITTER-STABILIZED BIAS CIRCUIT
 CE Loop Analysis
■ From KVL;
■ Assume;
■ Therefore;
CE
II ≈
0
CC C C CE E E
V IR V IR−+ ++ =
2
)(
ECCCCCE
RRIVV +−=∴
Improved Bias Stability
The addition of the emitter resistor to the dc bias of the BJT provides improved
stability, that is, the dc bias currents and voltages remain closer to where they
were set by the circuit when outside conditions, such as temperature, and
transistor beta, change.
( 1)
CC BE
c
BE
VV
I

RR
β
β

−
=

++

Without Re
With Re
CC BE
c
B
VV
I
R
β

−
=


Note :it seems that beta in numerator canceled with beta in
denominator
VOLTAGE DIVIDER BIAS CIRCUIT
 Provides good Q-point stability with a single polarity supply voltage
 This is the biasing circuit wherein, ICQ and VCEQ are almost independent of
beta.
 The level of IBQ will change with beta so as to maintain the values of ICQ and

VCEQ almost same, thus maintaining the stability of Q point.
 Two methods of analyzing a voltage divider bias circuit are:
 Exact method : can be applied to any voltage divider circuit
 Approximate method : direct method, saves time and energy,
 1
st
step: Locate capacitors and replace them with an open circuit
 2
nd
step: Simplified circuit using Thevenin Theorem
 3
rd
step: Locate 2 main loops which;
 BE loop
 CE loop
VOLTAGE DIVIDER BIAS CIRCUIT
Simplified Circuit
Thevenin Theorem;
■ 2
nd
step: : Simplified circuit using Thevenin Theorem
21
21
21
//
RR
RR
RRR
TH
+

×
==
CCTH
V
RR
R
V
21
2
+
=
From Thevenin Theorem;
VOLTAGE DIVIDER BIAS CIRCUIT
 2
nd
step: Locate 2 main loops.
1
2
BE Loop
CE Loop
1
2
VOLTAGE DIVIDER BIAS CIRCUIT
 BE Loop Analysis
■ From KVL;
Recall;
Substitute for I
E
0
TH B TH BE E E

V IR V IR−+ + + =
( 1) 0
( 1)
TH B TH BE B E
TH BE
B
RTH E
V IR V IR
VV
I
RR
β
β
− + + ++ =
−
∴=
++
BE
II )1( +=
β
1
VOLTAGE DIVIDER BIAS CIRCUIT
 CE Loop Analysis
■ From KVL;
■ Assume;
■ Therefore;
CE
II ≈
0
CC C C CE E E

V IR V IR−+ ++ =
)(
ECCCCCE
RRIVV +−=∴
2