Innovative design and realization of microwave and millimeter wave integrated circuits

INNOVATIVE DESIGN AND REALIZATION OF MICROWAVE
AND MILLIMETER-WAVE INTEGRATED CIRCUITS
CHEN YING
(B.Eng., Nanyang Technological University, Singapore)
A THESIS SUBMITTED
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
NATIONAL UNIVERSITY OF SINGAPORE
2011
ACKNOWLEDGEMENTS
The work described in this thesis could not have been accomplished without
the help and support of many individuals.
First and foremost, I owe my deepest gratitud e to my supervisor , Assistant Pro-
fessor Koen Mouthaan, for his guidance and continued encouragement throughout
my PhD study. I still remember on my first day, he said he would like to be treated
as a colleague and friend, so that we can have open discussions on any problems en-
countered dur ing the research and even challenge each other’s opinions. His unique
way of supervision has encouraged my independent and ou t - of- t h e- box thinking
that has been inspiring me to explore innovative solutions for challenging research
topics. Prof. Koen has always stressed the importanc e of practical solut i ons and
experimental verifications, which are extremely crucial for engineering oriented re-
search. I am especially grateful for his time and effort in weekly meetings and
his help to overcome difficulties using his rich technical knowledge and experience
whenever I got stuck. I have also benefited from his training in many other aspects,
such as technical writing, anal y t ica l thinking, English language, and so on. All of
these have been beneficial both to my academic progress and personal growth.
I sincerely appreciate my mentor, Marcel Geurts, during my one-year research
internship in NXP Semiconductor s, Nijmegen, The Netherlands. Without him, my
internship would not have been possible. He ha s made available his support in a
number of ways. For example, he has set up an excellent platform, both so ftware
and hardware, in order for me to work on a very challenging research project

that has a potential industry impact. He has al so encouraged me to explore an d
ii
implement good new ideas in the project. And I would like to thank h im for his
many constr uctive technical advices d uring my internship. Besides, I am also very
grateful for his consistent help an d care, both materially and emotionally, du r ing
my internship in The Netherlands.
My gratitude is extended to all the colleagu es in NXP Semiconductors during
my internship. I would like to specially thank Louis Praamsma, Johan Janssen,
Dr. Marek Schmidt-Szalowski, Dr. Koen van Caekenb er ghe, Hasan Gul, Rainier
Breunisse, and Fanfan Meng from the High Performance RF gr ou p at NXP Ni-
jmegen, for lots of insi ghtful technical discussions and support in the measurements
during the project. I am also grateful for the several critical design reviews by Dr.
Domine Leenaerts, Dr. Jos Bergervoet, and Edwin van der Heijden from the RF
Advanced Development Team at NXP Eindhoven. They are all experts in their
fields, and I learned a lot from them.
I appr eci at e the friendly interactions with Dr. Fujiang Lin, Dr. Kai Kang, and
Dr. James Brinkho ff from the Integrated Circuit and System Lab in the Institute
of Micro el ect r o n i cs, Singapore. Many useful discussions with t h em have been of
great benefit to my research work.
I am also thankful to all the members fr om th e MMIC Lab of the National
University of Singapore. I feel fortunate to have worked with them in a stimu-
lating and enjoyable research environment. Those experiences are my cherished
memories.
My warmest thanks belong to my dear wife for her enormous support through-
out my PhD study and for bringing our lovely baby son into the world.
Last but not the l eas t , I wish to thank my parents for bringing me up and for
their for ever love. I have been learning from them to be a responsible, optimist i c
and self-motivated person.
iii
TABLE OF CONTENTS

Chapter 1 : I ntroducti on 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Design Challenges in Microwave and Millimeter-Wave ICs . . . . . . 2
1.2.1 Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.2 Circuit Topologies . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.3 System Architectures . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Overview of Building Blocks . . . . . . . . . . . . . . . . . . . . . . 7
1.3.1 Low Noise Amplifier (LNA) . . . . . . . . . . . . . . . . . . 7
1.3.2 Power Amplifier (PA) . . . . . . . . . . . . . . . . . . . . . . 9
1.3.3 Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.3.4 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.3.5 Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1.4 Motivation, Scope and Thesis Organization . . . . . . . . . . . . . . 25
1.5 List of Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Chapter 2 : Parasitic Cancellati on Technique for Colpitts Oscillators 30
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.2 Conventional Colpitts Oscillators . . . . . . . . . . . . . . . . . . . 31
2.2.1 Negative Resistance . . . . . . . . . . . . . . . . . . . . . . . 32
2.2.2 High Frequency Limitations . . . . . . . . . . . . . . . . . . 32
2.2.3 Miller Effect of C
gd
on Negative Resistance . . . . . . . . . . 3 3
2.3 Parasitic Cancellation Technique . . . . . . . . . . . . . . . . . . . 37
iv
2.3.1 Description of Parasitic Cancellation Technique . . . . . . . 37
2.3.2 Input Impedance . . . . . . . . . . . . . . . . . . . . . . . . 3 8
2.3.3 Frequency Tuning Range . . . . . . . . . . . . . . . . . . . . 41
2.3.4 Q-factor of the Inductor L
gd
. . . . . . . . . . . . . . . . . . 42

2.3.5 Phase Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.3.6 Parasitic Cancellation Flexibility . . . . . . . . . . . . . . . 45
2.3.7 Increasing the Maximum Operating Frequen cy . . . . . . . . 46
2.3.8 Large-Signal Regime and Uncertai nty in the Miller Capaci-
tance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
2.4 Discrete Design Verification . . . . . . . . . . . . . . . . . . . . . . 50
2.4.1 Oscillator Designs . . . . . . . . . . . . . . . . . . . . . . . . 50
2.4.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . 55
2.5 MMIC Proof of Concept . . . . . . . . . . . . . . . . . . . . . . . . 57
2.5.1 X-Band and Ka-Band Colpitts Oscill at or Designs . . . . . . 57
2.5.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . 60
2.5.3 Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
2.6 Application to Dual-Band Colpitts VCO Design . . . . . . . . . . . 68
2.6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
2.6.2 Dual-Band Colpitts VCO by Switched Negative Resistance
Shaping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
2.6.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . 75
2.6.4 Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
2.7 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Chapter 3 : Varactorless Frequency-Tuning Technique for Wideband
LC VCOs 79
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
3.2 Wideband Varactorless VCO Using a Tunable NI Cell . . . . . . . . 80
v
3.2.1 Principle of Tunable NI Cell . . . . . . . . . . . . . . . . . . 80
3.2.2 Start-Up Condition and Frequency-Tun i n g Anal ys is . . . . . 82
3.2.3 Effect of Tr ansistor Parasitics and Output Capacitan ce of
Current Sources . . . . . . . . . . . . . . . . . . . . . . . . . 85
3.2.4 Effect of Degeneration Inductor’s Q-factor . . . . . . . . . . 87
3.2.5 Large-Signal Behavior . . . . . . . . . . . . . . . . . . . . . 87

3.2.6 VCO Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
3.2.7 Experimental Results . . . . . . . . . . . . . . . . . . . . . . 93
3.2.8 Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
3.3 Wideband Varactorless VCO with Constant Output Power Using
Tunable NI and NC Cells . . . . . . . . . . . . . . . . . . . . . . . . 101
3.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
3.3.2 Principle of a tunable NC cell . . . . . . . . . . . . . . . . . 102
3.3.3 Combining Tunable NI and NC Cells to Achieve Constant
Output Power . . . . . . . . . . . . . . . . . . . . . . . . . . 104
3.3.4 VCO Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
3.3.5 Experimental Results . . . . . . . . . . . . . . . . . . . . . . 108
3.3.6 Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
3.4 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Chapter 4 : Highly-Linear Up-Conversion Mixer with Ultra-Low LO
Feedthrough 114
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
4.2 Proposed Up-Conversion Mixer . . . . . . . . . . . . . . . . . . . . 116
4.2.1 Topology Considerations . . . . . . . . . . . . . . . . . . . . 116
4.2.2 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . 118
4.3 Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 119
4.3.1 Output Linearity . . . . . . . . . . . . . . . . . . . . . . . . 119
vi
4.3.2 LO Feedthrough . . . . . . . . . . . . . . . . . . . . . . . . 121
4.3.3 Output Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . 132
4.4 Design Implementation . . . . . . . . . . . . . . . . . . . . . . . . . 133
4.5 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 134
4.6 Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
4.6.1 Performance Comparison . . . . . . . . . . . . . . . . . . . . 138
4.6.2 Across-Wafer Spread . . . . . . . . . . . . . . . . . . . . . . 140
4.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

Chapter 5 : Conclusi ons and Recommendations 143
5.1 Parasitic Cancellation Technique for Colpitts Oscillators . . . . . . 143
5.2 Varactorless Frequency-Tuning Technique for Wideband LC VCOs 14 5
5.3 Highly-Linear Up-Conversion Mixer with Ultra-Low LO Feedthrough146
BIBLIOGRAPHY 148
vii
Summary
The current trend in wireless communication systems is towards higher operating
frequencies with wider bandwidth. However, the higher operating frequencies lead
to numerous design challenges in microwave a n d millimeter-wave ICs that are not
present or not significant at lower frequencies. This thesis aims to propose and
realize innovative circuit topologies and techniques in order to overcome design
challenges in key building blocks of microwave and millimeter-wave front-end ICs.
In order to overcome the start- u p problem for microwave and millimeter-wave Col-
pitts oscillators, a parasitic cancellation technique is proposed. By cancelling the
parasitic gate-drain or base-collector capacitance of the transistor using an induc-
tor, the negative resistance, and hence, the maximum operating frequency of t he
microwave and millimeter-wave Colpitts oscillators are increased. The feasibility
of the technique is first demonstrated in a discrete design as a proof of concept.
Then, the MMIC p r oof of concept is shown using three Colpitts oscillator designs,
one at X-band and two at Ka-band, in a 0. 2- µm GaAs pHEMT technology with
a f
T
of 60 GHz. An extended appl i cat i on of t he parasitic cancellation technique
is also introduced, which allows dual-band Colpitts VCO desi g n using switched
negative resistance shaping.
In order to overcome the tuning limitations of conventional varact or - b ase d VCOs,
a new varactorless tuning technique suitable for microwave and millimeter-wave
applications is proposed. The oscillation frequency is tuned using tunable negative-
inductance (NI) and tunable negative-capacitance (NC) cells. Two wideband var-

actorless VCOs, implemented in a 0.35-µm SiGe BiCMOS process, are presented.
A highly-linear up-conversion Gilbert mixer with ultra-low LOFT for Ka-band
viii
VSAT applications is also presented. An individu a l biasing technique has been
proposed to red u c e the LOFT due to device mismatch. In addition, a met hod is
proposed to compensate the EM-related LOFT. NXP’s QUBIC4X 0. 25 - µm SiGe:C
BiCMOS technology is used for the implementation. The proposed up-conversion
mixer can be used as a mixer cell to form the fully integrated image-reject single-
sideband (SSB) up-converter with single-conversion low-IF architecture.
ix
LIST OF TABLES
1.1 Technology requirements for RF/analog mixed-signal CMOS, bipo-
lar, and on-chip passives. . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Component Values for Discrete Oscillator Design Verificatio n s . . . 53
2.2 Measured Oscillator Performance Summary For Discrete Design Ver-
ification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
2.3 Performance Summary and Co m p ar i son of the Oscillators at X- Ba n d 65
2.4 Performance Summary and Comparison of the Oscill at or s from K-
Band to Ka-Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
2.5 Component Values of the Dual-Band Colpitts VCO . . . . . . . . . 73
2.6 Performance Summary of the Dual-Band Colpitt s VCO . . . . . . . 77
3.1 Performance Comparison with both Varactorless and Varactor-Based
Wideband LC VCOs . . . . . . . . . . . . . . . . . . . . . . . . . . 97
3.2 Performance Summary of the Varactorless VCO with the Tunable
NI and NC Cells . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
4.1 Summary of LOFT Cancellations . . . . . . . . . . . . . . . . . . . 127
4.2 Performance Summary and Comparison of the Up-Conversion Mix-
ers in a Similar Frequency Range. . . . . . . . . . . . . . . . . . . . 140
4.3 Probing Repeatability Test for LOFT. . . . . . . . . . . . . . . . . 140
x

LIST OF FIGURES
1.1 Wireless ap p l i cat i on roadmap for cellular, WLAN, and high speed
wireless short links (after [1]). . . . . . . . . . . . . . . . . . . . . . 1
1.2 Wireless communication application spectrum (after [2]). . . . . . . 2
1.3 System architectures for microwave and millimeter-wave transceiver
front-end (a) low-IF with once down-conversion [3], (b) low-IF with
twice down-conversions [3], (c) direct conversion [3], (d) direct con -
version with LO doubler [3], (e) twice down-conversions with f
OSC
=
f
RF
/2 [4], and (f) twice down-conversions with f
OSC
= 2×f
RF
/3 [5]. 6
1.4 Inductive degenerated LNA. . . . . . . . . . . . . . . . . . . . . . . 8
1.5 Generalized PA model. . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.6 Drain voltage and cur r ent waveforms for different classes of PAs:
(a) Class A, (b) Class B, (c) Class C, (d) Class D . . . . . . . . . . 10
1.7 Generalized mixer topologies: (a) passive switching mixer, (b) po-
tentiometric mixer, (c) Gilbert mixer. . . . . . . . . . . . . . . . . . 13
1.8 Graphical illustration of linearity parameters. . . . . . . . . . . . . 15
1.9 Image rejection architectures: (a) Hartley, (b) Weaver. . . . . . . . 17
1.10 Generalized LC oscillat or topologies: (a) Colpitts oscillator, (b)
Hartley oscillator, (c) cross-coupled pair oscillator, (d) series feed -
back oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
1.11 Phase noise spectrum based on Leeson’s model. . . . . . . . . . . . 22
1.12 Chebyshev bandpass filter (a ) using lumped LC elements, (b) using

coupled transmission line. . . . . . . . . . . . . . . . . . . . . . . . 24
xi
2.1 Conventional common drain Colpitts oscillat or with drain inductor. 31
2.2 Circuit for derivation of th e input impedance of conventional com-
mon drain Colpitts oscillator with negl i gi b l e C
gd
and C
gs
. . . . . . . 32
2.3 (a) Circuit for derivation of generalized equivalent impedance Z
M
due to Z
gd
, (b) Equivalent circuits seen at the input considering C
gd
. 34
2.4 (a) R
M
versus L
d
, (b) C
M
versus L
d
for different values of C
1
and C
2
. 36
2.5 Simulated input impedance Z

in
versus L
d
of conventional Colpitts
oscillator at 10 G Hz: (a) input resistance R
in
, (b ) input reactance
X
in
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.6 Modified common drain Colpitts oscillator with the parasitic can -
cellation technique. . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.7 Comparison at 10 GHz of the simulated input resistance R
in
versus
C
1
and C
2
for L
d
= 1 nH. . . . . . . . . . . . . . . . . . . . . . . . 39
2.8 Simulated in p u t impedance Z
in
versus frequency of modified Col-
pitts oscillator with ideal inductors: (a) input resistance R
in
, (b)
input reactance X
in

. . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.9 (a) Cir cu i t for derivation of equivalent impedance Z
M
with parasitic
cancellation. (b) Simulated R
M
and X
M
versus frequency for C
1
=
C
2
= 0.3 pF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2.10 Series to parallel transformation of the cancellation resonator. . . . 42
2.11 Simulated input impedance Z
in
versus frequency of modified Col-
pitts oscillator with Q
Lgd
= 5: (a) input resistance R
in
and (b) input
reactance X
in
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.12 (a) Equivalent circuit of the resona nt tank (b) Simulated R
M
versus
L

d
with and without parasitic cancellation . . . . . . . . . . . . . . . 44
2.13 Mod i fi ed common drai n Colpitts osc il l at or with th e improved para-
sitic cancellation flexibility. . . . . . . . . . . . . . . . . . . . . . . . 46
xii
2.14 Comparisons for the simulated maximum operating frequency and
normalized phase noise with and without the parasitic cancellation
at power consumptions of 7.5, 10, and 15 mW. . . . . . . . . . . . . 47
2.15 Large-signal input resistance simulation: (a) simulation setup (b)
comparison of the simulated large-signal input resistance at 27 GHz. 49
2.16 Simulated input resistance at 27 GHz as a function of C
bc
for V
P P,base
=
100 mV and V
P P,base
= 1000 mV. . . . . . . . . . . . . . . . . . . . 50
2.17 Schematic for discrete design verifications: (a) conventional Colpitts
without parasitic cancellation (b) modified Colpitts with parasitic
cancellation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
2.18 Comparison of the simulated input resistance at 40 0 MHz for the
three discrete oscillator designs. . . . . . . . . . . . . . . . . . . . . 54
2.19 Simulated load pulling effect for (a) VSWR=1.2, (b) VSWR=1.5. . 54
2.20 Photograph of a fabricated descrete Colpitts oscillator. . . . . . . . 55
2.21 Measured RF output power versus test resistance for the three dis-
crete oscillators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.22 Measured single-sideband phase noise for the three discrete oscillators. 56
2.23 Simulated input resistance R
in

and reactance X
in
versus frequency:
(a) X-band desi gn, (b) Ka-band design, (c) Ka-band (flexible) design. 59
2.24 Micrographs of the fabricated MMIC Colpitts oscillators: (a) X-
band design, (b) Ka-band design, (c) Ka-band (flexible) design. . . 61
2.25 Measured output spectrum after calibrating the cable l oss es for the
MMIC Colp it t s oscillators: (a) X-band design, (b) Ka-band design,
(c) Ka-band (flexible) design. . . . . . . . . . . . . . . . . . . . . . 62
2.26 Measured phase noise for the MMIC Colpitts oscillators. . . . . . . 62
2.27 Simulated oscillation frequency versus tuning voltage for the three
MMIC designs with parasitic cancellation technique. . . . . . . . . . 67
xiii
2.28 Proposed dual-band common collector Colpitts VCO with the switch-
able negative resistance shaping resonator. . . . . . . . . . . . . . . 69
2.29 Simulated input resistance R
in
and input reactance X
in
with and
without the shaping resonator. . . . . . . . . . . . . . . . . . . . . . 70
2.30 Simulated input resistance R
in
with the shaping resonator: (a)
L
sh
= 15 nH and C
sh
= 10 pF for di ffer ent L
c

, (b) L
c
= 24 nH
for different combination of C
sh
and L
sh
with the same f
sh
. . . . . . 71
2.31 Simulated reactan ce X
r
of t h e dual-m ode input resonator for V
tune
from 0 V to 3 V with steps of 0.5 V. . . . . . . . . . . . . . . . . . 73
2.32 Simulated input impedance of the du a l- b a n d Colpitts VCO: (a) R
in
versus frequency, (b) X
in
versus frequency. . . . . . . . . . . . . . . 75
2.33 Measured and simulated frequency tuning characteristics. . . . . . . 75
2.34 Measured p h a se noi se at 100 kHz offset and out p ut power versus
tuning voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
2.35 Measured oscillation harmonic levels. . . . . . . . . . . . . . . . . . 76
3.1 Principle of the tunable NI cell. . . . . . . . . . . . . . . . . . . . . 81
3.2 L
p,NI
and R
p,NI
versus the transconductance g

m
of the tunable NI
cell for different L
deg
. . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.3 Simplified equivalent circuit for the analysis of the oscillator’s start-
up condition and frequency tuning. . . . . . . . . . . . . . . . . . . 83
3.4 Simulated frequency-tuning characteristics for various L
deg
. . . . . . 85
3.5 Negative-impedance cell with non-ideal transistor s. . . . . . . . . . 86
3.6 R
p,NI
and L
p,NI
versus the transconductance g
m
of the tunable NI
cell with L
deg
= 2 nH for different Q-factors of L
deg
. . . . . . . . . . 87
3.7 Simulated large-signal behavior for L
p,NI
of the tunable NI cell with
(a) emitter area = 4 µm
2
and L
deg

= 1 nH, (b) emitter area = 4 µm
2
and L
deg
= 2 nH, (c) emitter area = 8 µm
2
and L
deg
= 1 nH. . . . . 88
xiv
3.8 Simulated large-signal behavior for R
p,NI
of the tunable NI cell with
emitter area = 4 µm
2
and L
deg
= 1 nH. . . . . . . . . . . . . . . . . 89
3.9 Circuit diagram of the varactorless VCO with the tunable NI cell. . 90
3.10 Simplified equivalent circuit for the parallel resonant tank of the
varactorless VCO design with the tunable NI cell. . . . . . . . . . . 92
3.11 Simulated R
−1
p,NI
and (R
neg
 R
p,NI
)
−1

versus tuning voltage of th e
varactorless VCO design with the tunable NI cell. . . . . . . . . . . 92
3.12 Micrograph of the fabricated varactorless VCO with the tunable NI
cell. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
3.13 Photograph of the test b o ar d of varactorless VCO wit h the tunable
NI cell. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
3.14 Measured and simulated frequency-tuning characteristics for the
varactorless VCO with the tunable NI cell. . . . . . . . . . . . . . . 94
3.15 Measured phase noise at 1 MHz offset versus tunin g voltage for the
varactorless VCO with the tunable NI cell. . . . . . . . . . . . . . . 94
3.16 Measured phase noise at 5.2 GHz for the var a ct or l ess VCO with the
tunable NI cell. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
3.17 Measured output power versus tuning voltage for the varactorless
VCO with the tunable NI cell. . . . . . . . . . . . . . . . . . . . . . 95
3.18 Simulated phase noise contribution for the varactorless VCO with
the tunable NI cell. . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
3.19 Capacitive loading for the conventional varactor tuning together
with a binary switched capacitor array. . . . . . . . . . . . . . . . . 100
3.20 Principle of the tunable NC cell. . . . . . . . . . . . . . . . . . . . . 102
3.21 C
p,NC
and R
p,NC
versus the transconductance g
m
of the tunable NC
cell for different C
deg
. . . . . . . . . . . . . . . . . . . . . . . . . . . 102
3.22 Combining the tunable NI and NC cells. . . . . . . . . . . . . . . . 103

xv
3.23 Large-signal simulations for different tuning currents: (a) R
p,NI
for
the NI cell, (b) R
p,NC
for the NC cell, (c) L
p,NI
for the NI cell, (d)
C
p,NC
for the NC cell. . . . . . . . . . . . . . . . . . . . . . . . . . 104
3.24 (a) Circuit diagram of the varactorless VCO with the tunable NI
and NC cells. (b ) Linearized voltage-to-current converter for the
tuning of I
NI
and I
NC
. . . . . . . . . . . . . . . . . . . . . . . . . . 106
3.25 Simplified equivalent circuit of the parallel resonant tank for the
varactorless VCO with the tunable NI and NC cells. . . . . . . . . . 107
3.26 Micrograph of the fabricated varactorless VCO with the tunable NI
and NC cells. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
3.27 Photograph of the test b o ar d of varactorless VCO wit h the tunable
NI and NC cells. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
3.28 Measured and simulated frequency tuning characteristics for the
varactorless VCO with the tunable NI and NC cells. . . . . . . . . . 109
3.29 Measured phase noise at 1 MHz offset for the varactorless VCO with
the tunable NI and NC cells. . . . . . . . . . . . . . . . . . . . . . . 110
3.30 Measured phase noise at 1.83 GHz for the varactorless VCO with

the tunable NI and NC cells. . . . . . . . . . . . . . . . . . . . . . . 110
3.31 Measured output power versus tuning voltage for the varactorless
VCO with the tunable NI and NC cells. . . . . . . . . . . . . . . . . 111
3.32 Simulated phase noise contribution for the varactorless VCO with
the tunable NI and NC cells. . . . . . . . . . . . . . . . . . . . . . . 112
4.1 Circuit diagram of the proposed up-conversion mixer core. . . . . . 119
4.2 Equivalent circuit for half of the load impedance at the RF
+
node. . 120
xvi
4.3 Mean value of LOFT suppression (LOFT
µ
) and RF output power
(P
RF
) obtained through Monte Car lo simulations for ( a) I
c
varied
from 200 µA to 400 µA with L
c
=1.3 nH, (b) L
c
varied from 1.1 nH
to 1.3 nH with I
c
=300 µA. . . . . . . . . . . . . . . . . . . . . . . . 124
4.4 Standard deviation of LOFT suppression (LOFT
σ
) obta ined through
Monte Carlo simulations for (a) I

c
varied from 200 µA to 400 µA
with L
c
=1.3 nH, (b ) L
c
varied from 1.1 nH to 1.3 nH with I
c
=300
µA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
4.5 Histogram obtained t h r o u gh Monte Carlo simulations with I
c
=300
µA and L
c
=1.25 nH. . . . . . . . . . . . . . . . . . . . . . . . . . . 125
4.6 On-wafer signal probe with GSSG configuration. . . . . . . . . . . . 129
4.7 Illustration of three scenarios of LOFT cancellation, where i
o3
−i
o6
,
i
o+
, i
o−
, and i
o
denote the cur r ents in vector form at the LO fre-
quency (a) complete primary cancellation, (b) incomplete primary

cancellation and incomplete secondary cancellation, (c) incomplete
primary cancellation and complete secon d ar y ca n cel l at i on. . . . . . 130
4.8 Illustration of EM-related LOFT compensation by deliberately ap-
plying certain amplitude and phase imbalances to the LO input. . . 131
4.9 Output buffer topologies (a) MO S input transistors, (b) HBT input
transisors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
4.10 Imp edance matching for (a) IF port, (b) LO port. . . . . . . . . . . 134
4.11 Measurement setup for the on-wafer chip testing. . . . . . . . . . . 135
4.12 Micrograph of the fabricated up-conversion mixer. . . . . . . . . . . 135
4.13 Measured output spectrum of the u p - conversion mixer with the
optimally-tuned LOFT. . . . . . . . . . . . . . . . . . . . . . . . . . 136
4.14 Measured and simulated LOFT by tuning (a) LO phase imbalance,
(b) LO amplitude imbalance. . . . . . . . . . . . . . . . . . . . . . 136
xvii
4.15 Measured and simulated frequency response of the RF output power.137
4.16 Measured linearity plot of the up-conversion mixer. . . . . . . . . . 138
4.17 Illustration of the relationship between LOFT suppression and out-
put linearity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
4.18 Comparison of the LOFT
norm
of the proposed up-conversion mixer
with other previously published up- co nversion mixers. . . . . . . . . 139
4.19 Measured across-wafer spread of LOFT with LO phase imbalance
of −15
o
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
xviii
LIST OF ABBREVIATIONS
f
T

transistor cut-off frequency
P
RF
RF output power
Q-factor quality factor
ADS Advanced Design System
AC Alternating Current
BiCMOS Bipolar with Complementary Metal-Oxide-Semiconductor
CMOS Complementary Metal-Oxide-Semicond u ct or
CPW Coplanar waveguide
DC Direct Current
EM electromagnetic
ESD Electrostatic discharge
FCC Federal Communications Commission
FET Field-Effect Transist or
FOM Figure of Merit
FTR Frequency Tuning Range
GSGSG Ground-Signal-Ground-Signal-Ground
GSSG Ground-Signal-Signal-Groun d
HBT Heterojunction Bipolar Transistor
IC Integrated Circuit
IF Intermediate Frequency
IIP3 input 3
rd
order intercept point
IMD Intermodulati on Distortion
IMD3 3
rd
order intermodulation distortion
xix

IP1dB input 1 dB compression point
IP3 3
rd
order intercept point
IRR Image Rejection Ratio
KCL Kirchhoff’s Current Law
KVL Kirchhoff’s Voltage Law
LC inductor and capacitor
LNA Low Noise Amplifier
LO Local Oscillator
LOFT LO feedthrough
LOFT
µ
mean value of LO feedthrough suppression
LOFT
σ
standard deviation of LO feedthrough suppression
LOFT
norm
normalized LO feedthrough
MIM Metal-Insulator-Metal
MMIC Monolithic Microwave Integrated Circuit
MOSFET Metal-Oxide-Semiconductor Field-Effect Tr an si st o r
NC Negative Capacitance
NF Noise Figure
NI Negative Inductance
NMOS N-type Metal-Oxide-Semiconductor
OIP3 output 3
rd
order intercept point

OP1dB output 1 dB compression point
pHEMT pseudomorphic High Electron Mobility Transistor
P1dB 1 dB compression point
PA Power Amplifier
PB P+ base polysilicon
PLL Phase-Locked Loop
PMOS P-type Metal-Oxid e- S em i conductor
xx
Q-factor Quality-factor
RFC Radio Frequency Choke
RFIC Radio-Frequency Integrated Circuit
SAW Surface Acoustic Wave
SNR Signal-to-Noise Ratio
SoC System-on -Ch i p
spurs spurious
SSB Single Sideband
VCO Voltage-controlled oscillator
VSAT Very Small Apert ure Terminal
VSWR Voltage Standing Wave Ratio
xxi
CHAPTER 1
Introduction
1.1 Background
Radio-frequency integrated circuits (RFICs) are now essential and critical in both
mobile and fixed wireless communication system s, such as cell u l ar , WLAN, and
high speed wireless short links. The wireless a p p l i cat i on roadmap in Fig. 1.1 shows
that the current trend is towards achieving higher data rates. Due to the rapid
growth of commercial interest in the microwave and millimeter-wave spectrum
Figure 1.1: Wireless application roadmap for cellular, WLAN, and high speed
wireless short links (after [1]).

1
GSM
CDMA
ISM
PDC
GPS
SAT
Radio
DCS
PCS
DECT
CDMA
WLAN
802.11b/g
HomeRF
Bluetooth
SAT
TV
WLAN
802.11a
SAT TV
WLAN
Hyperlink
UWB
LMDS
WLAN
AUTO
RADAR
All Weather
Landing;

Imaging
0.8 GHz 2 GHz 5 GHz 10 GHz 28 GHz 77 GHz 94 GHz
InP - HBT, HEMT GaAs MHEMT
GaAs - HBT, PHEMT
GaN -HEMT
SiGe - HBT, BiCMOS
Si - RF CMOS
SiC - MESFET
Si-LDMOS
0.8 GHz 2 GHz 5 GHz 10 GHz 28 GHz 77 GHz 94 GHz
InP - HBT, HEMT GaAs MHEMT
GaAs - HBT, PHEMT
GaN -HEMT
SiGe - HBT, BiCMOS
Si - RF CMOS
SiC - MESFET
ITRS Roadmap 2007
ITRS Roadmap 2005
Figure 1.2: Wireless communication application spectrum (after [2]).
over the past decade, the operating frequencies of RFICs have also been driven
into microwave and millime t er -wave regions. Applications include, for example,
very small aperture terminal (VSAT) satellite communications at X-band and
Ka-band, automotive radar at 24 GHz and 77 GHz and unlicensed shor t range
wireless communication at 60 GHz. Fig. 1.2 illustrates the frequency spectrum
allocation for various wireless applications.
1.2 Design Challenges in Microwave and Millimeter-Wave ICs
The higher operatin g frequencies of wireless applications lead to a lot of design
challenges in microwave and millimeter-wave ICs that are not present or not signifi-
cant at lower frequencies. These include challenges in developing new technologies,
circuit topologies and system architectures.

1.2.1 Technologies
In order to achieve good performanc e, most RFICs in the lower frequency spec-
trum are designed in technologies with transistor cut-off frequencies (f
T
) at least
8∼10 times greater than the system operating frequency. However, due to process
2
Table 1. 1: Technology requirements for RF/analog mixed-signal CMOS, bipolar,
and on-chip passives.
Year of Production
2009
2010
2011
2012
2013
2014
2015
RF/Analog Mixed-
Signal CMOS
Supply voltage (V)
1.1
1.1
1.07
1
1
1
1
Gate length (nm)
38
32

29
27
22
18
17
1/f-noise (μV
2
·μm
2
/Hz)
100
90
80
70
60
50
50
Peak f
T
(GHz)
240
280
310
340
400
480
520
NF
min
(dB) @ 5GHz

0.2
<0.2
<0.2
<0.2
<0.2
<0.2
<0.2
RF/Analog Mixed-
Signal Bipolar
Emitter width (nm)
130
120
110
105
95
90
85
Peak f
T
(GHz)
265
285
305
325
345
365
385
Max. Available Gain
(dB) @ 60GHz
12.0

12.9
13.6
14.3
15.0
15.6
16.1
Max. Available Gain
(dB) @ 94GHz
8.0
8.9
9.6
10.3
11.0
11.6
12.1
NF
min
(dB) @ 60GHz
2.5
2.0
1.6
1.3
1.1
0.9
0.8
Metal-Insulator-
Metal Capacitor
Density (fF/μm
2
)

5
5
5
5
7
7
7
Q (5GHz for 1pF)
>50
>50
>50
>50
>50
>50
>50
Inductor
Q (5GHz, 1nH)
25
25
30
35
40
42
44
MOS Varactor
C
max
/C
min
ratio

>5.5
>5.5
>5.5
>5.5
>5.5
>5.5
>5.5
Q (5GHz, 0V)
40
45
45
50
50
50
55
limitations, many microwave and millimeter-wave ICs can only be designed with
an f
T
that is 2∼5 times greater than the system operatin g frequency, which poses
much bigger design challenges.
Over the past several d ecades, III-V technologies, such as GaAs or InP, have
traditionally dominated the microwave an d millimeter-wave spectrum, due to their
low loss semi-insulated substrates and high f
T
. Today, however, with the continu-
ous down scaling of transistor’s feature size towards submicrometer, the f
T
for Si
and SiGe technologies has increase d to beyond 100 GHz. The enhancement of f
T

makes these technologies feasible for many microwave and millimeter-wave applica-
tions that were once exclusively realized in III-V technologies. The key advantage
of using Si/SiGe technologies is their higher integration capabilities with the digital
baseband to realize full system-on-chip (SoC) solutions for low-cost high-volume
3
applications. As shown in Fig. 1.2, the appli cat i on frequency ranges for different
technologies are compared for the years 2005 an d 2007. The gap between Si/SiGe
and III-V technologies is getting narrower.
On the other hand, in Si/SiGe technologies, the power handling capab i l i ti es
do not improve with scaling [6]. In addition, because the passive components as
well as interconnects don’t scale with the transi st or s , their parasitics severely limit
the performance of microwave and millimet er - wave IC design s. Furt h er m or e, in
spite of intensive research carried ou t to improve the quality facto r (Q-factor) of the
passive components in silicon technologies [7]–[10], th e Q-factors at microwave and
millimeter-wave are still lower than those in III-V. Therefore, in the microwave and
millimeter-wave ICs market today, III-V technology targets the low-volume high-
performance markets, while Si/SiGe technology tar get s the low-cost high-volume
markets. Table 1.1 shows th e technology req u i r em ents for RF/analog mixed-signal
CMOS, bipolar, and on-chip passives [2]. As shown, continuous improvements in
technology are required.
1.2.2 Circuit Topologies
The challenges of circuit topologies are strongly influenced by the constraints of
technologies, such as limited f
T
, low Q-factor s of the passives, and large parasitics
of devices.
Generally, conventional topologies at lower frequencies don’t work well at mi-
crowave and millimeter-wave frequencies. Many widely-u sed circuit techniques a t
lower frequencies become less effective when the operating frequency increases.
Therefore, a lot of research has been driven for finding new circuit topologies and

techniques. For example, neutralization and in d u ct i ve peaking techniques have
been proposed to increase the gain of the amplifiers [11]. Coupled transform-
ers [ 12 ], [13] and varactorless techniques [14]–[19] have been proposed to improve
4