2b BJT fundamentals

DC and AC Load Line
Analysis

1


Transistor Amplifiers


Although in modern electronics, amplifiers are more
conveniently implemented using integrated circuits (IC) like ope
rational amplifiers, understanding of transistor amplifiers is usef
ul as





they serve as the building blocks of integrated-circuit amplifiers.
they are used in high frequency applications e.g. in radio
communications circuits, where discrete transistor amplifiers are stil
l popularly in use.

The analysis of BJT as amplifier is studied. They are divided
into




dc biasing in amplifier circuits,
ac small-signal analysis by modeling the ac amplifier as a two-port

network
ac large-signal analysis which uses ac load line to determine the
maximum unclipped


DC bias provides for proper operation of an amplifier. If
an amplifier is not biased correctly, it can go into
saturation or cutoff when an input signal is applied.

DC bias
Linear operation:
vin (v)

vout (v)
t(s)

Output voltage limited by cutoff:
vin (v)
t(s)

vout (v)

A

Output voltage limited by saturation:
vin (v)
t(s)

t(s)

A

A

vout (v)

Output signal is an amplified
replica of the input signal
with 180o out of phase.

The positive portion of
output signal has been
t(s) clipped due to transistor’s
cutoff.

The negative portion of
output signal has been
clipped due to transistor’s
t(s) saturation.


DC analysis of CE circuit
The purpose of the dc biasing circuit is to set up
the initial dc values of IB, IC, and VCE

IC
RC

IB

RB

VRB
VBB

 Input loop consists of VBB,
RB, VBE and RE
VRC

VCE

+
VBE
RE

 There are two circuit loops
in CE amplifier DC circuit
--- input circuit
--- output circuit

IE
VRE

DC bias circuit of CE amplifier

VCC

 KVL for Biasing Equation
VBB = VRB + VBE + VRE
VBB= RBIB + VBE + REIE

 Output loop consists of VCC,
RC, VCE and RE
 KVL for DC load line
Equation
VCC = VRC + VCE + VRE
VCC = RCIC + VCE + REIE


DC biasing circuit


There are three important observations to be made from
the dc bias circuit:
a) When conducting, the base-emitter junction acts as a
forward biased diode with forward current IB.
b)
c)

Therefore,
VBE = 0.7 V
By applying KCL at the emitter terminal (E),
IE = I B + I C
The collector current is represented by a dependent
current source. Because the amount of collector curren
t, IC depends on the base current, IB. This relationship is
:
IC = βDC IB
It is the current gain feature that enables BJTs to be
used for amplifying signals.



Applying KVL around the input circuit, we obtain the
Biasing Equation:
VBB = RBIB + VBE + REIE


DC biasing circuit (cont’d)


Since the transistor is operating in the active region, the emitter
current can be expressed by:
IE = IC + IB= βDC IB + IB = (βDC + 1) IB  βDC IB
For βDC is larger than ( )50, we usually assume that:
IE = IC = βDC IB
Substitute IE into the biasing equation, we have:
VBB = RB IB + VBE + RE (βDC IB)
VBB –VBE = (RB + βDC RE) IB
Or

IB = (VBB –VBE) / (RB + βDC RE) This is the biasing base current.



IC = βDC IB

--- Transistor operates in the active region



Applying KVL around the output circuit we obtain the dc load line
equation:
VCC = RC IC + VCE + RE IE For βDC  50, assume IE = IC,
VCE = VCC – (RC + RE) IC This is the transistor collector-emitter voltage.



The operating point (Q point) of the transistor is at (VCE, IC).


Q-point
 IC and VCE represents the operating-point of the transistor on the
output characteristic. It is also known as the Quiescent Point (Q-point
) or the bias-point of the transistor, Q-point (VCEQ, ICQ ).
 The following are the same:
• Biasing point
• Quiescent point
• Operating point (OP)
• DC point

Q-Point

 Occasionally, a subscript Q is added to the
current or the voltage variables so to indicate
the Q-point values.
 The Q-point (quiescent-point) specifies the dc output current IC and
the dc output voltage VCE when no ac signal is superimposed at the i
nput of the amplifier.
 Determined by using transistor output characteristic and DC load line

Example
The silicon transistor shown
below (βDC = 200) is used in an
amplifier circuit having a base bi
as resistor RB = 10kΩ, a base volt
age source VBB = 10V, a collector
resistor RC = 100Ω, an emitter re
sistor RE = 680Ω and a d.c. power
supply VCC = 20V. Determine the
operating point (VCEQ, ICQ )of the t
ransistor.
IC
RC
IB

+

RB

VCE

+
VRB
VBB

VRC

VBE
RE

IE
VRE

VCC

Solution
Step 1: Determine the base current IB.
Apply KVL around the input circuit:
VBB = RBIB + VBE + βDC IB RE
10V= 10kΩ IB +0.7V + 200 x 680 IB
IB = (10V – 0.7V) / (10kΩ + 200
x 680)= 63.7A
Step 2: Determine IC.
IC= βDC IB= 200 x 63.7  A= 12.74 mA
Step 3: Determine VCE.
Applying KVL around the output circuit
VCC = RCIC + VCE + REIE
20V = 100ΩIC + VCE + 680ΩIE
Since βDC is large, IE = IC
VCE= 20V – 100xIC – 680IE
VCE= 20V –100x12.74mA – 680
x
12.74mA = 10.06V
The operating point of the transistor is at (VCEQ =
10.06V, ICQ = 12.74mA).


Potentials at base, emitter and collector
IC

RC
IB

RB

VRC

VB

VRB

VCE

VCC

VE

VBE

VBB

VC

VRE

RE
IE

 Potential at base:

VB = VBB – VRB = VBB – IBRB
Or VB = VRE + VBE = IERE + VBE

 Potential at emitter:

 Potential at collector:

VE = IERE
Or VE = VCC – VRC– VCE= VCC–ICRC–VCE
Or VE = VBB – VRB– VBE= VBB–IBRB–VBE
VC = VCC – VRC = VCC – ICRC
Or VC = VRE + VCE = IERE + VCE


Exercise 1
Find IB, IC, VCE and determine the
operating region of this transistor
and indicate Q-point.

DC=100
IC

IB

VBB
5V

RC
VRC
4.7K

+
Ω

RB
52K
Ω +

VRB

VBE
RE
2.2KΩ

VCE

IE
VRE

The Q-point of the transistor
is at:
(VCEQ = 9.098V, ICQ = 1.58mA).

Solution
Step 1: Determine IB.
Apply KVL around the input circuit:
VBB = RBIB + VBE + βDC IB RE
5V = 52kΩIB+0.7V+100 x 2.2KΩ IB
IB=(5V–0.7V)/(52kΩ+100 x 2.2KΩ)
= 15.8A
Step 2: Determine the collector current IC.

IC= βDC IB= 100 x 15.8A= 1.58 mA
Step 3: Determine VCE.
Applying KVL around the output circuit
VCC
VCC = RCIC + VCE + REIE
20V
20V = 4.7KΩIC + VCE + 2.2KΩIE
Since βDC is large, IE = IC
VCE=20V – 4.7KΩIC – 2.2KΩIC
VCE=20V–4.7KΩ x 1.58mA–2.2KΩ
x1.58mA = 9.098V
Because VBE=0.7V>0 --BE forward biased
∴VBC=VBE–VCE=0.7–9.098=–8.398V<0
---BC reverse biased
∴this transistor is in active region


Exercise 2

Solution:

Find VB, VC, VE of the
following transistor circuit.
IC

IB

VBB
4V

RC
2.2K
RB Ω
C
47K B
DC=100
Ω
E
RE
1.8KΩ

Step 1: find IB
IB = (VBB – VBE) / (RB + βDC RE)
= (4–0.7)/(47KΩ+1001.8KΩ)
=14.54A
Step 2: find VB
VB = VBB – IBRB=4–14.5 A 47KΩ=3.32V
Step 3: find IC

VCC
15V

IC=DCIB=100 14.5 A=1.45mA
Step 4: find VC
VC=VCC-ICRC=15-1.45mA 2.2KΩ=11.81V
Step 5: find VE
Because DC>50, IE=IC
∴VE=IERE=ICRE=1.45mA 1.8KΩ=2.61V

DC operating point (Q-point)
A transistor must first be dc biased before it can be operated as an ac
signal amplifier.
A transistor, like a diode, allows current to flow only in one direction.
In order to reproduce and amplify a fluctuating input current signal, th
e transistor must first be input with a dc base current such that the flu
ctuating signal can be imposed correctly onto the base current.




iC = IC + ic

C
iB = I B + ib
B

E

ib
+
o

iB

IB
time

ib

=

+

IB

_
Fluctuating input ac
current signal

o

time
DC base current

o

time
Resultant base current


DC operating point (Q-point) (cont’d)
After setting the desired dc base current, the input current
signal at the base terminal is amplified, and its wave-shape i
s accurately reproduced in the collector current.
The output signal iC has a larger amplitude than the input
signal iB.
The transistor is said to be biased when a certain dc current
and voltage conditions are established.
The dc collector current IC and the dc collector-to-emitter

voltage VCE are used to specify this conditions.






iC

C
iB

iB

Ic
+

iC = β iB

vCE

B
E



time

time

DC load line




The dc load line is a graph that represents all the possible
combinations of IC and VCE for a given amplifier.
Q-point on the dc load line that indicates the values of V CE and IC
for an amplifier at rest, (Quiescent means at rest).
A questcent amplifier is one that has no ac signal applied and
therefore has constant dc values of IC and VCE.

 To determine the Q-point
IC (mA)
on dc load line, we must
IB = 90
IC(sat)
know:
IB = 80
dc load line
A
--the biasing base current,
A IB = 70
IB from the biasing or input
8
circuit;
A I = 60
7
--the dc load line of the

B
transistor circuit.
AIB = 50
6
 A straight line intersecting the
vertical axis at approximately
5
Q-point AIB = 40 (IBQ)
IC(sat) and the horizontal axis at
ICQ
VCE(off).
AI = 30
4
B
 IC(sat) occurs when transistor
3
AI = 20
operating in saturation region
V
I Csat  CC
RC

B

2

VCE 0

 VCE(off) occurs when transistor
operating in cut-off region

VCE( off ) VCC  I C RC

1
5
I C 0

VCEQ 10

A
IB = 10
A IB = 0 A V (V
CE
15 V
CE(off)


Example
•

If the dc load line has a collector saturation current
IC(sat) = 8mA and a cut-off collector-emitter voltage
VCE(cut-off) = 15V. The biasing base current IB was 40A. Draw
dc load line on output characteristic. We can determine the
Q-point is at ICQ = 4.12mA and VCEQ = 7.23V.
IC (mA)
IC(sat)

ICQ

8
7
6
5
4
3
2
1

IB = 90
IB = 80
A
A IB = 70
A I = 60
B

AIB = 50
Q-point
AI = 40 (IBQ)
B

AI = 30
B
AIB = 20

5

VCEQ 10

Dc load line

A
IB = 10
AIB = 0 A V
CE
(V)
15
VCE(off)


DC load line equation



The KVL around the output loop
equation is given by the following
expression:
VCC = IC RC + VCE + IE RE



For values of transistor βDC > 50,
assume IE  IC
Substitute this to the above equati
on, we have:
VCC = IC RC + VCE + IC RE
Or VCE = VCC - IC (RC + RE)

IC
RC

IB
VBB



+

RB

VCE

+
VBE

VCC



This equation can be arranged into
the following expression.
IC = (VCC - VCE ) / (RC + RE )
--- dc load Line equation of the
amplifier



This is a linear equation drawn
onto the output characteristic
curve of the BJT. This line is known
as the dc load line of the amplifier

circuit.

RE
IE


Draw dc load line on the output characteristic of a BJT






From the dc load line equation: IC = (VCC – VCE ) / (RC + RE )
As this is a linear equation, we need to identify only two points on the
line; and by joining these two points, the dc load line is then construct
ed on the output characteristic of the BJT.
Point 1: Let IC = 0, then VCE(off) = VCC
This is the horizontal axis intersect point and is known as the Cut-off
Point.
Point 2: Let VCE = 0, then IC(sat) = VCC / (RC + RE)
This is the vertical axis intersect point and is known as the Saturation
point

IC

IC
IC(sat)

RC

IB

RB
+
VBE

VBB

IE

+
VCE

VCC

Saturation
point

DC Load
Line
Cut-off
point

RE
VCE(off)

VCE


Effect of changes in RC or RE on dc load line





The gradient of the dc load line is equal to 1/(RC + RE).
Changes in RC or RE or both resistors (RC + RE) will affect the
gradient of the dc load line.
However, the horizontal axis intersect point will remain the
pivot at VCE = VCC while the dc load line tilts towards or away fro
m the origin of the co-ordinate due to changes in RC or RE.

dc load line equation:

VCC
RC  RE

 When (RC + RE) increases, dc
load line becomes less steeper.
 When (RC + RE) decreases, dc
load line becomes more steeper.

Wh
(R en
C +
R
inc
rea E )
ses

I C(sat) 

VCC
1
IC 
VCE 
RC  R E
RC  R E

Wh
(R en
C
red + R
uc E )
es

IC

Origin
(0,0)

Pivot
Point

VCC VCE


Effect of changes in VCC on dc load line
The gradient = 1/(RC + RE) of the dc load line will remain
unchanged while the supply voltage VCC under go changes.
The dc load line moves parallel away or towards the origin

of the co-ordinate when VCC increases or reduces.

inc
rea
se
s

CC

VCC
1
IC 
VCE 
RC  R E
RC  R E

V en
C
red C
uc
es

V

VCC

RC  RE

dc load line equation:

Wh

I C(sat)

Wh

en

IC

Origin (0,0)

VCC2

VCC

VCC1

VCE


DC Biasing + AC signal
• When an ac signal is applied to the
base of the transistor, IC and VCE will b
oth vary around their Q-point values.
• When the Q-point is centered, IC and
VCE can both make the maximum
possible transitions above and below
their initial dc values.
• When the Q-point is above the center

on the load line, the input signal may
cause the transistor to saturate. Whe
n this happens, a part of the output si
gnal will be clipped off.
• When the Q-point is below midpoint
on the load line, the input signal may
cause the transistor to cutoff. This ca
n also cause a portion of the output si
gnal to be clipped.


Mid-point bias
 It is desirable to have the Q-point centered on the load line.
Why?
 When a circuit is designed to have a centered Q-point, the amplifier is
said to be midpoint biased.
 Midpoint biasing allows optimum ac operation of the amplifier.
 It is often desirable to start the design of the amplifier by biasing the BJT
bias near the midpoint of its dc load line.



At midpoint bias,
IC= IC(sat) /2, and
VCE = VCC/2
or IC = 0.5 IC(sat) , and VCE = 0.5 VCC


DC Biasing + AC signal

Mid-point bias (cont’d)
IC (mA)
ic = βib

ICQ

ib(µA)

IC(sat)

0.5IC(sat)

Q point at
midpoint biasI

0.5VCC

Note that when ic is positive, vce
becomes negative.
There is 180o phase shift
between ic and vce.

time

BQ

VCEQ

VCC

vce

time

VCE (V)
Max. vce without
distortion


DC equivalent circuit




To transform the amplifier circuit to its dc equivalent circuit, the
following procedures should be followed.
1. Reduce all ac sources to ZERO.
2. Remove all capacitors from the circuit.
3. Replace all inductors or coils with a wire (or short-circuit).
4. Redraw the amplifier circuit.
DC equivalent circuit is used to determine the dc biasing currents IB &
IC and the dc biasing voltage VCE of the amplifier circuit.

DC equivalent circuit:

CE amplifier

C
B
Vin

RB
VBB

E
RE

VCC

VCC

RC

RC
C

Vout

RL

B
Equivalent to

RB
VBB

E
RE

DC equivalent circuit (cont’d)
DC equivalent circuit:

CE amplifier
(voltage divider bias)
VCC
R1

RC
B

Vin

VCC
R1

RC

C
Equivalent to
E

R2

RE

R2

RE