Tiểu luận môn Giải thuật nâng cao chủ đề Virtual Memory

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Virtual Memory
Nhóm 5
11070459 - Thái Tiểu Minh
11070460 - Nguyễn Kim Ngân
13070249 - Lê Minh Nam
13070250 - Trần Đức Nghĩa
13070251 - Phạm Ích Trí Nhân
13070247 - Trần Thị Mi
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Contents
E. Examples
D. Protection
C. Segmentation
B. Replacement
A. Introduction
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A. Introduction

Reasons for using virtual memory

Share main memory

Simplify memory management

Provide protection

What is a virtual memory?

Memory Hierarchy


Virtual memory vs Cache
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1. Reason 1

Run multiple processes, each with its own address space  main memory can’t contain
all.

Many processes use only a small part of space

Small parts : main memory

Other parts : disk

Virtual memory : technique of sharing main memory among many processes.
 Main mem ~ cache for the disk
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1. Reason 2

A program is too large for main mem  programmers have to make it fit (*)

Program is devided into pieces  mem/disk

Only “active” code, data : main mem

Virtual memory :

Relieves progammer’s job

Automatically manages memory accesses between main memory and disk
(secondary storage)

 Simplify memory management
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1. Reason 3

Virtual memory :

One process can’t interfere with another
•
Because they operate in different address spaces

User process cannot access privileged information
•
Different sections of address spaces have different permissions
 Provide protection
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2. Memory Hierarchy
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CPU
CPU
regs
regs
Cache
Memory
Memory
Disk
Disk
size:
speed:
$/Mbyte:
line size:

32 B
0.3 ns
4 B
Register Cache Memory Disk Memory
32 KB-4MB
2 ns?
$75/MB
32 B
4096 MB
7.5 ns
$0.014/MB
4 KB
1 TB
8 ms
$0.00012/MB
larger, slower, cheaper
8 B 32 B 4 KB
Cache Virtual memory
2. Virtual Memory
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2. Virtual Memory

Virtual memory = memory on disk

Virtual memory : logical address (virtual address)

Main mem : physical address

Contains blocks from main mem and disk


Controlled by operation system

Auto overlay

(+) Virtual continuous address space

(+) Size ~ disk size, speed ~ main mem speed

(+) Programmers don’t care about mem size  run more larger processes.
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3. Virtual Memory vs Cache
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Contents
E. Examples
D. Protection
C. Segmentation
B. Replacement
A. Introduction
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B. Replacement

Organization  Fully assosiative

Replacement  LRU

Write policy?  Write back

TLB

What is TLB?


Looking a block with a TLB
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1. Main mem organization

Memory access :

Cache miss time ~ 5-10 cache hit time

Main memory miss time ~ 1000 mem hit time

Goals : reducing miss rate  Fully associative

Higher associativity + larger block size
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Associativity
Lower
Higher
2 3. Replacement & write policy

Replacement

RLU (Least Recently Used) : why?
•
Best choice?

Write policy

Write back : why not write through?
•

Benefit for mem access time?
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4. TLB
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Processor
TLB Cache
Main
Memory
miss
hit
data
hit
miss
Disk
Memory
OS Fault
Handler
page fault/
protection violation
Page
Table
data
virtual
addr.
physical
addr.
Page hit
4. Speeding up Translation with a TLB

“Translation Lookaside Buffer” (TLB)


Small hardware cache

Maps virtual page numbers to physical page numbers

Contains complete page table entries for small number of pages

Dirty : “1” = dirty data (write back)

Ref : used to help calculate LRU on replacement

Valid : Entry is valid

Access rights : R(read permission), W(write permission)
Virtual Addr. Physical Addr. Dirty Ref Valid Access Rights
4. The Big Picture
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virtual address
virtual page number
page offset
physical address
n–1 0p–1p
valid physical page numbertag
valid tag data
data
=
cache hit
tag byte offset
index
=

TLB hit
TLB
Cache
.

4. Address Translation With a TLB
Contents
E. Examples
D. Protection
C. Segmentation
B. Replacement
A. Introduction
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C. Segmentation

Classes :

Paging

Segmentation

Paged segmentation

Looking a block

Paging

Segmentation

Paged segmentation

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1. Paging

Virtual memory = a sequence of fixed-size pages

Page identified : page number (0N-1)

N : number of pages in VM

N*page size : VM size

Logical address :
•
Page offset ≤ Page size

Main mem = frames

A frame = a page
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Page number Page offset
1. A System with Paging Virtual Memory
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CPU
0:
1:
N-1:
0:
1:
P-1:
Page Table

Disk
Virtual
Addresses
Physical
Addresses
1. Page Table
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Valid bit :
-
1 : page in main mem
-
0 : page in disk
8 pages
4 page frames
= 4 pages
2. Segmentation

Virtual memory = a set of segments

Identify : segment number, size

Logical address :
•
Segment offset ≤ Segment size

Main mem = segments (+ holes)
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Segment number Seg offset
disk
mem

Random
FIFO
LRU
mem
Paging A page
disk mem
hole
First fit
Next fit
Best fit
Worst fit
mem
Segmentation A seg
2. Segment replacement

Mem-hole size : 10, 4, 20, 18, 7, 9, 12 (KB)

Which hole is taken for a segment replacement?

Segment order : 12KB - 10KB - 9KB

Answer :

First fit : 20KB – 10KB – 18KB
 10, 4, 8, 18, 7, 9, 12  4, 8, 18, 7, 9, 12  4, 8, 9, 7, 9, 12

Best fit : 12KB – 10KB – 9KB
 10, 4, 20, 18, 7, 9  4, 20, 18, 7, 9  4, 20, 9, 7

Worst fit : 20KB – 18KB – 12KB

 10, 4, 8, 18, 7, 9, 12  10, 4, 8, 8, 7, 9, 12  10, 4, 8, 8, 7, 9, 3

Next fit : 20KB – 18KB – 9KB
 10, 4, 8, 18, 7, 9, 12  10, 4, 8, 8, 7, 9, 12  10, 4, 8, 8, 7, 12
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