Điện tử viễn thông c1 3 ghép kênh trung kế mạng trung kế khotailieu

TRƯỜNG ĐẠI HỌC ĐIỆN LỰC
KHOA ĐIỆN TỬ - VIỄN THÔNG

TỔNG ĐÀI &
KỸ THUẬT CHUYỂN MẠCH

Chương 1: Lý thuyết tổng quan và cơ sơ
III. Ghép kênh trung kế - Mạng trung kế

Giảng viên: Phan Thị Thanh Ngọc

1

EPU - 2012


Mạng điện thoại
Analog / Digital
ABX

ABX
ABX
ABX
ABX

ABX

PABX

PABX
ABX

2

J.Tiberghien - VUB


Mang điện thoại
Analog / Digital
ABX

ABX
ABX
ABX
ABX

ABX

PABX

PABX
ABX

3

J.Tiberghien - VUB


Ghép kênh miền tần sô
sin(t)
cos((t

2

X

cos((t
sin(t)
+
2

cos((t
2
~

~/

4 kHz
Ch0

Ch1

Ch2

Ch3

Ch4
frequency

4

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Ghép kênh miền tần sô
1

62kHz

X

420kHz
Group 1

X

Supergroup

12

5

106kHz

X

612kHz
5

X

16 supergroups are multiplexed

into one 960 channels trunk line

J.Tiberghien - VUB


Mạng điện thoại
Analog / Digital
ABX

ABX
ABX
ABX
ABX

ABX

PABX

PABX
ABX

6

J.Tiberghien - VUB


Ghép kênh miền thời gian
1

0

0

1

0

0

1

0

1

1

0

0

0

1

1

1

Synchronous !

7

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Biến đổi A -> D

3400 Hz
300 Hz

64 (or 56) Kb/s

or

Linear
12 A or  law
11 or 12 bit
logarithmic
A to D
encoder
Converter
8000 Hz

8

11

8

8

P to S

Codec

64 kHz

J.Tiberghien - VUB


Biến đổi D -> A

P to S

8 A or  law
logarithmic
decoder

11
or
12

Codec

Linear
11or12 bit
D to A
Converter

64 Kb/s

64 kHz
Clock
extraction
9

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Hệ thông Bell D2
(CCITT G733)
1

2

23

24

1

1 frame = 193 bit (= 24 * 8 + 1)
Frame duration :
Number of channels :
Frame length :
Bit frequency :
Signaling :

125 S
= 1 / 8000
24

193 bit
= 8 * 24 + 1
1544 kHz
= 193 / 125.10-6
least significant bit stolen
once every 6 frames
Signaling rate :
1.3 kb/s
= 8000 / 6
Frame synchronization by bit 0
10

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Hệ thông Bell D2
Đồng bộ hóa đa khung bằng bit 0

11

m
E1
m
0
m
E2
m
0
m
E3

m
1
m
E4
m
0
m
E5
m
1
m
E6
m
1

TS1
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TS2
TS3
TS4
TS22
TS23
TS24
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24.. frame.. multi-frame
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- 6.. F-bits.. : 001011
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- 4. kb/s data
(m)
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- CRC
6
(Ex)
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. : 23 voice
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. kb/s .
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TS1..TS23
channels at 64
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. or common
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.at 64 kb/s
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TS24
:
voice
signaling
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. J.Tiberghien
. - VUB


Luồng E1 - CEPT 30
(CCITT G732)
0

1

30

31

0

1 frame = 256 bit (= 32 * 8)
Frame duration :
125 S
= 1 / 8000
Number of channels :
30
Frame length :
256 bit
= 8 * 32

Bit frequency :
2048 kHz
= 256 / 125.10-6
Signaling :
Slot 16 reserved
Channel Signaling : 2 kb/s = 64 / 32 kb/s
Common Signaling :
64 kb/s
Frame synchronization and link management by slot 0
12

J.Tiberghien - VUB


Luồng E1 - CEPT 30
(CCITT G732)
Báo hiệu kênh kết hợp : Đa khung 16 khung
0

1

30

31

0

Frame 0,2,...,14 :

s 0 0 1 1 0 1 1

Frame alignment

Frame 1,3,...,15 :

s 1 a m x x x x
Link status word

s = CRC4
m = 4 kb/s message channel
a = remote alarm
13

J.Tiberghien - VUB


Luồng E1 - CEPT 30
(CCITT G732)
Báo hiệu kênh kết hợp: Đa khung 16 khung
16

Frame 0 :

17

14

15

16

0 0 0 0 x x x x
Multi-frame alignment

Frame i :
i = 1..15
14

x x x x y y y y
Ch i
Ch i+15
Channel signaling
J.Tiberghien - VUB


Luồng E1 - CEPT 30
(CCITT G732)
Báo hiệu kênh chung : Đa khung 2 khung
0

1

30

31

0

Frame 0 :

s 0 0 1 1 0 1 1

Frame alignment

Frame 1 :

s 1 a m x x x x
Link status word

s = CRC4
m = 4 kb/s message channel
a = remote alarm
15

J.Tiberghien - VUB


Luồng E1 - CEPT 30
(CCITT G732)
Báo hiệu kênh chung : đa khung 2 khung
16

17

Tất cả các frame:

14

15

16

x x x x x x x x
Báo hiệu kênh chung
(64 kb/s)

16

J.Tiberghien - VUB


Ghép kênh theo chuẩn
Strictly synchronous byte interleaving
CCITT
Audio band
Sampling
Bits / sample
Slots / frame
Channels / frame
Bit rate
Encoding
Signaling
- Channel
- Common
17

Bell D2
G733
300-3400 Hz
8000 Hz
8 (17% are 7)
24

24 (23)
1544 kb/s


CEPT 30
G732
300-3400 Hz
8000 Hz
8
32
30
2048 kb/s
A

1.3 kb/s
4 (24) kb/s

2 kb/s
4 + 64 kb/s
J.Tiberghien - VUB


Ghép kênh đồng bộ
• All clocks derived from a single clock
• Receiver clock derived from incoming signal
• Transmitter clock for opposite direction derived from
receiver clock

Tx D
Tx C

Rx C
Rx D
18

Clock extraction
Master Clock

Rx D
Rx C
Tx C
Tx D
J.Tiberghien - VUB


Clock Extraction
by Phase Locked Loop

Line

X

low pass

Phase errors

Voltage Controlled Oscillator

Extracted Receiver Clock

19

J.Tiberghien - VUB


Mạng điện thoại
Analog / Digital
ABX

Master
Clock
ABX
ABX
ABX
ABX

ABX

PABX

PABX
ABX

20

J.Tiberghien - VUB


Ghép kênh đồng bộ
• All clocks derived from a single clock
• But ...

– phase shifts due to noise and interference
– frequency shifts due to path length changes
» thermal dilatation of cables (10-9)
» adjustment of satellite position (300 km)
– frequency shifts due to velocity changes
» dielectric properties of cables
– frequency shifts due to Dopler effect
» for mobile communications
• Consequence : Need of Elastic Buffers
21

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Elastic 
Stores
Trunk

E.S.

Rx D
Rx C
Tx C
Tx D

22

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Elastic Store

for removing clock 
jitter
Write Clock

FIFO Buffer
Storage
level

Read Clock
low pass

23

J.Tiberghien - VUB


•

Autonomous 
Clocks
Single clock for entire world impossible
– Reliability
– Political susceptibility

E.S.

Tx D
Tx C

Rx C
Rx D
24

Clock 1
Clock 2
E.S.

Rx D
Rx C
Tx C
Tx D

J.Tiberghien - VUB


•

Autonomous 
clocks
However small, frequency
differences will cause

over- or under-flows of the elastic stores.
• Over- and Under-flows are called "slips"
• Slips should affect entire frames, not bits
• Effect of slips are best studied with elastic stores
containing no more than than one data frame

Write clock

Capacity = 1 frame
E.S.
Read clock

25

J.Tiberghien - VUB