Bài giảng Xử lý tín hiệu số: Chapter 2 - Hà Hoàng Kha

Chapter
p 2
Quantization
Ha Hoang Kha, Ph.D.Click to edit Master subtitle style
Ho Chi Minh City University of Technology
@
Email:

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1. Quantization process

Fig: Analog to digital conversion

™ The quantized sample xQ(nT) is represented by B bit, which can take
2B possible values.
values
™ An A/D is characterized by a full-scale range R which is divided
into 2B quantization levels.
l l Typical
T
l values
l
off R in practice are
between 1-10 volts.
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1. Quantization process

Fig: Signal quantization
™ Quantizer resolution or quantization width Q =
™ A bipolar
bip l ADC −

R
R
≤ xQ (nT ) <
2
2

R
2B

™ A unipolar
p
ADC 0 ≤ xQ (nT ) < R
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1. Quantization process –Quantization error
™ Quantization by rounding: replace each value x(nT) by the nearest
q antization le
quantization
level.
el
™ Quantization by truncation: replace each value x(nT) by its below
quantization level.
™ Quantization error:

e(nT ) = xQ (nT ) − x(nT )

™ Consider rounding quantization: −

Q
Q
≤e≤
2
2

Fig:
i Uniform
if
probability
b bili density
d i off quantization
i i error
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1. Quantization process –Quantization error
™ The mean value of quantization error e =

Q /2

∫

Q /2

ep (e) de =

− Q /2

∫

− Q /2

Q /2

e

1
de =0
Q

Q /2

2
1
Q
™ The mean
mean-square
square error (power) σ 2 = e2 = ∫ e 2 p(e)de = ∫ e 2 de =
Q
12
− Q /2
− Q /2

™ Root-mean-square
Root mean square (rms) error: erms = σ = e2 =

Q
12

™ R and Q are the ranges
g of the signal
g and quantization
q
noise,, then the
signal to noise ratio (SNR) or dynamic range of the quantizer is
defined as
⎛R⎞
SNR dB = 20 log10 ⎜ ⎟ = 20 log10 (2 B ) = B log10 (2) = 6 B dB
⎝Q⎠

which is referred to as 6 dB bit rule.
rule
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1. Quantization process –Example
™ In a digital audio application, the signal is sampled at a rate of 44
KHz andd each
h sample
l quantized
d using an A/
A/D converter h
having a
full-scale range of 10 volts. Determine the number of bits B if the
rms quantinzation error mush be kept below 50 microvolts.
microvolts Then,
Then
determine the actual rms error and the bit rate in bits per second.

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2. Digital to Analog Converters (DACs)
™ We begin with A/D converters, because they are used as the building
blocks of successive
s ccessi e approximation
appro imation ADCs
ADCs.

Fig: B-bit D/A converter

™ Vector B input bits : b=[b1, b2,…,bB]. Note that bB is the least
significant
f
bit
b (LSB) while
h l b1 is the
h most significant
f
bit
b (MSB).
™ For unipolar signal, xQ є [0, R); for bipolar xQ є [-R/2, R/2).
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2. DAC-Example DAC Circuit
Rf

™ Full scale R=VREF, B=4 bit
2Rf

4Rf

∑I
8Rf

MSB

i

xQ=Vout

16Rf
bB

b1

LSB
-VREF

Fig: DAC using binary weighted resistor
⎛ b1
b3
b2

b4
I
V
=
+
+
+
⎜
∑ REF ⎜ 2 R 4 R 8R 16 R
f
f
f
⎝ f

⎞
⎟⎟
⎠

⎛ b1 b2 b3 b4 ⎞
xQ = VOUT = ∑ I ⋅ R f = VREF ⎜ + + + ⎟
⎝ 2 4 8 16 ⎠
xQ = R 2−4 ( b1 2−3 + b2 2−2 + b3 2−1 + b4 20 ) = Q ( b1 2−3 + b2 2−2 + b3 2−1 + b4 20 )
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2. D/A Converters
™ Unipolar natural binary xQ = R(b1 2−1 + b2 2−2 + ... + bB 2− B ) = Qm
where m is the integer whose binary representation is b=[b1, b2,…,bB].
m = b1 2 B −1 + b2 2 B − 2 + ... + bB 20

™ Bipolar offset binary: obtained by shifting the xQ of unipolar natural
binary converter by half-scale R/2:
xQ = R(b1 2−1 + b2 2−2 + ... + bB 2− B ) −

R
R
=Q
Qm −
2
2

™ Two’s complement code: obtained from the offset binary code by
complementing
l
the
h most significant
f
b
bit, i.e., replacing
l
b1 by
b b1 = 1 − b1 .
xQ = R (b1 2−1 + b2 2−2 + ... + bB 2− B ) −
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2

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2. D/A Converters-Example
™ A 4-bit D/A converter has a full-scale R=10 volts. Find the quantized
analog
l values
l
f the
for
h ffollowing
ll
cases ?
a) Natural binary with the input bits b=[1001] ?
b) Offset binary with the input bits b=[1011] ?
c)) Two’s
T ’ complement
l
binary
bi
with
i h the
h input
i

bits
bi b=[1101]
b [1101] ?

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3. A/D converter
™ A/D converters quantize an analog value x so that is is represented
b B bits b=[b1, b2,…,b
by
bB].]

Fig: B-bit A/D converter

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3. A/D converter
™ One of the most popular converters is the successive approximation

A/D converter
con erter

Fig: Successive approximation A/D converter

™ After B tests, the successive approximation register (SAR) will hold
the correct bit vector b.
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3. A/D converter
™ Successive approximation algorithm

⎧1 if x ≥ 0
where the unit-step function is defined by u ( x) = ⎨
⎩0 if x < 0

This algorithm is applied for the natural and offset binary with
quantization.
truncation q
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3. A/D converter-Example
™ Consider a 4-bit ADC with the full-scale R=10 volts. Using the
s ccessi e approximation
successive
appro imation algorithm to find offset binary
binar of
truncation quantization for the analog values x=3.5 volts and x=-1.5
v
volts.

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3. A/D converter
™ For rounding quantization, we
shift x b
by Q/2
Q/2:

Ha H. Kha

™ For the two’s complement

code the sign bit b1 is treated
code,
separately.

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3. A/D converter-Example
™ Consider a 4-bit ADC with the full-scale R=10 volts. Using the
s ccessi e approximation
successive
appro imation algorithm to find offset and two’s
t o’s
complement of rounding quantization for the analog values x=3.5
vvolts .

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Homework
™ Problems 2.1, 2.2, 2.3, 2.5, 2.6

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